?? msvd.c
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#include "board.h"
#include <math.h>
#define _MSVD_C_
#include <math.h>
#include "types.h"
#include "ms_reg.h"
#include "board.h"
#include "global.h"
#include "DEBUG.h"
#include "ms_rwreg.h"
#include "misc.h"
#include "userpref.h"
#include "power.h"
#include "panel.h"
#include "mstar.h"
#include "tv.h"
#include "DevVD.h"
#include "Detect.h"
#include "DEVTuner.h"
#include "adjust.h"
#include "Maria2_FSC_Lib.h"
#include "Maria2_ACC_Lib.h"
#include "M2_VD_Std_Lib.h"
#include "DevVD_User.h"
#include "menu.h"
#include "msvd.h"
#include "M2_VD_AGC_Lib.h"
#include "msVDField.h"
#if(ENABLE_VD_DSP)
#include "Maria2_dsp_lib.h"
#endif
///////////////////////////////////////////////////////////////////////////////
// h sync lock : DspReg[14.1] or DspReg[0x25]7:4(CTRL_STATE[3:0]) >= 6
// color lock : DspReg[0x25]7:4(CTRL_STATE[3:0]) == 8
// 50Hz : by DSP
// interlace : by scaler.
//
// BK2_01[2:0] => FREQ_FSC[2:0] ==> Detect Signal type
// 000: 4.43361875MHz.
// 010: 3.579545MHz.
// 100: 3.57561149MHz.
// 110: 3.58205625MHz
//
// BK2_01[7:4] => APLL_TRK_MD[3:0]
// 1000: APLL in tracking mode
// 0110: APLL in free run mode(no color)
//
// BK2_02[7:6] => APLL_LCK_STATE[1:0]
// 01: APLL in lock state(color on)
// xx: APLL not in lock yet(color off)
//
// BK2_02[5:4] => FRM_LNS[1:0]
// 00: Unknown
// 10: Above 575 lines
// 01: Below 575 lines
//
// BK2_02[3:2] => Lock color burst
// 01: Lock
// 10: No lock
//
// BK2_02[1:0] => TV_SYSTEM[1:0]
// 01: NTSC system
// 10: PAL system
//
// BK2_03[7] ==> VCR_MD ==> VCR mode detect
// ------------------------------------------------------------------
// When Bk2_04 = 0x04, Bk2_02 ==> Noise level
// When Bk2_04 = 0x08, Bk2_01 ==> Gain level
// ------------------------------------------------------------------
// How to judge these situation:
// VCR - Stop(OSD): Non-interlace
// VCR - Pause: Vtotal is different with normal play
// VCR : Vtotal is always change
///////////////////////////////////////////////////////////////////////////////
// BK3_72[2:0]
// 000: NTSC(M)
// 001: NTSC(443)
// 010: PAL(M)
// 011: PAL(BDGHIN)
// 100: PAL(Nc)
// 111: Unknow => No signal
///////////////////////////////////////////////////////////////////////////////
// Htotal*Vtotal
// NTSC(M) 910*525
// NTSC-443 1127.1*525
// PAL(M) 909*525
// PAL(BDGHIN) 1135*625+4
// PAL(Nc) 917*625+4
//
// NTSC(M) New capture = 720*910/858
///////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////
// 3.58: 910 NTSC-M 525 NTSC
// 909 PAL-M 525 PAL
// 917 PAL-Nc 625
// 4.43:
// 1135 PAL-BDGHIN 625
// 1127 NTSC-443 525
///////////////////////////////////////////////////////////////////////////////
// Use ShibaSoku TG35CX get some info:
// NTSC:
// FH=15.735KHz ==> HP=0x2FB
// FV=59.94Hz ==> VT=525
//-------------------------------------
// PAL:
// FH=15.625KHz ==> HP=0x334
// FV=50 ==> VT=625
////////////////////////////////////////////////////////////////////////////
WORD code tVideoSystemStdHTotal[SIG_NUMS] =
{
910, // SIG_NTSC, // M
1135, // SIG_PAL, // B/G, D/K, I, H, N
1097, // SIG_SECAM,
1127, // SIG_NTSC_443,
1127, // SIG_PAL_60,
909, // SIG_PAL_M,
917, // SIG_PAL_NC,
};
void msVDDSPWriteByte( BYTE ucAddr, BYTE ucData )
{
BYTE ucBk2_07 = msReadByte( BK2_07 );
msWriteByte( BK2_07, ucAddr );
msWriteByte( BK2_08, ucData );
msWriteByte( BK2_07, ucBk2_07 );
}
BYTE msVDDSPReadByte( BYTE ucAddr )
{
BYTE ucTmp;
BYTE ucBk2_07 = msReadByte( BK2_07 );
msWriteByte( BK2_07, ucAddr );
ucTmp = msReadByte( BK2_09 );
msWriteByte( BK2_07, ucBk2_07 );
return ucTmp;
}
WORD msVDDSPRead2Bytes( BYTE ucAddr )
{
return (msVDDSPReadByte(ucAddr) + (msVDDSPReadByte(ucAddr+1)<<8));
}
BYTE msVDSpecialRead( BYTE ucMux, BYTE ucAddr )
{
BYTE ucBank;
BYTE ucBackupBK2_04;
BYTE ucTmp;
ucBank = msReadByte( BK0_00_REGBK);
msWriteByte( BK0_00_REGBK, REG_BANK2_VD );
ucBackupBK2_04 = msReadByte( BK2_04 );
msWriteByte( BK2_04, ucMux );
ucTmp = msReadByte( ucAddr );
msWriteByte( BK2_04, ucBackupBK2_04 );
msWriteByte( BK0_00_REGBK, ucBank );
return ucTmp;
}
void msVDReset(void)
{
BYTE ucBank = msReadByte( BK0_00_REGBK );
putstr("\r\n[Reset VD]");
msWriteByte( BK0_00_REGBK, REG_BANK2_VD );
#if( ENABLE_PAL_SWITCH_HANDLER )
//if( g_ucmsVDCtl2&MSVD_CTL2_FLAG_PAL_SWITCH )
msVDPalSwitchHandlerReset(); // Auto detect PAL/NTSC
#endif
msWriteByteMask(BK2_21_APLL_CTRL2, 0x00, 0x06); // Auto detect PAL/NTSC
msWriteBit( BK2_14_SOFT_RST, 1, _BIT7 );
Delay1ms(1);
msWriteBit( BK2_14_SOFT_RST, 0, _BIT7 );
Delay1ms(1);
//if( g_ucmsVDCtl2&MSVD_CTL2_FLAG_AGC_PROCESSOR )
VD_AGC_Ctl( VD_AGC_CTL_ENABLE );
#if(ENABLE_VD_DSP)
//if( g_ucmsVDCtl&MSVD_CTL_FLAG_VSYNC )
{
BYTE ucVSyncCtl = VD_DSP_CTL_ENABLE;
#if(ENABLE_VSYNC_CTL_AUTO_H_TOTAL)
ucVSyncCtl |= VD_DSP_CTL_DISABLE_AUTO_H_TOTAL;
#endif
#if( TV_SYSTEM == TV_NTSC )
VD_DSP_Ctl( ucVSyncCtl, 525 ); // Enable DSP, 60Hz
#else
VD_DSP_Ctl( ucVSyncCtl, 625 ); // Enable DSP, 50Hz
#endif
}
#elif( ENABLE_SW_FILED )
msVDDSPWriteByte( DSP_0F, 0x04 );
#endif
//if( g_ucmsVDCtl&MSVD_CTL_FLAG_NOISE_HANDLER )
msVDNoiseHandlerInit();
//yurian for VD Reset DSP10 error
{
BYTE DSP10_Value=msVDDSPReadByte( 0x10 );
while(DSP10_Value!=0x85)
{
Delay1ms(2);
msVDDSPWriteByte(DSP_10, 0x85);
msVDDSPWriteByte(DSP_11, 0x00);
Delay1ms(1);
DSP10_Value=msVDDSPReadByte( 0x10 );
}
}
msWriteByte( BK0_00_REGBK, ucBank );
}
void msVD_FSM_Reset(void)
{
BYTE ucBank = msReadByte( BK0_00_REGBK);
putstr("\r\n[Reset FSM]");
#if ( ENABLE_PAL_SWITCH_HANDLER )
//if( g_ucmsVDCtl2&MSVD_CTL2_FLAG_PAL_SWITCH )
msVDPalSwitchHandlerReset(); // Auto detect PAL/NTSC
#endif
msWriteByte( BK0_00_REGBK, REG_BANK2_VD );
msWriteBit( BK2_14_SOFT_RST, 1, _BIT6 );
Delay1ms(1);
msWriteBit( BK2_14_SOFT_RST, 0, _BIT6 );
Delay1ms(1);
msWriteByte( BK0_00_REGBK, ucBank );
}
WORD msVDGetVTotal(void)
{
BYTE ucBank;
WORD wVTotal;
ucBank = msReadByte( BK0_00_REGBK);
msWriteByte( BK0_00_REGBK, REG_BANK2_VD );
wVTotal = msVDDSPRead2Bytes(0);
msWriteByte( BK0_00_REGBK, ucBank );
return wVTotal;
}
// ucFlag:
// [1:0]: 1 -> Always return a valid h freq
// 2 -> Return virtual H period
WORD msGetVideoHPeriod( BYTE ucFlag )
{
BYTE i;
WORD wInHP;
WORD wInHF;
if( (ucFlag&3) != 2 )
{
for( i = 0; i < 10; ++ i )
{
wInHP = msGetHorizontalPeriod();
if( wInHP )
{
wInHF = MST_CLOCK_HZ/wInHP;
if( (wInHF >= 13500)&&(wInHF <= 17800) )
{
return wInHP;
}
}
}
}
// H period invalid...
if( (ucFlag&3) )
{
if( msVDGetVTotal() > 566 )
return MST_CLOCK_HZ/15625;
else
return MST_CLOCK_HZ/15734;
}
return 0;
}
#if(ENABLE_CHECK_AUTO_H_TOTAL)
BYTE msVDCheckScalerStatus( BYTE ucCheckFlag )
{
BYTE ucStatus = 0;
WORD wTmp;
WORD wHFreq;
WORD wVTotal;
// Calculate H frequency ...
wTmp = msGetHorizontalPeriod();
if( wTmp == 0x1fff || wTmp == 0 ) // Check H period
{
//printf("\r\nHP=%d", wTmp);
ucStatus |= VD_H_PERIOD_INVALID;
}
else // H period is valid
{
wHFreq = msCalculateHFreqX10(wTmp); // Cal H freq
if( wHFreq < 146 || wHFreq > 167 ) //200 ) // Hfreq < 14.6K, > 16.6K => freq invalid
{
ucStatus |= VD_H_FREQ_INVALID;
}
else // H freq is valid
{
if( ucCheckFlag&VD_V_TOTAL_INVALID )
{
wVTotal = msVDGetVTotal(); // Get VTotal from VD
wTmp = msVDGetVTotal(); // Get VTotal from scaler
// Check VD&Scaler VTotal
if( (wVTotal < 420) || (wVTotal > 730)
||(wTmp < 420) || (wTmp > 730)
||(abs((int)wVTotal - wTmp) > 50)) // The VTotal of VD and Scaler is different!!
{
ucStatus |= VD_V_TOTAL_INVALID;
}
else // VTotal is valid
{
if( ucCheckFlag&VD_V_FREQ_INVALID )
{
// Cal V freq
wTmp = msCalculateVFreqX10( wHFreq, wTmp )*2;
if( wTmp < 440 || wTmp > 660 )
{
ucStatus |= VD_V_FREQ_INVALID;
}
}
}
}
}
}
return ucStatus;
}
#endif
bit msVDGetColorLockBit(void)
{
return msVD_FSC_GetColorBurstStatus();
}
WORD msVDGetSyncStatus(void)
{
BYTE ucBank;
BYTE ucTmp;
WORD wVDStatus = 0;
BYTE ucCombStatus;
WORD wVDVtotal = msVDGetVTotal();
ucBank = msReadByte( BK0_00_REGBK);
msWriteByte(BK0_00_REGBK, REG_BANK3_COMB);
ucCombStatus = msReadByte( BK3_72_COMB_STSC);
// Check V total
#if( ENABLE_VD_DSP )
if( wVDVtotal > 566 ) // 625 lines
wVDStatus |= VD_VSYNC_50HZ;
#else
if( ucCombStatus&_BIT6 ) // 625 lines
wVDStatus |= VD_VSYNC_50HZ;
#endif
//if( 0 == (ucCombStatus&_BIT3) ) // Check comb: No any input signal
{
msWriteByte(BK0_00_REGBK, REG_BANK2_VD);
if( ((msVDSpecialRead( 0x00, BK2_01 )&0xF0) >= 0x60)// Sync ctl state > 6
&&(msVDDSPReadByte( 0x14 )&_BIT1) ) // SYNC_FOUND
{
#if( ENABLE_VD_DSP )
if( wVDVtotal >= 420 && wVDVtotal <= 730 )
#else
if( (ucCombStatus&0x07) != 7 )
#endif
{
wVDStatus |= (VD_HSYNC_LOCKED|VD_SYNC_LOCKED);
// Check interlace
if( msGetInterlaceBit() )
{
wVDStatus |= VD_INTERLACED;
}
}
}
}
// Get other VD status:
if( wVDStatus&VD_HSYNC_LOCKED )
{
// Check color
// Get bk2_02 value
ucTmp = msVDSpecialRead( 0x00, BK2_02 );
// Check Color burst lock
if( (ucTmp&0x0C) == 0x04 )
{
wVDStatus |= VD_COLOR_LOCKED;
}
// Check FSC
ucTmp = msVDSpecialRead( 0x00, BK2_01 );
switch( ucTmp&0x07 )
{
default:
case 0: wVDStatus |= VD_FSC_4433;
break;
case 2: wVDStatus |= VD_FSC_3579;
break;
case 4: wVDStatus |= VD_FSC_3575;
break;
case 6: wVDStatus |= VD_FSC_3582;
break;
case 1: wVDStatus |= VD_FSC_4285;
break;
}
// Check PAL switch
if( g_ucMSVDForceSystem == VD_FORCE_AUTO )
{
if( wVDStatus&VD_VSYNC_50HZ ) // 50 Hz
{
wVDStatus |= VD_PAL_SWITCH;
}
else // 60 Hz
{
// ucTmp = wVDStatus&VD_FSC_TYPE;
// if( (ucTmp == VD_FSC_3579)
// ||(ucTmp == VD_FSC_3575)
// ||(ucTmp == VD_FSC_3582)
// ||(ucTmp == VD_FSC_4433)
// )
{
if (VD_Type<MARIA2_E)
{
ucTmp = msVDSpecialRead( 0x00, BK2_03 );
if( ucTmp&_BIT5 )
wVDStatus |= VD_PAL_SWITCH;
}
#if( ENABLE_SW_DETECT_COLOR_STD )
else if( g_ucVD_ColorStd == DSP_COLOR_PAL )
wVDStatus |= VD_PAL_SWITCH;
#endif
}
}
}
else // Force color
{
if( (g_ucMSVDForceSystem == VD_FORCE_PAL)||(g_ucMSVDForceSystem == VD_FORCE_PAL_358) )
{
wVDStatus |= VD_PAL_SWITCH;
}
}
//wVDStatus |= msVDGetVideoSystem( wVDStatus )
}
msWriteByte( BK0_00_REGBK, ucBank );
return wVDStatus;
}
//////////////////////////////////////////////////////
// Std 50/60 Vtotal FSC HTotal Color
//-----------------------------------------
// NTSC 60 525 358 910
// PAL-M 60 525 358 909 PAL-Switch
// NTSC-443 60 525 443 1127
// PAL-60 60 525 443 1127 PAL-Switch
// xxx 50 625 358
// PAL-Nc 50 625 358 917 PAL-Switch
// xxx 50 625 443
// PAL 50 625 443 1135 PAL-Switch
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