diff -burN gcc-4.0.2/config.sub gcc-psp/config.sub--- gcc-4.0.2/config.sub	2005-04-25 11:36:56.000000000 +0100+++ gcc-psp/config.sub	2007-01-21 16:35:39.000000000 +0000@@ -254,6 +254,7 @@ 	| mipsisa64sb1 | mipsisa64sb1el \ 	| mipsisa64sr71k | mipsisa64sr71kel \ 	| mipstx39 | mipstx39el \+	| mipsallegrex | mipsallegrexel \ 	| mn10200 | mn10300 \ 	| msp430 \ 	| ns16k | ns32k \@@ -328,6 +329,7 @@ 	| mipsisa64sb1-* | mipsisa64sb1el-* \ 	| mipsisa64sr71k-* | mipsisa64sr71kel-* \ 	| mipstx39-* | mipstx39el-* \+	| mipsallegrex-* | mipsallegrexel-* \ 	| mmix-* \ 	| msp430-* \ 	| none-* | np1-* | ns16k-* | ns32k-* \@@ -668,6 +670,10 @@ 		basic_machine=m68k-atari 		os=-mint 		;;+	psp)+		basic_machine=mipsallegrexel-psp+		os=-elf+		;; 	mips3*-*) 		basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'` 		;;diff -burN gcc-4.0.2/gcc/c-incpath.c gcc-psp/gcc/c-incpath.c--- gcc-4.0.2/gcc/c-incpath.c	2005-01-23 15:05:27.000000000 +0000+++ gcc-psp/gcc/c-incpath.c	2007-01-21 16:35:39.000000000 +0000@@ -331,13 +331,18 @@   cpp_dir *p;  #if defined (HAVE_DOS_BASED_FILE_SYSTEM)-  /* Convert all backslashes to slashes.  The native CRT stat()-     function does not recognize a directory that ends in a backslash-     (unless it is a drive root dir, such "c:\").  Forward slashes,-     trailing or otherwise, cause no problems for stat().  */-  char* c;-  for (c = path; *c; c++)-    if (*c == '\\') *c = '/';+  /* Remove unnecessary trailing slashes.  On some versions of MS+     Windows, trailing  _forward_ slashes cause no problems for stat().+     On newer versions, stat() does not recognise a directory that ends+     in a '\\' or '/', unless it is a drive root dir, such as "c:/",+     where it is obligatory.  */+  int pathlen = strlen (path);+  char* end = path + pathlen - 1;+  /* Preserve the lead '/' or lead "c:/".  */+  char* start = path + (pathlen > 2 && path[1] == ':' ? 3 : 1);+   +  for (; end > start && IS_DIR_SEPARATOR (*end); end--)+    *end = 0; #endif    p = xmalloc (sizeof (cpp_dir));diff -burN gcc-4.0.2/gcc/config/mips/allegrex.md gcc-psp/gcc/config/mips/allegrex.md--- gcc-4.0.2/gcc/config/mips/allegrex.md	1970-01-01 01:00:00.000000000 +0100+++ gcc-psp/gcc/config/mips/allegrex.md	2007-01-21 16:35:39.000000000 +0000@@ -0,0 +1,183 @@+;; Sony ALLEGREX instructions.+;; Copyright (C) 2005 Free Software Foundation, Inc.+;;+;; This file is part of GCC.+;;+;; GCC is free software; you can redistribute it and/or modify+;; it under the terms of the GNU General Public License as published by+;; the Free Software Foundation; either version 2, or (at your option)+;; any later version.+;;+;; GCC is distributed in the hope that it will be useful,+;; but WITHOUT ANY WARRANTY; without even the implied warranty of+;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the+;; GNU General Public License for more details.+;;+;; You should have received a copy of the GNU General Public License+;; along with GCC; see the file COPYING.  If not, write to+;; the Free Software Foundation, 59 Temple Place - Suite 330,+;; Boston, MA 02111-1307, USA.++; Multiply Add and Subtract.++(define_insn "allegrex_madd"+  [(set (match_operand:SI 0 "register_operand" "+l")+      	(plus:SI (mult:SI (match_operand:SI 1 "register_operand" "d")+			  (match_operand:SI 2 "register_operand" "d"))+		 (match_dup 0)))+   (clobber (match_scratch:SI 3 "=h"))]+  "TARGET_ALLEGREX"+  "madd\t%1,%2"+  [(set_attr "type"	"imadd")+   (set_attr "mode"	"SI")])++(define_insn "allegrex_msub"+  [(set (match_operand:SI 0 "register_operand" "+l")+      	(minus:SI (match_dup 0)+		  (mult:SI (match_operand:SI 1 "register_operand" "d")+			   (match_operand:SI 2 "register_operand" "d"))))+   (clobber (match_scratch:SI 3 "=h"))]+  "TARGET_ALLEGREX"+  "msub\t%1,%2"+  [(set_attr "type"	"imadd")+   (set_attr "mode"	"SI")])+++; Min and max.++(define_insn "sminsi3"+  [(set (match_operand:SI 0 "register_operand" "=d")+        (smin:SI (match_operand:SI 1 "register_operand" "d")+                 (match_operand:SI 2 "register_operand" "d")))]+  "TARGET_ALLEGREX"+  "min\t%0,%1,%2"+  [(set_attr "type"	"arith")+   (set_attr "mode"	"SI")])++(define_insn "smaxsi3"+  [(set (match_operand:SI 0 "register_operand" "=d")+        (smax:SI (match_operand:SI 1 "register_operand" "d")+                 (match_operand:SI 2 "register_operand" "d")))]+  "TARGET_ALLEGREX"+  "max\t%0,%1,%2"+  [(set_attr "type"	"arith")+   (set_attr "mode"	"SI")])+++; Extended shift instructions.++(define_insn "allegrex_bitrev"+  [(set (match_operand:SI 0 "register_operand" "=d")+	(unspec:SI [(match_operand:SI 1 "register_operand" "d")]+		   UNSPEC_BITREV))]+  "TARGET_ALLEGREX"+  "bitrev\t%0,%1"+  [(set_attr "type"	"arith")+   (set_attr "mode"	"SI")])++(define_insn "allegrex_wsbh"+  [(set (match_operand:SI 0 "register_operand" "=d")+	(unspec:SI [(match_operand:SI 1 "register_operand" "d")]+		   UNSPEC_WSBH))]+  "TARGET_ALLEGREX"+  "wsbh\t%0,%1"+  [(set_attr "type"	"arith")+   (set_attr "mode"	"SI")])++(define_insn "allegrex_wsbw"+  [(set (match_operand:SI 0 "register_operand" "=d")+	(unspec:SI [(match_operand:SI 1 "register_operand" "d")]+		   UNSPEC_WSBW))]+  "TARGET_ALLEGREX"+  "wsbw\t%0,%1"+  [(set_attr "type"	"arith")+   (set_attr "mode"	"SI")])+++; Count leading ones, count trailing zeros, and count trailing ones (clz is+; already defined).++(define_insn "allegrex_clo"+  [(set (match_operand:SI 0 "register_operand" "=d")+      	(unspec:SI [(match_operand:SI 1 "register_operand" "d")]+		   UNSPEC_CLO))]+  "TARGET_ALLEGREX"+  "clo\t%0,%1"+  [(set_attr "type"	"clz")+   (set_attr "mode"	"SI")])++(define_expand "ctzsi2"+  [(set (match_operand:SI 0 "register_operand")+      	(ctz:SI (match_operand:SI 1 "register_operand")))]+  "TARGET_ALLEGREX"+{+  rtx r1;++  r1 = gen_reg_rtx (SImode);+  emit_insn (gen_allegrex_bitrev (r1, operands[1]));+  emit_insn (gen_clzsi2 (operands[0], r1));+  DONE;+})++(define_expand "allegrex_cto"+  [(set (match_operand:SI 0 "register_operand")+      	(unspec:SI [(match_operand:SI 1 "register_operand")]+		   UNSPEC_CTO))]+  "TARGET_ALLEGREX"+{+  rtx r1;++  r1 = gen_reg_rtx (SImode);+  emit_insn (gen_allegrex_bitrev (r1, operands[1]));+  emit_insn (gen_allegrex_clo (operands[0], r1));+  DONE;+})+++; Misc.++(define_insn "allegrex_sync"+  [(unspec_volatile [(const_int 0)] UNSPEC_SYNC)]+  "TARGET_ALLEGREX"+  "sync"+  [(set_attr "type"	"unknown")+   (set_attr "mode"	"none")])++(define_insn "allegrex_cache"+  [(unspec_volatile [(match_operand:SI 0 "const_int_operand" "")+		     (match_operand:SI 1 "register_operand" "d")]+		    UNSPEC_CACHE)]+  "TARGET_ALLEGREX"+  "cache\t%0,0(%1)"+  [(set_attr "type"	"unknown")+   (set_attr "mode"	"none")])+++; Floating-point builtins.++(define_insn "allegrex_ceil_w_s"+  [(set (match_operand:SI 0 "register_operand" "=f")+      	(unspec:SI [(match_operand:SF 1 "register_operand" "f")]+		   UNSPEC_CEIL_W_S))]+  "TARGET_ALLEGREX"+  "ceil.w.s\t%0,%1"+  [(set_attr "type"	"fcvt")+   (set_attr "mode"	"SF")])++(define_insn "allegrex_floor_w_s"+  [(set (match_operand:SI 0 "register_operand" "=f")+      	(unspec:SI [(match_operand:SF 1 "register_operand" "f")]+		   UNSPEC_FLOOR_W_S))]+  "TARGET_ALLEGREX"+  "floor.w.s\t%0,%1"+  [(set_attr "type"	"fcvt")+   (set_attr "mode"	"SF")])++(define_insn "allegrex_round_w_s"+  [(set (match_operand:SI 0 "register_operand" "=f")+      	(unspec:SI [(match_operand:SF 1 "register_operand" "f")]+		   UNSPEC_ROUND_W_S))]+  "TARGET_ALLEGREX"+  "round.w.s\t%0,%1"+  [(set_attr "type"	"fcvt")+   (set_attr "mode"	"SF")])diff -burN gcc-4.0.2/gcc/config/mips/mips-protos.h gcc-psp/gcc/config/mips/mips-protos.h--- gcc-4.0.2/gcc/config/mips/mips-protos.h	2004-12-30 03:07:56.000000000 +0000+++ gcc-psp/gcc/config/mips/mips-protos.h	2007-01-21 16:35:39.000000000 +0000@@ -205,5 +205,6 @@ extern void irix_asm_output_align (FILE *, unsigned); extern const char *current_section_name (void); extern unsigned int current_section_flags (void);+extern bool mips_use_ins_ext_p (rtx, rtx, rtx);  #endif /* ! GCC_MIPS_PROTOS_H */diff -burN gcc-4.0.2/gcc/config/mips/mips.c gcc-psp/gcc/config/mips/mips.c--- gcc-4.0.2/gcc/config/mips/mips.c	2005-05-08 12:56:53.000000000 +0100+++ gcc-psp/gcc/config/mips/mips.c	2007-01-21 16:42:40.000000000 +0000@@ -150,6 +150,15 @@   MIPS_DF_FTYPE_DF,   MIPS_DF_FTYPE_DF_DF, +  /* For the Sony ALLEGREX.  */+  MIPS_SI_FTYPE_QI,+  MIPS_SI_FTYPE_HI,+  MIPS_SI_FTYPE_SI,+  MIPS_SI_FTYPE_SI_SI,+  MIPS_VOID_FTYPE_VOID,+  MIPS_VOID_FTYPE_SI_SI,+  MIPS_SI_FTYPE_SF,+   /* The last type.  */   MIPS_MAX_FTYPE_MAX };@@ -162,6 +171,10 @@      operands 1 and above.  */   MIPS_BUILTIN_DIRECT, +  /* The builtin corresponds directly to an .md pattern.  There is no return+     value and the arguments are mapped to operands 0 and above.  */+  MIPS_BUILTIN_DIRECT_NO_TARGET,+   /* The builtin corresponds to a comparison instruction followed by      a mips_cond_move_tf_ps pattern.  The first two arguments are the      values to compare and the second two arguments are the vector@@ -185,7 +198,12 @@   MIPS_BUILTIN_CMP_LOWER,    /* As above, but the instruction only sets a single $fcc register.  */-  MIPS_BUILTIN_CMP_SINGLE+  MIPS_BUILTIN_CMP_SINGLE,++  /* The builtin corresponds to the ALLEGREX cache instruction.  Operand 0+     is the function code (must be less than 32) and operand 1 is the base+     address.  */+  MIPS_BUILTIN_CACHE };  /* Invokes MACRO (COND) for each c.cond.fmt condition.  */@@ -361,13 +379,14 @@ static rtx mips_prepare_builtin_target (enum insn_code, unsigned int, rtx); static rtx mips_expand_builtin (tree, rtx, rtx, enum machine_mode, int); static void mips_init_builtins (void);-static rtx mips_expand_builtin_direct (enum insn_code, rtx, tree);+static rtx mips_expand_builtin_direct (enum insn_code, rtx, tree, bool); static rtx mips_expand_builtin_movtf (enum mips_builtin_type, 				      enum insn_code, enum mips_fp_condition, 				      rtx, tree); static rtx mips_expand_builtin_compare (enum mips_builtin_type, 					enum insn_code, enum mips_fp_condition, 					rtx, tree);+static rtx mips_expand_builtin_cache (enum insn_code icode, rtx, tree);  /* Structure to be filled in by compute_frame_size with register    save masks, and offsets for the current function.  */@@ -553,6 +572,7 @@ const char *mips_tune_string;   /* for -mtune=<xxx> */ const char *mips_isa_string;	/* for -mips{1,2,3,4} */ const char *mips_abi_string;	/* for -mabi={32,n32,64,eabi} */+const char *mips_preferred_stack_boundary_string;  /* Whether we are generating mips16 hard float code.  In mips16 mode    we always set TARGET_SOFT_FLOAT; this variable is nonzero if@@ -560,6 +580,9 @@    should arrange to call mips32 hard floating point code.  */ int mips16_hard_float; +unsigned int mips_preferred_stack_boundary;+unsigned int mips_preferred_stack_align;+ const char *mips_cache_flush_func = CACHE_FLUSH_FUNC;  /* Holds string <X> if -mfix-vr4130<X> was passed on the command line.  */@@ -673,6 +696,7 @@    /* MIPS II */   { "r6000", PROCESSOR_R6000, 2 },+  { "allegrex", PROCESSOR_ALLEGREX, 2 },    /* MIPS III */   { "r4000", PROCESSOR_R4000, 3 },@@ -3969,6 +3993,38 @@   return true; } +/* Return true if (zero_extract OP SIZE POSITION) can be used as the+   source of an "ext" instruction or the destination of an "ins"+   instruction.  OP must be a register operand and the following+   conditions must hold:++     0 <= POSITION < GET_MODE_BITSIZE (GET_MODE (op))+     0 < SIZE <= GET_MODE_BITSIZE (GET_MODE (op))+     0 < POSITION + SIZE <= GET_MODE_BITSIZE (GET_MODE (op))++   Also reject lengths equal to a word as they are better handled+   by the move patterns.  */++bool+mips_use_ins_ext_p (rtx op, rtx size, rtx position)+{+  HOST_WIDE_INT len, pos;++  if (!ISA_HAS_EXT_INS+      || !register_operand (op, VOIDmode)+      || GET_MODE_BITSIZE (GET_MODE (op)) > BITS_PER_WORD)+    return false;++  len = INTVAL (size);+  pos = INTVAL (position);+  +  if (len <= 0 || len >= GET_MODE_BITSIZE (GET_MODE (op)) +      || pos < 0 || pos + len > GET_MODE_BITSIZE (GET_MODE (op)))+    return false;++  return true;+}+ /* Set up globals to generate code for the ISA or processor    described by INFO.  */ @@ -4509,6 +4565,22 @@       mips_lo_relocs[SYMBOL_GOTOFF_LOADGP] = "%lo(%neg(%gp_rel(";     } +  /* Validate -mpreferred-stack-boundary= value, or provide default.+     The default of 128-bit is for newABI else 64-bit.  */+  mips_preferred_stack_boundary = (TARGET_NEWABI ? 128 : 64);+  mips_preferred_stack_align = (TARGET_NEWABI ? 16 : 8);+  if (mips_preferred_stack_boundary_string)+    {+      i = atoi (mips_preferred_stack_boundary_string);+      if (i < 2 || i > 12)+	error ("-mpreferred-stack-boundary=%d is not between 2 and 12", i);