/*
********************************************************************************
*
* Copyright 2002, Vineyard Technologies, Inc.
*
* Filename 	: audio.c
* Programmer: Steve KyeongHyeon Lee
* Created 	: 2003/08/20
* Modified 	:
*
* Description :
********************************************************************************
*/

#include "types.h"

/*
###############################################################################
File Include Section
###############################################################################
*/
#include "8052reg.h"
#include <stdio.h>
#include <absacc.h>
#include "gio.h"
#include "i2c.h"
#include "audio.h"

//==============================================================================
// Audio Register in FPGA
//==============================================================================

#define AUDIO_INT_REGISTER XBYTE[0x8000]
// bit0: (R) Only used in REC-AUDIO mode, reading this bit will clear audio interrupt at audio FPGA
// bit0: (W) Writing 0 will enable audio block in G1P
	#define AUD_B0_ENALBE		0x00

#define AUDIO_BUS_REGISTER XBYTE[0x8001]
// bit0: (R/W) 	0 -> Audio FPGA release IDE bus (automatically by FPGA)
//				1 -> Audio FPGA handle IDE bus to read or write
// bit1: (W)	0 -> Recoding audio into HDD
//				1 -> Decoding audio from HDD
	#define AUD_B0_AUDIO_IDE	0x01

#define AUDIO_PLAY_REGISTER XBYTE[0x8002]
// bit0: (R/W)	0 -> Audio Recoding Mode Enable
//				1 -> Audio Decoding Mode Enable
// bit1: (R/W)	When READ -> Only in Audio Recording mode, audio interrupt status bit
//				When WRITE-> Only in Audio Recording mode, toggling this bit make jpeg_header flag in FGPA clear
//				Actually, this bit is generated by audio FPGA and used by FPGA,
//				but this bit MUST be cleared by firmware by toggling (1->0).
	#define AUD_B0_MD_RECORD	0x00
	#define AUD_B0_MD_PLAY		0x01
	#define AUD_B1_CLEAR_H		0x02

#define AUDIO_START_REGISTER XBYTE[0x8003]
// bit0: (R/W)	0 -> FPGA audio part reset (every internal variables are cleared
//				1 -> start audio recording or playing (make audio FPGA interrupt)
// bit1: (R/W)	When READ and it is 1 --> audio FPGA is playing audio data and firmware code MUST not activate VIDEO decoding
//									0 --> audio FPGA is not playing any audio data
//				When WRITE, 1 --> FF mode set for FPGA to skip audio packet
//							0 --> Audio FPGA is doing normal audio playing.
	#define AUD_B0_START		0x01
	#define AUD_B0_RESET		0x00
	#define AUD_B1_SKIP			0x02
	#define AUD_B1_BUSY			0x02


u8 gv_audio_reg_play=0;
u8 gv_audio_run=0;
u8 gv_audio_IDE_busy=0;
u8 gv_audif = FALSE;

extern void hdd_pre_write(u8 aud_rec_intr);

void _audioif_clear_IDE_request(void)
{
	delay_time(G1REC4KTIME,1);
	hdd_pre_write(1);
	audioif_get_IDE(0x00);
	delay_time(G1REC4KTIME,1);
	// We don't need to release audio IDE because audio part of G1P release IDE automatically
}

/*
###############################################################################
Reset all of the internal variables in audio FPGA
###############################################################################
*/
void audioif_reset(void)
{
	// clear global variables
	gv_audio_reg_play = 0;
	gv_audio_run = 0;
	gv_audio_IDE_busy = 0;

	if(!gv_audif) return;

#ifdef DEBUG_AUDIOIF
	printf("\n\raudioif_reset");
#endif
	audio_enable();
	
	// check audio record intrrupt is pending
	if(AUDIO_PLAY_REGISTER & 0x02) 
	// audio interrupt happen but caller of this function want to stop recording.
	// So we have to give a change to audio block to write audio data onto IDE bus
	{
		_audioif_clear_IDE_request();
	}	
	
	AUDIO_INT_REGISTER = AUD_B0_ENALBE; // G1P
	AUDIO_START_REGISTER = AUD_B0_RESET;
	delay_time(10,1);
	AUDIO_PLAY_REGISTER  = AUD_B0_MD_RECORD;
	dv03_enable();

}

/*
###############################################################################
Start audio recording/playing
Input: mode
	0x00 for recording
	0x01 for playing
###############################################################################
*/
void audioif_start(u8 mode)
{
	if(!gv_audif) return;
	
#ifdef DEBUG_AUDIOIF
	printf("\n\raudioif_start(%d)", (int)mode);
#endif

	audio_enable();
	AUDIO_START_REGISTER = AUD_B0_RESET; // Clear Internal Buffer and variable
	delay_time(30,1);
	AUDIO_PLAY_REGISTER = mode;
	AUDIO_START_REGISTER = AUD_B0_START;
	delay_time(30,1);
	dv03_enable();
	
}


/*
###############################################################################
Return audio play register value
###############################################################################
*/
u8 audioif_get_regPLAY(void)
{
	xdata u8 ret;

	if(!gv_audif) return 0;
#ifdef DEBUG_AUDIOIF
	printf("\n\raudioif_get_regPLAY");
#endif
	audio_enable();
	ret = AUDIO_PLAY_REGISTER;
	dv03_enable();
	return ret;
}
/*
###############################################################################
Clear the internal flag [jpeg_header_flag] in audio FPGA.
This function will be called every interrupt.
Input:
		mode : 0x00 in recording mode
			   0x01 in playing mode
###############################################################################
*/
void audioif_clear_internal_flag(u8 mode)
{
	if(!gv_audif) return;
#ifdef DEBUG_AUDIOIF
	printf("\n\raudioif_clear_internal_flag(%d)", (int)mode);
#endif
	audio_enable();
	AUDIO_PLAY_REGISTER = AUD_B1_CLEAR_H | mode;
	delay_time(3,1);
	AUDIO_PLAY_REGISTER = mode;
	dv03_enable();
}

/*
###############################################################################
Start transferring audio data from/to HDD using IDE bus
Input:
		mode : 0x00 in recording mode
			   0x02 in playing mode
###############################################################################
*/
void audioif_get_IDE(u8 mode)
{
	if(!gv_audif) return;
	audio_enable();
	AUDIO_BUS_REGISTER = mode | AUD_B0_AUDIO_IDE;
	dv03_enable();
}

/*
void audioif_release_IDE(u8 mode)
{
	if(!gv_audif) return;
	audio_enable();
	AUDIO_BUS_REGISTER = mode;
	dv03_enable();
}
*/

/*
###############################################################################
Clear audio itnerrupt by reading audio interrupt register
###############################################################################
*/
u8 audioif_clear_interrupt(void)
{
	xdata u8 ret;

	if(!gv_audif) return 0;

	audio_enable();

	ret = AUDIO_INT_REGISTER;

	dv03_enable();
	return ret;
}


/*
###############################################################################
Stop audio recording/playing
###############################################################################
*/
void audioif_skip_mode(void)
{
	if(!gv_audif) return;
#ifdef DEBUG_AUDIOIF
	printf("\n\raudioif_skip_mode");
#endif
	audio_enable();
	AUDIO_START_REGISTER = AUD_B1_SKIP | AUD_B0_RESET;
	dv03_enable();

	gv_audio_run = 0;
}

/*
###############################################################################
Check audio FPGA is busy
###############################################################################
*/
u8 audioif_IDE_busy(void)
{
	xdata u8 ret;

	if(!gv_audif) return 0;

	audio_enable();
	ret = (AUDIO_START_REGISTER & AUD_B1_BUSY)>>1;
	dv03_enable();
	return ret;
}




/*
###############################################################################
Initialize audio chip
###############################################################################
*/
void audioif_chip_init(void)
{
	if(!gv_audif) return;
#ifdef DEBUG_AUDIOIF
	printf("\n\raudioif_chip_init");
#endif
	i2c_pkt_write(0xe2, 0x00, 0x99);
	i2c_pkt_write(0xe2, 0x01, 0x91); /* 0x93 */
	i2c_pkt_write(0xe2, 0x02, 0x58);
	i2c_pkt_write(0xe2, 0x03, 0x60);

	// default value of TLV320AIC1110 audio codec chip
	// offset	value
	// 0x00		0xf6
	// 0x01		0x02
	// 0x02		0x40
	// 0x03		0xa0
	// 0x04		0x00
	// 0x05		0x00
	// 0x06		0x00
}

/*
###############################################################################
Mute audio chip
###############################################################################
*/
void audioif_mute(u8 flag)
{
	if(!gv_audif) return;
#ifdef DEBUG_AUDIOIF
	printf("\n\raudioif_mute(%d)", (int)flag);
#endif
	i2c_pkt_write(0xe2, 0x00, (flag)?0x9D:0x99);
}


//###############################################################################
//change audio source channel
//###############################################################################
#ifdef USE_4954_GP
extern BYTE Val_EPROM_AUDIO_CH;
#include "cs4954.h"
void audio_ch_sel(void)
{
    #ifdef USE_4954
	cs4954_write(0x0A,Val_EPROM_AUDIO_CH&0x03);
    #endif

#ifdef DEBUG_4AUD
	printf("\r\nSET AUDIO CH : 0x%02X (0x%02X)",
		(WORD)Val_EPROM_AUDIO_CH&0x03,
		(WORD)cs4954_read(0x0A)
		);
#endif
}
#endif