?? c8051f300.inc
字號:
;-----------------------------------------------------------------------------
;
;
;
;
; FILE NAME : C8051F300.INC
; TARGET MCU : C8051F300, 'F301, 'F302, 'F303.
; DESCRIPTION : Register/bit definitions for the C8051F3xx product family.
;
; REVISION 1.01 7/11/02
;
;-----------------------------------------------------------------------------
;REGISTER DEFINITIONS
;
P0 DATA 080H ; PORT 0
SP DATA 081H ; STACK POINTER
DPL DATA 082H ; DATA POINTER - LOW BYTE
DPH DATA 083H ; DATA POINTER - HIGH BYTE
PCON DATA 087H ; POWER CONTROL
TCON DATA 088H ; TIMER CONTROL
TMOD DATA 089H ; TIMER MODE
TL0 DATA 08AH ; TIMER 0 - LOW BYTE
TL1 DATA 08BH ; TIMER 1 - LOW BYTE
TH0 DATA 08CH ; TIMER 0 - HIGH BYTE
TH1 DATA 08DH ; TIMER 1 - HIGH BYTE
CKCON DATA 08EH ; CLOCK CONTROL
PSCTL DATA 08FH ; PROGRAM STORE R/W CONTROL
SCON0 DATA 098H ; SERIAL PORT CONTROL
SBUF0 DATA 099H ; SERIAL PORT BUFFER
CPT0MD DATA 09DH ; COMPARATOR 0 MODE
CPT0MX DATA 09FH ; COMPARATOR 0 MUX
P0MDOUT DATA 0A4H ; PORT 0 OUTPUT MODE
IE DATA 0A8H ; INTERRUPT ENABLE
OSCXCN DATA 0B1H ; EXTERNAL OSCILLATOR CONTROL
OSCICN DATA 0B2H ; INTERNAL OSCILLATOR CONTROL
OSCICL DATA 0B3H ; INTERNAL OSCILLATOR CALIBRATION
FLSCL DATA 0B6H ; FLASH SCALE
FLKEY DATA 0B7H ; FLASH LOCK & KEY
IP DATA 0B8H ; INTERRUPT PRIORITY
AMX0SL DATA 0BBH ; ADC 0 MUX CHANNEL SELECTION
ADC0CF DATA 0BCH ; ADC 0 CONFIGURATION
ADC0 DATA 0BEH ; ADC 0 DATA
SMB0CN DATA 0C0H ; SMBUS CONTROL
SMB0CF DATA 0C1H ; SMBUS CONFIGURATION
SMB0DAT DATA 0C2H ; SMBUS DATA
ADC0GT DATA 0C4H ; ADC0 GREATER-THAN
ADC0LT DATA 0C6H ; ADC0 LESS-THAN
TMR2CN DATA 0C8H ; TIMER 2 CONTROL
TMR2RLL DATA 0CAH ; TIMER 2 RELOAD LOW
TMR2RLH DATA 0CBH ; TIMER 2 RELOAD HIGH
TMR2L DATA 0CCH ; TIMER 2 LOW BYTE
TMR2H DATA 0CDH ; TIMER 2 HIGH BYTE
PSW DATA 0D0H ; PROGRAM STATUS WORD
REF0CN DATA 0D1H ; VOLTAGE REFERENCE 0 CONTROL
PCA0CN DATA 0D8H ; PCA0 CONTROL
PCA0MD DATA 0D9H ; PCA0 MODE
PCA0CPM0 DATA 0DAH ; PCA0 MODULE 0 MODE
PCA0CPM1 DATA 0DBH ; PCA0 MODULE 1 MODE
PCA0CPM2 DATA 0DCH ; PCA0 MODULE 2 MODE
ACC DATA 0E0H ; ACCUMULATOR
XBR0 DATA 0E1H ; DIGITAL CROSSBAR CONFIGURATION REGISTER 0
XBR1 DATA 0E2H ; DIGITAL CROSSBAR CONFIGURATION REGISTER 1
XBR2 DATA 0E3H ; DIGITAL CROSSBAR CONFIGURATION REGISTER 2
IT01CF DATA 0E4H ; INT0/INT1 CONFIGURATION
EIE1 DATA 0E6H ; EXTENDED INTERRUPT ENABLE 1
ADC0CN DATA 0E8H ; ADC 0 CONTROL
PCA0CPL1 DATA 0E9H ; PCA0 MODULE 1 CAPTURE/COMPARE REGISTER LOW BYTE
PCA0CPH1 DATA 0EAH ; PCA0 MODULE 1 CAPTURE/COMPARE REGISTER HIGH BYTE
PCA0CPL2 DATA 0EBH ; PCA0 MODULE 2 CAPTURE/COMPARE REGISTER LOW BYTE
PCA0CPH2 DATA 0ECH ; PCA0 MODULE 2 CAPTURE/COMPARE REGISTER HIGH BYTE
RSTSRC DATA 0EFH ; RESET SOURCE
B DATA 0F0H ; B REGISTER
P0MDIN DATA 0F1H ; PORT 0 INPUT MODE REGISTER
EIP1 DATA 0F6H ; EXTENDED INTERRUPT PRIORITY 1
CPT0CN DATA 0F8H ; COMPARATOR 0 CONTROL
PCA0L DATA 0F9H ; PCA0 COUNTER REGISTER LOW BYTE
PCA0H DATA 0FAH ; PCA0 COUNTER REGISTER HIGH BYTE
PCA0CPL0 DATA 0FBH ; PCA0 MODULE 0 CAPTURE/COMPARE REGISTER LOW BYTE
PCA0CPH0 DATA 0FCH ; PCA0 MODULE 0 CAPTURE/COMPARE REGISTER HIGH BYTE
;
;------------------------------------------------------------------------------
;BIT DEFINITIONS
;
; TCON 88H
IT0 BIT TCON.0 ; EXT INTERRUPT 0 TYPE
IE0 BIT TCON.1 ; EXT INTERRUPT 0 EDGE FLAG
IT1 BIT TCON.2 ; EXT INTERRUPT 1 TYPE
IE1 BIT TCON.3 ; EXT INTERRUPT 1 EDGE FLAG
TR0 BIT TCON.4 ; TIMER 0 ON/OFF CONTROL
TF0 BIT TCON.5 ; TIMER 0 OVERFLOW FLAG
TR1 BIT TCON.6 ; TIMER 1 ON/OFF CONTROL
TF1 BIT TCON.7 ; TIMER 1 OVERFLOW FLAG
;
; SCON0 98H
RI0 BIT SCON0.0 ; RECEIVE INTERRUPT FLAG
TI0 BIT SCON0.1 ; TRANSMIT INTERRUPT FLAG
RB80 BIT SCON0.2 ; RECEIVE BIT 8
TB80 BIT SCON0.3 ; TRANSMIT BIT 8
REN0 BIT SCON0.4 ; RECEIVE ENABLE
MCE0 BIT SCON0.5 ; MULTIPROCESSOR COMMUNICATION ENABLE
S0MODE BIT SCON0.7 ; SERIAL MODE CONTROL BIT 0
;
; IE A8H
EX0 BIT IE.0 ; EXTERNAL INTERRUPT 0 ENABLE
ET0 BIT IE.1 ; TIMER 0 INTERRUPT ENABLE
EX1 BIT IE.2 ; EXTERNAL INTERRUPT 1 ENABLE
ET1 BIT IE.3 ; TIMER 1 INTERRUPT ENABLE
ES0 BIT IE.4 ; UART0 INTERRUPT ENABLE
ET2 BIT IE.5 ; TIMER 2 INTERRUPT ENABLE
EA BIT IE.7 ; GLOBAL INTERRUPT ENABLE
;
; IP B8H
PX0 BIT IP.0 ; EXTERNAL INTERRUPT 0 PRIORITY
PT0 BIT IP.1 ; TIMER 0 PRIORITY
PX1 BIT IP.2 ; EXTERNAL INTERRUPT 1 PRIORITY
PT1 BIT IP.3 ; TIMER 1 PRIORITY
PS0 BIT IP.4 ; UART0 PRIORITY
PT2 BIT IP.5 ; TIMER 2 PRIORITY
;
; SMB0CN C0H
SI BIT SMB0CN.0 ; SMBUS INTERRUPT FLAG
ACK BIT SMB0CN.1 ; ACKNOWLEDGE FLAG
ARBLOST BIT SMB0CN.2 ; ARBITRATION LOST INDICATOR
ACKRQ BIT SMB0CN.3 ; ACKNOWLEDGE REQUEST
STO BIT SMB0CN.4 ; STOP FLAG
STA BIT SMB0CN.5 ; START FLAG
TXMODE BIT SMB0CN.6 ; TRANSMIT MODE INDICATOR
MASTER BIT SMB0CN.7 ; MASTER/SLAVE INDICATOR
;
; TMR2CN C8H
T2XCLK BIT TMR2CN.0 ; TIMER 2 EXTERNAL CLOCK SELECT
TR2 BIT TMR2CN.2 ; TIMER 2 ON/OFF CONTROL
T2SPLIT BIT TMR2CN.3 ; TIMER 2 SPLIT MODE ENABLE
TF2LEN BIT TMR2CN.5 ; TIMER 2 LOW BYTE INTERRUPT ENABLE
TF2L BIT TMR2CN.6 ; TIMER 2 LOW BYTE OVERFLOW FLAG
TF2H BIT TMR2CN.7 ; TIMER 2 HIGH BYTE OVERFLOW FLAG
;
; PSW D0H
P BIT PSW.0 ; ACCUMULATOR PARITY FLAG
F1 BIT PSW.1 ; USER FLAG 1
OV BIT PSW.2 ; OVERFLOW FLAG
RS0 BIT PSW.3 ; REGISTER BANK SELECT 0
RS1 BIT PSW.4 ; REGISTER BANK SELECT 1
F0 BIT PSW.5 ; USER FLAG 0
AC BIT PSW.6 ; AUXILIARY CARRY FLAG
CY BIT PSW.7 ; CARRY FLAG
;
; PCA0CN D8H
CCF0 BIT PCA0CN.0 ; PCA0 MODULE 0 CAPTURE/COMPARE FLAG
CCF1 BIT PCA0CN.1 ; PCA0 MODULE 1 CAPTURE/COMPARE FLAG
CCF2 BIT PCA0CN.2 ; PCA0 MODULE 2 CAPTURE/COMPARE FLAG
CR BIT PCA0CN.6 ; PCA0 COUNTER RUN CONTROL
CF BIT PCA0CN.7 ; PCA0 COUNTER OVERFLOW FLAG
;
; ADC0CN E8H
AD0CM0 BIT ADC0CN.0 ; ADC0 CONVERSION MODE SELECT 0
AD0CM1 BIT ADC0CN.1 ; ADC0 CONVERSION MODE SELECT 1
AD0CM2 BIT ADC0CN.2 ; ADC0 CONVERSION MODE SELECT 2
AD0WINT BIT ADC0CN.3 ; ADC0 WINDOW COMPARE INTERRUPT FLAG
AD0BUSY BIT ADC0CN.4 ; ADC0 BUSY FLAG
AD0INT BIT ADC0CN.5 ; ADC0 CONVERISION COMPLETE INTERRUPT FLAG
AD0TM BIT ADC0CN.6 ; ADC0 TRACK MODE
AD0EN BIT ADC0CN.7 ; ADC0 ENABLE
;
; CPT0CN F8H
CP0HYN0 BIT CPT0CN.0 ; NEGATIVE HYSTERESIS 0
CP0HYN1 BIT CPT0CN.1 ; NEGATIVE HYSTERESIS 1
CP0HYP0 BIT CPT0CN.2 ; POSITIVE HYSTERESIS 0
CP0HYP1 BIT CPT0CN.3 ; POSITIVE HYSTERESIS 1
CP0FIF BIT CPT0CN.4 ; FALLING-EDGE INTERRUPT FLAG
CP0RIF BIT CPT0CN.5 ; RISING-EDGE INTERRUPT FLAG
CP0OUT BIT CPT0CN.6 ; COMPARATOR0 OUTPUT STATE
CP0EN BIT CPT0CN.7 ; COMPARATOR0 ENABLE
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