Peripheral Support Library -- Update Information
Last update: July 9, 1998 (1.30)

This page contains the changes made to the library source files included
in the archive dev6x.src.

The following files are provided:
    dev6x.src   -- archive of current source files
    dev6x.lib   -- little endian library, small memory model
    dev6xe.lib  -- big endian library, small memory model

============================================================================
UPDATE INFORMATION
============================================================================

============================================================================
HEADER FILES: 
============================================================================

cache.h: 
    <none>

----------------------------------------------------------------------------

dma.h:
    Changed DMA_INDX2 to DMA_INDXA and DMA_IND3 to DMA_INDXB.
    -----> Updated to match current TI peripheral documentation

    Deleted DMA_GCTRL_ADDR since there isn't a global control
    register. DMA_AUXCR_ADDR should be used instead.
    -----> Only a name change, not functional change.

    Deleted DMA_GCTRL since it isn't a global control register.
    DMA_AUXCR should be used instead.
    -----> Only a name change, not a functional change.

    Changed dma_global_init() "gcr" variable name to "auxcr".
    -----> Only a name change, not a functional change.

    Added #define DMA_AUX_CTRL
            *(volatile unsigned int *)DMA_AUX_CTRL_ADDR
    -----> Macro was added for consistency with other DMA regs.

    Added #define DMA_RELOAD_GARD 0x03
     -----> Global Address Register D was not included in reload
            list

    Included DMA_GCTRL register in dma_global_init routine
     -----> Register was left out

    Changed "#define  RDOPR_IE  9"
         to "#define  RDROP_IE  9"
     -----> Misspelling

    Changed "for (chan = 0; chan < DMA_CH3; chan++)"
         to "for (chan = 0; chan <= DMA_CH3; chan++)"
     -----> Channel 3 was left out of the reset

    Changed *(unsigned int *)(DMA_SECONDARY_CTRL_ADDR(chan)=0x00;
         to *(unsigned int *)(DMA_SECONDARY_CTRL_ADDR(chan)=0x80;
     -----> Sec Control Register reset value is 0x80 (BLOCK IE = 1)

    Removed extra (unneeded) "return" statements

----------------------------------------------------------------------------

emif.h: 
    Removed #define TA and #define TA_SZ
     -----> TA is no longer supported.

    Removed #define CLK2INV and #define SDCINV
     -----> These bitfields are no longer supported.

    Changed "LOAD_FIELD(EMIF_SDRAM_REF_ADDR, val)"
         to "LOAD_FIELD(EMIF_SDRAM_REF_ADDR, val, PERIOD,PERIOD_SZ)"
     -----> Fields were left out of the LOAD_FIELD macro call

    Changed "#define WRTIE_STROBE_SZ"
         to "#define WRITE_STROBE_SZ"
     -----> Misspelling
  
----------------------------------------------------------------------------

intr.h:
    Changed intr_hook() parameter name from "intr_num" to
    "cpu_intr" for consistency with other routines' parameters.

    Changed "intr_get_isn" to "intr_isn" in intr_get_cpu_intr().

    Changed "#define IMH_RESET_VAL 0x08202d4b"
         to "#define IMH_RESET_VAL 0x08202d43"
     -----> INTSEL10 incorrectly set

    Changed INTR_MAP_RESET macro
         to #define INTR_MAP_RESET() \
           { REG_WRITE (INTR_MULTIPLEX_HIGH_ADDR,IMH_RESET_VAL); \
             REG_WRITE (INTR_MULTIPLEX_LOW_ADDR, IML_RESET_VAL);}
     -----> Interrupt multiplexer registers improperly reset

    Added global variables for new interrupt jump table (intr.c):
         extern unsigned int NMI, RESV1, RESV2;
         extern unsigned int unexp_int04, unexp_int05, unexp_int06;
         extern unsigned int unexp_int07, unexp_int08, unexp_int09;
         extern unsigned int unexp_int10, unexp_int11, unexp_int12;
         extern unsigned int unexp_int13, unexp_int14, unexp_int15;
     -----> Interrupt handling was redone.

    Changed "CLEAR_BIT(EXTERNAL_INTR_POL_ADDR, bit)"
         to "RESET_BIT(EXTERNAL_INTR_POL_ADDR, bit)"
     -----> There is no CLEAR_BIT macro

----------------------------------------------------------------------------

mcbsp.h: 
    Changed CLKSTP definition from 10 to 11.
    Changed CLKSTP_SZ definition from 3 to 2.
     -----> Fixed problem associated with typo in previous
            Peripheral Reference Guide

    Changed McBSP address macros to use "port_no" instead of "port"
            parameter for consistency with documentation and other code.
     -----> No functional change.

    Added #define CLK_MODE_CLKS 0x00
      and #define CLK_MODE_CPU  0x01
     -----> Used in programming SRGR

    Redefined CLKS_POL_FALLING to 0x01
          and CLKS_POL_RISING  to 0x00
     -----> Assignments were swapped

----------------------------------------------------------------------------

regs.h: 
    <none>

----------------------------------------------------------------------------

timer.h:
    <none>

  
============================================================================
C CODE FILES: 
============================================================================
dma.c:
    Changed "DMA_GCR" to "DMA_AUXCR" and "gcr" to "auxcr"
    -----> Register is an auxiliary DMA register not global.
           Only a name change, not a functional change.

    Changed dma_init() "channel" parameter to "chan" for
            consistency with documentation and other routines.
    -----> No functional change.

    Changed "for (chan = 0; chan < DMA_CH3; chan++)"
         to "for (chan = 0; chan <= DMA_CH3; chan++)"
    -----> Channel 3 was left out of the reset

    Changed *(unsigned int*)(DMA_SECONDARY_CTRL_ADDR(chan) = 0x00
         to *(unsigned int*)(DMA_SECONDARY_CTRL_ADDR(chan) = 0x80
    -----> Sec Control Register reset value is 0x80 (BLOCK IE=1)

    Included DMA_GCTRL register in dma_global_init routine
     -----> Register was left out

----------------------------------------------------------------------------

emif.c: 
    <none>

----------------------------------------------------------------------------

intr.c: 
    Changed intr_hook() parameter name from "intr_num" to
    "cpu_intr" for consistency with other routines' parameters.

    Changed subroutine header for intr_isn() from "INTR_GET_ISN"
    to "INTR_ISN".

    Removed "unhooked_isr" subroutine
     -----> Was intended for library test purposes only

    Changed isr_jump_table variable assignment to:
     unsigned int isr_jump_table[16] = {
                (unsigned int) c_int00,
                (unsigned int) (&NMI),
                (unsigned int) (&RESV1),
                (unsigned int) (&RESV2),
                (unsigned int) (&unexp_int04),
                (unsigned int) (&unexp_int05),
                (unsigned int) (&unexp_int06),
                (unsigned int) (&unexp_int07),
                (unsigned int) (&unexp_int08),
                (unsigned int) (&unexp_int09),
                (unsigned int) (&unexp_int10),
                (unsigned int) (&unexp_int11),
                (unsigned int) (&unexp_int12),
                (unsigned int) (&unexp_int13),
                (unsigned int) (&unexp_int14),
                (unsigned int) (&unexp_int15)};
    -----> Interrupt handling was redone

    Added check for (intr_num > 0) in intr_hook() routine.
    -----> Negative values would previously corrupt memory

----------------------------------------------------------------------------

mcbsp.c: 
    Changed mcsp_init to mcbsp_init
     -----> misspelling

----------------------------------------------------------------------------

timer.c: 
    <none>


============================================================================
ASM FILES: 
============================================================================

_intr.asm: 
    The Interrupt Service Table setup was redone to allow for large memory
    model.

    Unhooked interrupt vectors branch to default interrupt handler traps
    instead of ignoring interrupt.

    Added optional ".res" section to support non-zero interrupt
    service table base address.

----------------------------------------------------------------------------