?? nand.c
字號(hào):
NF_CMD(0x10); // Write 2nd command
NF_DETECT_RB();
NF_CMD(0x70); // Read status command
for(i=0;i<3;i++); //twhr=60ns
if (NF_RDDATA()&0x1) {// Page write error
printf("[PROGRAM_ERROR:block#=%d]\n",block);
NF8_MarkBadBlock(block);
NF_nFCE_H();
return FAIL;
} else {
NF_nFCE_H();
return OK;
}
*/
NF_MECC_Lock();
// Get ECC data.
// Spare data for 8bit
// byte 0 1 2 3 4 5 6 7 8 9
// ecc [0] [1] [2] [3] x [Bad marking] SECC0 SECC1
Mecc = rNFMECC0;
se8Buf[0]=(U8)(Mecc&0xff);
se8Buf[1]=(U8)((Mecc>>8) & 0xff);
se8Buf[2]=(U8)((Mecc>>16) & 0xff);
se8Buf[3]=(U8)((Mecc>>24) & 0xff);
se8Buf[5]=0xff; // Marking good block
NF_SECC_UnLock();
//Write extra data(ECC, bad marking)
for(i=0;i<4;i++) {
NF_WRDATA8(se8Buf[i]); // Write spare array(Main ECC)
NF8_Spare_Data[i]=se8Buf[i];
}
NF_SECC_Lock();
Secc=rNFSECC;
se8Buf[8]=(U8)(Secc&0xff);
se8Buf[9]=(U8)((Secc>>8) & 0xff);
for(i=4;i<16;i++) {
NF_WRDATA8(se8Buf[i]); // Write spare array(Spare ECC and Mark)
NF8_Spare_Data[i]=se8Buf[i];
}
NF_CLEAR_RB();
NF_CMD(0x10); // Write 2nd command
// NF_DETECT_RB();
while(NFConDone==0);
rNFCONT&=~(1<<9);
rNFCONT&=~(1<<10); // Disable Illegal Access Interrupt
if(rNFSTAT&0x20) return FAIL;
NF_CMD(0x70); // Read status command
for(i=0;i<3;i++); //twhr=60ns
if (NF_RDDATA()&0x1) {// Page write error
NF_nFCE_H();
printf("[PROGRAM_ERROR:block#=%d]\n",block);
NF8_MarkBadBlock(block);
return FAIL;
} else {
NF_nFCE_H();
return OK;
}
}
static U16 NF8_CheckId(void)
{
int i;
U16 id, id4th;
NF_nFCE_L();
NF_CMD(0x90);
NF_ADDR(0x0);
for (i=0; i<10; i++);
printf("NFSTAT: 0x%x\n", rNFSTAT);
id=NF_RDDATA8()<<8; // Maker code 0xec
id|=NF_RDDATA8(); // Devide code(K9S1208V:0x76), (K9K2G16U0M:0xca)
NF_nFCE_H();
return id;
}
void Nand_Reset(void)
{
int i;
NF_nFCE_L();
NF_CLEAR_RB();
NF_CMD(0xFF); //reset command
for(i=0;i<10;i++); //tWB = 100ns. //??????
NF_DETECT_RB();
NF_nFCE_H();
}
static void NF8_Init(void)
{
// for S3C2413
rNFCONF = (TACLS<<12)|(TWRPH0<<8)|(TWRPH1<<4)|(0<<0);
// TACLS [14:12] CLE&ALE duration = HCLK*TACLS.
// TWRPH0 [10:8] TWRPH0 duration = HCLK*(TWRPH0+1)
// TWRPH1 [6:4] TWRPH1 duration = HCLK*(TWRPH1+1)
// AdvFlash(R) [3] Advanced NAND, 0:256/512, 1:1024/2048
// PageSize(R) [2] NAND memory page size
// when [3]==0, 0:256, 1:512 bytes/page.
// when [3]==1, 0:1024, 1:2048 bytes/page.
// AddrCycle(R) [1] NAND flash addr size
// when [3]==0, 0:3-addr, 1:4-addr.
// when [3]==1, 0:4-addr, 1:5-addr.
// BusWidth(R/W) [0] NAND bus width. 0:8-bit, 1:16-bit.
//rNFCONT = (0<<17)|(0<<16)|(0<<10)|(0<<9)|(0<<8)|(1<<7)|(1<<6)|(1<<5)|(1<<4)|(1<<1)|(1<<0);
rNFCONT = (0<<17)|(0<<16)|(0<<10)|(0<<9)|(0<<8)|(1<<7)|(1<<6)|(1<<5)|(1<<4)|(0x3<<1)|(1<<0);
// Lock-tight [17] 0:Disable lock, 1:Enable lock.
// Soft Lock [16] 0:Disable lock, 1:Enable lock.
// EnablillegalAcINT[10] Illegal access interupt control. 0:Disable, 1:Enable
// EnbRnBINT [9] RnB interrupt. 0:Disable, 1:Enable
// RnB_TrandMode[8] RnB transition detection config. 0:Low to High, 1:High to Low
// SpareECCLock [7] 0:Unlock, 1:Lock
// MainECCLock [6] 0:Unlock, 1:Lock
// InitMECC(W) [5] 1:Init main area ECC decoder/encoder.
// InitSECC(W) [4] 1:Init spare area ECC decoder/encoder.
// Reg_nCE1 [2] 0:nFCE=0, 1:nFCE=1.
// Reg_nCE0 [1] 0:nFCE=0, 1:nFCE=1.
// NANDC Enable [0] operating mode. 0:Disable, 1:Enable.
// rNFSTAT = 0;
// Nand_Reset();
}
void Test_MLC_ECC(void)
{
int i;
U32 block, page;
U32 blockPage, Mecc0, Mecc1, Secc;
//U8 *bufPt=buffer;
U8 *bufPt;
bufPt=(unsigned char *)0x31100000;
NFConDone=0;
rNFCONF = (rNFCONF & ~(1<<30))|(1<<24); // System Clock is more than 66Mhz, ECC type is MLC.
rNFCONT |= (1<<18); //ECC for programming.
rNFCONT|=(1<<9); // Enable RnB Interrupt
rNFCONT|=(1<<10); // Enable Illegal Access Interrupt
pISR_NFCON= (unsigned)NFCon_Int;
rSRCPND=BIT_NFCON;
rINTMSK=~(BIT_NFCON);
NF_RSTECC(); // Initialize ECC
NF_MECC_UnLock();
/////////////////////////////////////////////////
// block1, page0 writing with valid data, ecc /
/////////////////////////////////////////////////
block=1;
page=0;
blockPage=(block<<5)+page;
NF_nFCE_L();
NF_CMD(0x0);//??????
NF_CMD(0x80); // Write 1st command
NF_ADDR(0); // Column 0
NF_ADDR(blockPage&0xff); //
NF_ADDR((blockPage>>8)&0xff); // Block & page num.
NF_ADDR((blockPage>>16)&0xff); //
//NF_RSTECC(); // Initialize ECC
for(i=0;i<512;i++) {
NF_WRDATA8(i); // Write one page to NFM from buffer
}
//NF_MECC_Lock();
// Get ECC data.
// Spare data for 8bit
// byte 0 1 2 3 4 5 6 7 8 9
// ecc [0] [1] [2] [3] [4] [5] [6]
Mecc0 = rNFMECC0;
Mecc1 = rNFMECC1;
se8Buf[0]=(U8)(Mecc0&0xff);
se8Buf[1]=(U8)((Mecc0>>8) & 0xff);
se8Buf[2]=(U8)((Mecc0>>16) & 0xff);
se8Buf[3]=(U8)((Mecc0>>24) & 0xff);
se8Buf[4]=(U8)(Mecc1&0xff);
se8Buf[5]=(U8)((Mecc1>>8) & 0xff);
se8Buf[6]=(U8)((Mecc1>>16) & 0xff);
for(i=0;i<7;i++) {
NF_WRDATA8(se8Buf[i]); // Write spare array(Main ECC)
NF8_Spare_Data[i]=se8Buf[i];
}
for(i=7;i<16;i++) {
NF_WRDATA8(se8Buf[i]); // Write spare array(Spare ECC and Mark)
NF8_Spare_Data[i]=se8Buf[i];
}
while(!(rNFSTAT&(1<<7))) ;
NF_CLEAR_RB();
NF_CMD(0x10); // Write 2nd command
NF_DETECT_RB();
// while(NFConDone==0);
rNFCONT&=~(1<<9);
rNFCONT&=~(1<<10); // Disable Illegal Access Interrupt
if(rNFSTAT&0x20)
{
printf("Error\n");
return;
}
NF_CMD(0x70); // Read status command
for(i=0;i<3;i++); //twhr=60ns
if (NF_RDDATA8()&0x1) {// Page write error
NF_nFCE_H();
printf("first[PROGRAM_ERROR:block#=%d]\n",block);
NF8_MarkBadBlock(block);
return;
} else {
NF_nFCE_H();
}
/////////////////////////////////////////////////
// block1, page1 writing with invalid data, ecc /
/////////////////////////////////////////////////
NFConDone=0;
rSRCPND=BIT_NFCON;
rINTMSK=~(BIT_NFCON);
NF_RSTECC(); // Initialize ECC
NF_MECC_UnLock();
block=1;
page=1;
blockPage=(block<<5)+page;
NF_nFCE_L();
NF_CMD(0x0);//??????
NF_CMD(0x80); // Write 1st command
NF_ADDR(0); // Column 0
NF_ADDR(blockPage&0xff); //
NF_ADDR((blockPage>>8)&0xff); // Block & page num.
NF_ADDR((blockPage>>16)&0xff); //
//NF_RSTECC(); // Initialize ECC
#if 1 //1-bit Error
for(i=0;i<512;i++) {
if(i==511) {
NF_WRDATA8(254);
}
else {
NF_WRDATA8(i);
}
}
#elif 0 //2-bit Error
for(i=0;i<512;i++) {
if(i==0) {
NF_WRDATA8(1);
}
else if(i==1) {
NF_WRDATA8(0);
}
else {
NF_WRDATA8(i);
}
}
#elif 0 //3-bit Error
for(i=0;i<512;i++) {
if(i==10) {
NF_WRDATA8(11);
}
else if(i==11) {
NF_WRDATA8(10);
}
else if(i==128) {
NF_WRDATA8(129);
}
else {
NF_WRDATA8(i);
}
}
#elif 0 // 4-bit Error
for(i=0;i<512;i++) {
if(i==10) {
NF_WRDATA8(11);
}
else if(i==11) {
NF_WRDATA8(10);
}
else if(i==128) {
NF_WRDATA8(129);
}
else if(i==129) {
NF_WRDATA8(128);
}
else {
NF_WRDATA8(i);
}
}
#endif
//NF_MECC_Lock();
// Get ECC data.
// Spare data for 8bit
// byte 0 1 2 3 4 5 6 7 8 9
// ecc [0] [1] [2] [3] [4] [5] [6]
/*
Mecc0 = rNFMECC0;
Mecc1 = rNFMECC1;
se8Buf[0]=(U8)(Mecc0&0xff);
se8Buf[1]=(U8)((Mecc0>>8) & 0xff);
se8Buf[2]=(U8)((Mecc0>>16) & 0xff);
se8Buf[3]=(U8)((Mecc0>>24) & 0xff);
se8Buf[4]=(U8)(Mecc1&0xff);
se8Buf[5]=(U8)((Mecc1>>8) & 0xff);
se8Buf[6]=(U8)((Mecc1>>16) & 0xff);*/
Mecc0 = rNFMECC0;
Mecc1 = rNFMECC1;
for(i=0;i<7;i++) {
NF_WRDATA8(se8Buf[i]); // Write spare array(Main ECC)
NF8_Spare_Data[i]=se8Buf[i];
}
NF_SECC_Lock();
for(i=7;i<16;i++) {
NF_WRDATA8(se8Buf[i]); // Write spare array(Spare ECC and Mark)
NF8_Spare_Data[i]=se8Buf[i];
}
while(!(rNFSTAT&(1<<7))); // Wait until 4-bit ECC encoding is completed.
NF_CLEAR_RB();
NF_CMD(0x10); // Write 2nd command
NF_DETECT_RB();
//while(NFConDone==0);
rNFCONT&=~(1<<9);
rNFCONT&=~(1<<10); // Disable Illegal Access Interrupt
if(rNFSTAT&0x20) {
printf("Error\n");
return;
}
NF_CMD(0x70); // Read status command
for(i=0;i<30;i++); //twhr=60ns
if (NF_RDDATA8()&0x1) {// Page write error
NF_nFCE_H();
printf("Second[PROGRAM_ERROR:block#=%d]\n",block);
NF8_MarkBadBlock(block);
return;
} else {
NF_nFCE_H();
}
/////////////////////////////////////////////////
// block1, page1 reading with invalid data, ecc /
/////////////////////////////////////////////////
block=1;
page=1;
blockPage=(block<<5)+page;
rNFCONF = (rNFCONF & ~(1<<30))|(1<<24); // System Clock is more than 66Mhz, ECC type is MLC.
rNFCONT &= ~(1<<18); //ECC for reading.
NF_RSTECC(); // Initialize ECC
NF_MECC_UnLock();
NF_nFCE_L();
NF_CLEAR_RB();
NF_CMD(0x00); // Read command
NF_ADDR(0); // Column = 0
NF_ADDR(blockPage&0xff); //
NF_ADDR((blockPage>>8)&0xff); // Block & Page num.
NF_ADDR((blockPage>>16)&0xff); //
NF_DETECT_RB();
for(i=0;i<512;i++) {
*bufPt++=NF_RDDATA8(); // Read one page
}
for(i=0; i<7; i++)
{
*bufPt++=NF_RDDATA8();
}
while(!(rNFSTAT&(1<<6))); //wait until 4-bit ECC decoding is completed.
rNFSTAT |= (1<<6);
NF_nFCE_H();
if ((rNFECCERR0&(0x7<<26)) == 0x0){
printf("ECC OK!\n");
return;
}
else {
printf("ECC FAIL!\n");
printf("status0:0x%x|status1:0x%x|bit:0x%x\n", rNFECCERR0, rNFECCERR1, rNFMLCBITPT);
return;
}
}
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