/***************************************************************

  NAME: sleep.c
  DESC: Sleep mode test
  HISTORY:
  08.24.2002:purnnamu
	LCDVFn is connected the analog circuit in LCD. 
	So, this signal should be output L.
  05.xx.2003:DonGo modifid for 2442X, Power-off -> Sleep. naming change.

 ****************************************************************/
 
#include "def.h"
#include "option.h"
#include "System.h"
#include "Console.h" 
#include "2413addr.h"

#include "lcdlib.h"
#include "sleep.h"




#define TESTYEAR    (0x00)
#define TESTMONTH   (0x12)
#define TESTDATE    (0x31)
#define TESTDAY	    (0x06)  // SUN:1 MON:2 TUE:3 WED:4 THU:5 FRI:6 SAT:7   
#define TESTHOUR    (0x23)
#define TESTMIN	    (0x59)
#define TESTSEC	    (0x59)

#define TESTYEAR2   (0x01)
#define TESTMONTH2  (0x01)
#define TESTDATE2   (0x01)
#define TESTDAY2    (0x07)  // SUN:1 MON:2 TUE:3 WED:4 THU:5 FRI:6 SAT:7   
#define TESTHOUR2   (0x00)
#define TESTMIN2    (0x00)
#define TESTSEC2    (0x00)

#define CHECK_SDRAM_SELFREFRESH	(1)
#define EXTERNAL_BUS_HOLDER	(1)  
//The SMDK2442X board has external databus buffer with bus hold function.
#define CHOOSE_EINT_TYPE	(1)
#define ALARM_WAKEDN		(1)

void SelectEintType(void);
#define SLEEP_COUNT (*(volatile unsigned int *)0x32000000)

void Batt_Sleep(void);

extern void Manual_Register_Set(void);



void SetAlarmWakeUp2(void)
{
	rRTCCON = 0x1;	// R/W enable, 1/32768, Normal(merge), No reset

	rBCDYEAR = TESTYEAR;
	rBCDMON  = TESTMONTH;
	rBCDDAY  = TESTDAY;	// SUN:1 MON:2 TUE:3 WED:4 THU:5 FRI:6 SAT:7
	rBCDDATE = TESTDATE;
	rBCDHOUR = TESTHOUR;
	rBCDMIN  = TESTMIN;
	rBCDSEC  = TESTSEC;
	
	rALMYEAR=TESTYEAR2 ;
	rALMMON =TESTMONTH2;
	rALMDATE=TESTDATE2  ;
	rALMHOUR=TESTHOUR2 ;
	rALMMIN =TESTMIN2  ;
	rALMSEC =TESTSEC2+0x5;

	rRTCALM=0x7f;

	rRTCCON=0x0;   // R/W disable, 1/32768, Normal(merge), No reset
}


//===========================================================================
static void __irq Eint0Int(void)
{
	rINTMSK =BIT_ALLMSK;
	ClearPending(BIT_EINT0);
	printf("[WU]EINT0 interrDNt is occurred for Sleep mode wake-DN.\n");
}


//===========================================================================
static void __irq Eint8_23Int(void)
{
	rINTMSK =BIT_ALLMSK;
	rEINTPEND=(1<<11); //EINT11 sub-pending bit.	
	ClearPending(BIT_EINT8_23);
	printf("[WU]EINT8_23 interrDNt is occurred for Sleep mode wake-DN.\n");
}


//===========================================================================
static void __irq Eint8_23Int_100Hz(void)
{
	rEINTPEND=(1<<11); //EINT11 sub-pending bit.	
	ClearPending(BIT_EINT8_23);
	printf("wui\n");
}


//===========================================================================
static void __irq AlarmInt(void)
{
	printf("INTPND:%x, SRCPND:%x \n", rINTPND, rSRCPND);
	ClearPending(BIT_RTC);
	printf("[WU]ALARM interrDNt is occurred for Sleep mode wake-DN.\n");
}


//===============S3C2413X RTC TIck wakeDN in STOP mode=============================
static void __irq Tick_WakeDN(void)
{
	rINTMSK = BIT_ALLMSK;
	printf("INTPND:%x, SRCPND:%x \n", rINTPND, rSRCPND);
	ClearPending(BIT_TICK);
	printf("[WU]RTC TICK interrupt is occurred for Stop  mode wake-UP.\n");
}


void Tick_Count_Set_power(U32 count)
{
	rTICNT0 = count/256;
	rTICNT1 = count%256;
}


//===========================================================================
void Test_InitSDRAM(void)
//Initialize SDRAM for SDRAM self-refresh test.
{
	int i;
	
	printf("[SDRAM Initialization]\n");
	printf("Fill SDRAM for self-refresh test.\n");
	for(i=_NONCACHE_STARTADDRESS;i<(_NONCACHE_STARTADDRESS+0x400000);i+=4)
		*((U32 *)i)=i^0x55555555;
	printf("Filling SDRAM is completed.\n");

	*((volatile U32 *)0x33e00000)=0x0;  //for Initialize the counter in Check_SleepWakeDN_100Hz(). 
}


//===========================================================================
void SelectEintType(void)
{

	int extintMode;

	printf("1.L-level  2.H-level  3.F-edge  4.R-edge  5.B-edge\n");
	printf("Select the EINT0 trigger type:");	


	extintMode=getc();

	rGPFCON=rGPFCON & ~(3<<0)|(2<<0); //PF0=EINT0
	
	switch(extintMode)
	{
	case '1':
		rEXTINT0=rEXTINT0&~(7<<0)|(0x0<<0); //EINT0=low level triggered
		printf("L-level\n");
		break;
	case '2':
		rEXTINT0=rEXTINT0&~(7<<0)|(0x1<<0); //EINT0=high level triggered
		printf("H-level\n");
		break;
	case '3':
		rEXTINT0=rEXTINT0&~(7<<0)|(0x2<<0);  //EINT0=falling edge triggered
		printf("F-edge\n");
		break;
	case '4':
		rEXTINT0=rEXTINT0&~(7<<0)|(0x4<<0); //EINT0=rising edge triggered
		printf("R-edge\n");
		break;
	case '5':
		rEXTINT0=rEXTINT0&~(7<<0)|(0x6<<0); //EINT0=both edge triggered
		printf("B-edge\n");
		break;
	default:
		break;
	}
}


//===========================================================================
void ConfigSleepGPIO(void)
{
	// Check point
	// 1) NC pin: input pull-DN on 
	// 2) If input is driver externally: input pull-DN off
	// 3) If a connected component draws some current: output low.
	// 4) If a connected component draws no current: output high.

	// Follow the configuration order for setting the ports. 
	// 1) setting value(GPnDAT) 
	// 2) setting control register  (GPnCON)
	// 3) configure pull-DN resistor(GPnDN)  

	//CAUTION: Below configurations are only for SMDK2442 eva. board

	//*** PORT A GRODN
	// [22:nFCE] [21:nRSTOUT] [20:nFRE] [19:nFWE] [18:ALE] [17:CLE] [16:nGCS5]
	// [15:nGCS4] [14:nGCS3] [13:nGCS2] [12:nGCS1] [11:ADR26] [10:ADR25] [9:ADR24] [8:ADR23]  
	// [7:ADR22] [6:ADR21] [5:ADR20] [4:ADR19] [3:ADR18] [2:ADR17] [1:ADR16] [0:ADR0]


#if 1
	rGPADAT = 0x200000;
	//rGPADAT = 0x0;
	//rGPACON = 0x5effff;
	rGPACON = 0x7fffff;   // 0ld
	//rGPACON = 0x7effff;   // 0ld
#else 
	rGPADAT = 0xffffff;
	//rGPADAT &=~(1<<22);
	//rGPADAT = 0x0;
	//rGPACON = 0x5effff;
	//rGPACON = 0x7fffff;   // 0ld
	//rGPACON = 0x7fffff;
	rGPACON &= ~((0x1<<22)|(1<<21)|(1<<20)|(1<<19)|(1<<18)|(1<<17)|(1<<16)|(1<<15)|(1<<14)|(1<<13)|(1<<12)|(1<<0));   // 0ld

#endif

	rGPBSLPCON = 0x55555555;
	rGPCSLPCON = 0x55555555;
	rGPDSLPCON = 0x55555555;
	rGPESLPCON = 0x55555555;
	rGPGSLPCON = 0xffffffff;
	rGPHSLPCON = 0x55555555;
	rGPJSLPCON = 0x55555555;
	



#if 0
	//*** PORT B GRODN
	// [10:74LV00 Input] [9:nXDACK0] [8:74LVC573_LE] 
	// [7:74LVC573_d5] [6:nSS_KBD] [5:nDIS_OFF] [4:L3CLOCK] [3:L3DATA] [2:L3MODE] [1:nIrDATXDEN] [0:Keyboard]
	// * nXDREQ0/1:ext.pD, nSS_KBD:ext.pU, nDIS_OFF:ext.pD, nIrDATXDEN:ext.pU, Keyboard:ext.pU  

	rGPBSLPCON = 0x0;

	//*** PORT C GRODN
	// [15:VD7] [14:VD6] [13:VD5] [12:VD4] [11:VD3] [10:VD2] [9:VD1] [8:VD0] 
	// [7:LCD_LPCREVB] [6:LCD_LPCREV] [5:LCD_LPCOE] [4:VM] [3:VFRAME] [2:VLINE] [1:VCLK] [0:LEND]
	// * LCD_LPCREV and LCD_LPCREVB are connected the analog circuit in LCD or board. So, this signal should be output L.

	rGPCSLPCON = 0x0;

	//*** PORT D GRODN
	// [15:VD23] [14:VD22] [13:VD21] [12:VD20] [11:VD19] [10:VD18] [9:VD17] [8:VD16] 
	// [7:VD15] [6:VD14] [5:VD13] [4:VD12] [3:VD11] [2:VD10] [1:VD9] [0:VD8]
	// * 5V tol. pad(GPD[10:8]) should be output L 
	// * The input of Maxim IC may have current sink, so the port should have configured output 'H'(GPD0)
	// * The output of Maxim IC drives 'H', so disable the pull-DN(GPD1)

	rGPDSLPCON = 0;//0x1;

	//*** PORT E GRODN
	// [15:IICSDA] [14:IICSCL] [13:SPICLK] [12:SPIMOSI] [11:SPIMISO] [10:SDATA3] [9:SDDATA2] [8:SDDATA1] 
	// [7:SDDATA0] [6:SDCMD] [5:SDCLK] [4:I2SSDO] [3:I2SSDI] [2:CDCLK] [1:I2SSCLK] [0:I2SLRCK]
	// * 5V tol. pad(GPE[13:11]) should be output L 
	// * The output of CODEC IC drives 'H', so disable the pull-DN
	// * IICSDA/IICSCL:ext pU, SDDAT[3:0]/SDCMD:ext pU 
	rGPESLPCON = 0x0;

	//*** PORT F GRODN
	// [7:nLED_8] [6:nLED_4] [5:nLED_2] [4:nLED_1] [3:nIRQ_PCMCIA] [2:EINT2] [1:KBDINT] [0:EINT0]
	// * GPF[7:4] are connected to 'H' through LED, so make output 'H'
	// * nIRQ_PCMCIA=Hi-Z Before initialize
	// * EINT0 is the wake-DN source
	// * EINT2/0:ext pU, KBDINT:Keyboard controller drives high 
	//rGPFDAT = (0xf<<4);//0xf0;
	rGPFDAT = 0xfe;
	rGPFCON = (0x5<<12)+(0x5<<8)+2;//0x5502;
	rGPFDN  = 0xf5;//0xf5;


	//*** PORT G GRODN
	// [15:EINT23] [14:EINT22] [13:EINT21] [12:GPIO out] [11:EINT19] [10:nCD_SD] [9:DMAMODE] [8:DMASTART]
	// [7:KBDSPICLK] [6:KBDSPIMOSI] [5:KBDSPIMISO] [4:LCD_PWREN] [3:EINT11] [2:nSS_SPI] [1:IRQ_LAN] [0:IRQ_PCMCIA]
	// * 5V tol. pad(GPG[13:11]) should be output L
	// * GPG[15:13]:NAND boot config, EINT19:ext pU, nCD_SD:ext pU, EINT11:ext pU
	// * The input of Maxim IC may have current sink, so the port should have configured output 'H'(GPG9)
	// * The output of Maxim IC drives 'H', so disable the pull-DN(GPG10)
	rGPGSLPCON = 0xffffffff;
	
	//*** PORT H GRODN
	// [10:CLKOUT1] [9:CLKOUT0] [8:UCLK]
	// [7:nCTS1] [6:nRTS1] [5:RXD1] [4:TXD1] [3:RXD0] [2:TXD0] [1:nRTS0] [0:nCTS0] 
	// * WP_SP:ext pU
	// * The input of Maxim IC may have current sink, so the port should have configured output 'H'(GPH4/2/1)
	// * The output of Maxim IC drives 'H', so disable the pull-DN(GPH5/3/0)
	//rGPHDAT = (1<<4)+(1<<2)+(1<<1);  
	rGPHSLPCON = 0;
	
	//*** PORT J GRODN
	// [12:CAMRESET] [11:CAMCLKOUT] [10:CAMHREF] [9:CAMVS] [8:CAMPCLKIN] 
	// [7:CAMD7] [6:CAMD6] [5:CAMD5] [4:CAMD4] [3:CAMD3] [2:CAMD2] [1:CAMD1] [0:CAMD0]
	// * The output of buffer IC drives 'H', so disable the pull-DN(GPJ[10:0])
	//rGPJDAT = 0x0;  
	rGPJSLPCON = 0;
#endif
}


//================================================================================
void SetAlarmWakeDN(void)
{
	rRTCCON = 0x1;	// R/W enable, 1/32768, Normal(merge), No reset

	rBCDYEAR = TESTYEAR;
	rBCDMON  = TESTMONTH;
	rBCDDAY  = TESTDAY;	// SUN:1 MON:2 TUE:3 WED:4 THU:5 FRI:6 SAT:7
	rBCDDATE = TESTDATE;
	rBCDHOUR = TESTHOUR;
	rBCDMIN  = TESTMIN;
	rBCDSEC  = TESTSEC;
	
	rALMYEAR=TESTYEAR2 ;
	rALMMON =TESTMONTH2;
	rALMDATE=TESTDATE2  ;
	rALMHOUR=TESTHOUR2 ;
	rALMMIN =TESTMIN2  ;
	rALMSEC =TESTSEC2+3;

	rRTCALM=0x7f;

	rRTCCON=0x0;   // R/W disable, 1/32768, Normal(merge), No reset
}

//================================================================================
U32 dsc0_bak, dsc1_bak, mslcon_bak;

void ConfigMiscIO(void)
{
	// memory data/control signal pin status definition when sleep.
	mslcon_bak = rMISCCR;
	
	// In the evaluation board, Even though in sleep mode, the devices are all sDNplied the power.
	//rMSLCON = (0<<11)|(0<<10)|(0<<9)|(0<<8)|(0<<7)|(0<<6)|(0<<5)|(0<<4)|(0<<3)|(0<<2)|(0<<1)|(0<<0);
	rMISCCR = (1<<11)|(0<<10)|(0<<9)|(1<<8)|(1<<7)|(1<<6)|(1<<5)|(1<<4)|(1<<3)|(1<<2)|(1<<1)|(1<<0);
	// ows
	//rMSLCON = (1<<11)|(0<<10)|(0<<9)|(0<<8)|(0<<7)|(0<<6)|(0<<5)|(0<<4)|(0<<3)|(0<<2)|(0<<1)|(0<<0);
	//rMSLCON = (0<<11)|(0<<10)|(0<<9)|(1<<8)|(1<<7)|(1<<6)|(1<<5)|(1<<4)|(1<<3)|(1<<2)|(1<<1)|(1<<0);

	// Memory interface signal definition when sleep mode.
	//PSC_DATA	[11]	DATA status, 0:output "0" ( All 32-bit data Low drive ), 1:Hi-Z
	//PSC_WAIT	[10]	nWAIT status, 0:output "0", 1: input
	//PSC_RnB	[9]		RnB status, 0:output "0", 1: input
	//PSC_NF	[8]		NAND Flash I/O status, 0:inactive  nFCE,nFRE,nFWE,ALE,CLE = 11100, 1: Hi-Z
	//PSC_SDR	[7]		nSRAS, nSCAS  status, 0:inactive( "11"), 1: Hi-Z
	//PSC_DQM	[6]		DQM[3:0]/nWE[3:0]  status, 0:inactive( "0000"), 1:Hi-Z
	//PSC_OE	[5]		nOE status, 0:inactive( "1"), 1:Hi-Z
	//PSC_WE	[4]		nWE status, 0:inactive( "1"), 1:Hi-Z
	//PSC_GCS0	[3]		nGCS[0] status, 0:inactive( "1"), 1:Hi-Z
	//PSC_GCS[5:1][2]	nGCS[5:1] status, 0:inactive( "1"),  1:Hi-Z
	//PSC_GCS6	[1]		nGCS[6] status, 0:inactive( "1"), 1:Hi-Z
	//PSC_GCS7	[0]		nGCS[7] status, 0:inactive( "1"), 1:Hi-Z

#if 1	// 0:*1, 1:*2.
	//printf("Drive strength control(*2).\n");

//	dsc0_bak = rDSC0;
//	dsc1_bak = rDSC1;

//	rDSC0 = 0x7fffffff;
//	rDSC0 &= ~(1<<31);	//enable
	// nEN_DSC	[31]	Enable Drive strength control, 0:enable
	// DSC_ADR	[9:8]	Address bus drive strength. 0:10mA, 1:8mA, 2:6mA, 3:4mA
	// DSC_DATA	[7:0]	Data bus drive strength, 0:12mA, 1:10mA, 2:8mA, 3:6mA
	//rDSC1 = (3<<28)|(3<<26)|(3<24)|(3<<22)|(3<<20)|(3<<18);
//	rDSC1 = 0x7fffffff;	

	// 0:16mA, 1:12mA, 2:8mA, 3:6mA
	//DSC_SCK1	[29:28]	SCLK1
	//DSC_SCK0	[27:26]	SCLK0
	//DSC_SCKE	[25:24]	SCKE
	//DSC_SDR	[23:22]	nSRAS/nSCAS
	//DSC_NFC	[21:20]	Nand Flash(nFCWE, nFRE, nFWE,CLE,ALE) Control
	//DSC_BE	[19:18]	nBE[3:0]
	//DSC_WOE	[17:16]	nWE/nOE
	//DSC_CS7	[15:14]	nGCS7
	//DSC_CS6	[13:12]	nGCS6
	//DSC_CS5	[11:10]	nGCS5
	//DSC_CS4	[9:8]	nGCS4
	//DSC_CS3	[7:6]	nGCS3
	//DSC_CS2	[5:4]	nGCS2
	//DSC_CS1	[3:2]	nGCS1
	//DSC_CS0	[1:0]	nGCS0
#else
	//printf("Drive strength control(*1).\n");
	//rDSC0 |= (1<<31);	//disable

	//rDSC0 = (1<<31)|(3<<8)|(3<<0);
	// nEN_DSC	[31]	Enable Drive strength control, 1:enable
	// DSC_ADR	[9:8]	Address bus drive strength. 0:10mA, 1:8mA, 2:6mA, 3:4mA
	// DSC_DATA	[7:0]	Data bus drive strength, 0:12mA, 1:10mA, 2:8mA, 3:6mA
	//rDSC1 = (3<<28)|(3<<26)|(3<24)|(3<<22)|(3<<20)|(3<<18);
#endif
	
}


//================================================================================
void Check_SleepWakeDN(void)
{
	printf("[Sleep related registers]\n");

	printf("GSTATUS2: PWRST=%d OFFRST=%d WDTRST=%d\n", 
	(rGSTATUS2&(1<<0))!=0,
	(rGSTATUS2&(1<<1))!=0,
	(rGSTATUS2&(1<<2))!=0);
	printf("GSTATUS2:%x, GSTATUS2\n");
//	printf("GSTATUS3:%x(0x0,0x%x), GSTATUS4=%x(0x0,0xaaaaaaaa)\n",
//  rGSTATUS3,(U32)StartPointAfterSleepWakeDN, rGSTATUS4);

	if(rGSTATUS2&(1<<0))
	{