/*****************************************
  NAME: dma.c
  DESC: DMA memory2memory test
  HISTORY:
  2005.09.15:KIM, KI JUN: draft ver 0.0
 *****************************************/
#include <stdio.h>
#include <stdlib.h>

#include "2413addr.h"
#include "System.h"
#include "Exception.h"
#include "Console.h"
#include "def.h"
#include "Dma.h" 

static void __irq Dma0Done(void);
static void __irq Dma1Done(void);
static void __irq Dma2Done(void);
static void __irq Dma3Done(void);
void DMA_M2M(U32 ch,U32 s_addr, U32 d_addr, U32 tsz, U32 dsz, U32 tot_sz);

typedef struct tagDMA
{
    volatile U32 DISRC;	    //0x0
    volatile U32 DISRCC;    //0x4
    volatile U32 DIDST;	    //0x8
    volatile U32 DIDSTC;    //0xc
    volatile U32 DCON;	    //0x10
    volatile U32 DSTAT;	    //0x14
    volatile U32 DCSRC;	    //0x18
    volatile U32 DCDST;	    //0x1c
    volatile U32 DMASKTRIG; //0x20
    volatile U32 DMAREQSEL; //0x24
}DMA;

static volatile int dmaDone;

void Test_DMA(void)
{
	U32 ch;
	for(ch=0;ch<4;ch++)
	{
		DMA_M2M(ch, _NONCACHE_STARTADDRESS, _NONCACHE_STARTADDRESS+0x80000, BURST, BYTE,   0x80000);//Burst, Byte, 512KB
		DMA_M2M(ch, _NONCACHE_STARTADDRESS, _NONCACHE_STARTADDRESS+0x80000, BURST, DBYTE, 0x80000);	//Burst, DByte, 512KB
		DMA_M2M(ch, _NONCACHE_STARTADDRESS, _NONCACHE_STARTADDRESS+0x80000, BURST, FBYTE,  0x80000);//Burst, FByte, 512KB
		DMA_M2M(ch, _NONCACHE_STARTADDRESS, _NONCACHE_STARTADDRESS+0x80000, SINGLE,BYTE,   0x80000);//Single, Byte, 512KB
		DMA_M2M(ch, _NONCACHE_STARTADDRESS, _NONCACHE_STARTADDRESS+0x80000, SINGLE,DBYTE, 0x80000);	//Single, DByte, 512KB
		DMA_M2M(ch, _NONCACHE_STARTADDRESS, _NONCACHE_STARTADDRESS+0x80000, SINGLE,FBYTE,  0x80000);//Single, FByte, 512KB
		printf("\n");
	}
}

void DMA_M2M(U32 ch,U32 s_addr, U32 d_addr, U32 tsz, U32 dsz, U32 tot_sz)
{
	U32 i;
	U32 tc;
	volatile U32 memSum0=0,memSum1=0;
	DMA *pDMA;
	
	switch(ch)
	{
		case 0:
			pISR_DMA0=(int)Dma0Done;
			rINTMSK&=~(BIT_DMA0);  
			pDMA=(void *)0x4b000000;
			break;
		case 1:
			pISR_DMA1=(int)Dma1Done;
			rINTMSK&=~(BIT_DMA1);  
			pDMA=(void *)0x4b000040;
			break;
		case 2:
			pISR_DMA2=(int)Dma2Done;
			rINTMSK&=~(BIT_DMA2);  
			pDMA=(void *)0x4b000080;
		break;
		case 3:
		    pISR_DMA3=(int)Dma3Done;
		   	rINTMSK&=~(BIT_DMA3);  
		   	pDMA=(void *)0x4b0000c0;
		    break;
	}
	
	// tc : transfer count
	// tot_sz : Actual number of bytes to be tranferred
	// tsz = 0 @ Unit transfer,	tsz = 1 @ Burst transfer
	// dsz = 0 @ Byte,			dsz = 1 @ Half word
	// dsz = 2 @ Word
	switch(dsz)
	{
		case BYTE :
			tc=tot_sz/((tsz?4:1)*1);
			break;
		case DBYTE :
			tc=tot_sz/((tsz?4:1)*2);
			break;
		case FBYTE :
			tc=tot_sz/((tsz?4:1)*4);
			break;
		default :
			printf("DMA setting err, check code\n");
			break;
	}

	for(i=s_addr;i<(s_addr+tot_sz);i+=4)
	{
	    	*((U32 *)i)=i^0x55aa5aa5;
	    	memSum0+=i^0x55aa5aa5;
	}

	dmaDone=0;
	
	pDMA->DISRC=s_addr;
	pDMA->DISRCC=(0<<1)|(0<<0); // AHB, INC
	pDMA->DIDST=d_addr;
	pDMA->DIDSTC=(0<<1)|(0<<0); // AHB, INC
	pDMA->DCON=(1<<31)|(1<<30)|(1<<29)|(tsz<<28)|(1<<27)|(1<<22)|(dsz<<20)|(tc);
			   //HS|AHB|InterruptEn|TransferSize|WholeServ|RelaodOff|DataSize|TransferCount
	pDMA->DMAREQSEL=0; //S/W request mode
	pDMA->DMASKTRIG=(1<<1)|1; //DMA on, SW_TRIG

	while(dmaDone==0);
	rINTMSK=BIT_ALLMSK;

	for(i=d_addr;i<(d_addr+tot_sz);i+=4)
	{
	    	*((U32 *)i)=i^0x55aa5aa5;
	    	memSum1+=i^0x55aa5aa5;
	}

	if(memSum0==memSum1)
		printf("[Ch: %d, Size: %d KB] DMA test O.K.\n",ch,tot_sz/1024);
	else 
		printf("[Ch: %d, Size: %d KB] DMA test ERROR!!!\n",ch,tot_sz/1024);
}

static void __irq Dma0Done(void)
{
    ClearPending(BIT_DMA0);
    dmaDone=1;
}

static void __irq Dma1Done(void)
{
    ClearPending(BIT_DMA1);
    dmaDone=1;
}

static void __irq Dma2Done(void)
{
    ClearPending(BIT_DMA2);
    dmaDone=1;
}

static void __irq Dma3Done(void)
{
    ClearPending(BIT_DMA3);
    dmaDone=1;
}