?? adsp-bf561_v2_tinyboards.ldf

?? BlackFin與攝像頭的接口程序
?? LDF
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  MEM_A_L1_DATA_A_CACHE { START(0xFF804000) END(0xFF807FFF) TYPE(RAM) WIDTH(8) }
  MEM_A_L1_DATA_A       { START(0xFF800000) END(0xFF803FFF) TYPE(RAM) WIDTH(8) }
#else  /* DATAA_CACHE */
  MEM_A_L1_DATA_A       { START(0xFF800000) END(0xFF807FFF) TYPE(RAM) WIDTH(8) }
#endif /* DATAA_CACHE */

  /* ----- Core B ----- */
  MEM_B_L1_SCRATCH      { START(0xFF700000) END(0xFF700FFF) TYPE(RAM) WIDTH(8) }
  MEM_B_L1_CODE_CACHE   { START(0xFF610000) END(0xFF613FFF) TYPE(RAM) WIDTH(8) }
  MEM_B_L1_CODE         { START(0xFF600000) END(0xFF603FFF) TYPE(RAM) WIDTH(8) }
#if DATAB_CACHE
  MEM_B_L1_DATA_B_CACHE { START(0xFF504000) END(0xFF507FFF) TYPE(RAM) WIDTH(8) }
  MEM_B_L1_DATA_B       { START(0xFF500000) END(0xFF503FFF) TYPE(RAM) WIDTH(8) }
#else  /* DATAB_CACHE */
  MEM_B_L1_DATA_B       { START(0xFF500000) END(0xFF507FFF) TYPE(RAM) WIDTH(8) }
#endif /* DATAB_CACHE */
#if DATAA_CACHE
  MEM_B_L1_DATA_A_CACHE { START(0xFF404000) END(0xFF407FFF) TYPE(RAM) WIDTH(8) }
  MEM_B_L1_DATA_A       { START(0xFF400000) END(0xFF403FFF) TYPE(RAM) WIDTH(8) }
#else  /* DATAA_CACHE */
  MEM_B_L1_DATA_A       { START(0xFF400000) END(0xFF407FFF) TYPE(RAM) WIDTH(8) }
#endif /* DATAA_CACHE */

/* L2 SRAM - 128K. */
/* For convenience, we divide this space into: */
/* Core B only - 32K */
/* Core A only - 32K */
/* Shared = 64K */
/* And then subdivide each core-only area for program layout. */

/* Core B only - FEB00000 to FEB07FFF */
#if defined(IDDE_ARGS)
#define ARGV_START_B 0xFEB00000
  MEM_ARGV_B            { START(0xFEB00000) END(0xFEB000FF) TYPE(RAM) WIDTH(8) }
  MEM_L2_SRAM_B         { START(0xFEB00100) END(0xFEB07FFF) TYPE(RAM) WIDTH(8) }
#else
  MEM_L2_SRAM_B         { START(0xFEB00000) END(0xFEB07FFF) TYPE(RAM) WIDTH(8) }
#endif

/* Core A only - FEB08000 to FEB0FFFF */
#if defined(IDDE_ARGS)
#define ARGV_START_A 0xFEB08000
  MEM_ARGV_A            { START(0xFEB08000) END(0xFEB080FF) TYPE(RAM) WIDTH(8) }
  MEM_L2_SRAM_A         { START(0xFEB08100) END(0xFEB0FFFF) TYPE(RAM) WIDTH(8) }
#else
  MEM_L2_SRAM_A         { START(0xFEB08000) END(0xFEB0FFFF) TYPE(RAM) WIDTH(8) }
#endif

  /* Shared L2 */
  MEM_L2_SRAM           { START(0xFEB10000) END(0xFEB1FFFF) TYPE(RAM) WIDTH(8) }

  /* Async Memory in Banks of 64 MB */
  MEM_ASYNC3            { START(0x2C000000) END(0x2FFFFFFF) TYPE(RAM) WIDTH(8) }
  MEM_ASYNC2            { START(0x28000000) END(0x2BFFFFFF) TYPE(RAM) WIDTH(8) }
  MEM_ASYNC1            { START(0x24000000) END(0x27FFFFFF) TYPE(RAM) WIDTH(8) }
  MEM_ASYNC0            { START(0x20000000) END(0x23FFFFFF) TYPE(RAM) WIDTH(8) }

  /*   The ADSP-BF561 EZ-KIT is supplied with 64 MB SDRAM.
  **   The ADSP-BF561 EBIU allows for 4 sub-banks to be accessed simultaneously
  **   Defining this macro causes the LDF to partition the available SDRAM into
  **   4 8MB banks per core. This makes the best use of the EBIU and minimizes 
  **   memory access stall cycles.  
  **   The default LDF contains a configuration for two external banks
  **   each holding 32MB SDRAM. The default LDF uses one bank per core,
  **   partitioned to segment data and program.
  **   Bank usage:
  **      Bank 0 - 8MB/core - Heap
  **      Bank 1 - 8MB/core - Data
  **      Bank 2 - 8MB/core - Data/BSZ
  **      Bank 3 - 8MB Core A, 4MB Core B - Program
  **                             4MB shared - misc
  **    See ADSP-BF561 Hardware Reference Manual, SDRAM controller section
  **    for further information.
  */
  /* Core A SDRAM */
  MEM_SDRAM0_BANK0      { START(0x00002000) END(0x007FFFFF) TYPE(RAM) WIDTH(8) }
  MEM_SDRAM0_BANK1      { START(0x00800000) END(0x00FFFFFF) TYPE(RAM) WIDTH(8) }
  MEM_SDRAM0_BANK2      { START(0x01000000) END(0x017FFFFF) TYPE(RAM) WIDTH(8) }
  MEM_SDRAM0_BANK3      { START(0x01800000) END(0x01FFFFFF) TYPE(RAM) WIDTH(8) }

  /* Core B SDRAM */
  MEM_SDRAM1_BANK0      { START(0x02000000) END(0x027FFFFF) TYPE(RAM) WIDTH(8) }
  MEM_SDRAM1_BANK1      { START(0x02800000) END(0x02FFFFFF) TYPE(RAM) WIDTH(8) }
  MEM_SDRAM1_BANK2      { START(0x03000000) END(0x037FFFFF) TYPE(RAM) WIDTH(8) }
  MEM_SDRAM1_BANK3      { START(0x03800000) END(0x03BFFFFF) TYPE(RAM) WIDTH(8) }

  /* Shared SDRAM */
  MEM_SDRAM1_SHARED     { START(0x03C00000) END(0x03FFFFFF) TYPE(RAM) WIDTH(8) }
}

/* Core A */
#if defined(COREA)
PROCESSOR p0 {
  OUTPUT( $COMMAND_LINE_OUTPUT_FILE )

  /* Following address must match the core reset PC address */
  RESOLVE(start,0xFFA00000)

#if defined(IDDE_ARGS)
  RESOLVE(___argv_string, ARGV_START_A)
#endif

  KEEP(start,_main)

  SECTIONS
  {
    /* FEB1FC00->FEB1FFFF : Reseved in boot Phase for 2nd stage boot loader */
    RESERVE(___ssld=0xFEB1FC00,___lssld=0x400) 
#if defined(__WORKAROUND_AVOID_LDF_BLOCK_BOUNDARIES) /* { */
    /* Workaround for hardware errata 05-00-0189 -
    ** "Speculative (and fetches made at boundary of reserved memory
    ** space) for instruction or data fetches may cause false
    ** protection exceptions".
    **
    ** Done by avoiding use of 76 bytes from at the end of blocks
    ** that are adjacent to reserved memory. Workaround is enabled
    ** for appropriate silicon revisions (-si-revision switch).
    */
    RESERVE(___waba0=0xFFB00FFF - 75,___la0=76)   /* scratchpad */
#  if !INSTR_CACHE
    RESERVE(___waba1=0xFFA13FFF - 75,___la1=76)   /* l1 instr sram/cache */
#  endif
    RESERVE(___waba2=0xFFA03FFF - 75,___la2=76)   /* l1 instr sram */
#  if DATAB_CACHE
    RESERVE(___waba3=0xFF903FFF - 75,___la3=76)   /* data B sram */
#  else
    RESERVE(___waba4=0xFF907FFF - 75,___la4=76)   /* data B sram/cache */
#  endif
#  if DATAA_CACHE
    RESERVE(___waba5=0xFF803FFF - 75,___la5=76)   /* data A sram */
#  else
    RESERVE(___waba6=0xFF807FFF - 75,___la6=76)   /* data A sram/cache */
#  endif
#   if 0
    /*  L2 block end memory reserved for second stage loader above */
    RESERVE(___waba7=0xFEB1FFFF - 75,___la7=76)   /* L2 sram */
#   endif
    RESERVE(___waba8=0x2FFFFFFF - 75,___la8=76)   /* async bank 3 */
#  if defined(USE_SDRAM) || defined(USE_CACHE)
    RESERVE(___waba9=0x03FFFFFF - 75,___la9=76)    /* EZ-Kit 64MB sdram */
#  endif
#endif /*} __WORKAROUND_AVOID_LDF_BLOCK_BOUNDARIES */

#if defined(USE_SCRATCHPAD_STACK) || defined(USE_SCRATCHPAD_HEAP)
    stack_and_heap_scratchpad
    {
       INPUT_SECTION_ALIGN(4)
       RESERVE(stack_and_heap_in_scratchpad, stack_and_heap_in_scratchpad_length, 0, 4)
#if defined(USE_SCRATCHPAD_STACK) && defined(USE_SCRATCHPAD_HEAP)
       ldf_stack_space = stack_and_heap_in_scratchpad;
       ldf_stack_end = (ldf_stack_space + ((stack_and_heap_in_scratchpad_length * STACK_SIZE) / STACKHEAP_SIZE) - 4 ) & 0xfffffffc;
       ldf_heap_space = ldf_stack_end + 4;
       ldf_heap_end = ldf_stack_space + stack_and_heap_in_scratchpad_length;
       ldf_heap_length = ldf_heap_end - ldf_heap_space;
#elif defined(USE_SCRATCHPAD_STACK)
       ldf_stack_space = stack_and_heap_in_scratchpad;
       ldf_stack_end = ldf_stack_space + stack_and_heap_in_scratchpad_length;
#elif defined(USE_SCRATCHPAD_HEAP)
       ldf_heap_space = stack_and_heap_in_scratchpad;
       ldf_heap_end = ldf_heap_space + stack_and_heap_in_scratchpad_length;
       ldf_heap_length = ldf_heap_end - ldf_heap_space;
#endif
    } > MEM_A_L1_SCRATCH
#endif 

	// for the jpeg encoder -------------------------------------------
	jpeg_tables
	{
        INPUT_SECTION_ALIGN(4)
        INPUT_SECTIONS( $OBJECTS(jpeg_tables) $LIBRARIES(jpeg_tables))
	} >MEM_A_L1_DATA_B
	jpeg_buf
	{
        INPUT_SECTION_ALIGN(4)
        INPUT_SECTIONS( $OBJECTS(jpeg_buf) $LIBRARIES(jpeg_buf))
	} >MEM_A_L1_DATA_B
	// -----------------------------------------------------------------
	
    L1_code {
       INPUT_SECTION_ALIGN(4)
       __CORE = 0;
       INPUT_SECTIONS( $OBJECTS(L1_code) $LIBRARIES(L1_code))
       INPUT_SECTIONS( $OBJECTS(cplb) $LIBRARIES(cplb))
       INPUT_SECTIONS( $OBJECTS(cplb_code) $LIBRARIES(cplb_code))
       INPUT_SECTIONS( $OBJECTS(noncache_code) $LIBRARIES(noncache_code))
       INPUT_SECTIONS( $OBJS_LIBS_INTERNAL(program) )
       INPUT_SECTIONS( $OBJS_LIBS_NOT_EXTERNAL(program) )
       INPUT_SECTIONS( $OBJECTS(program) $LIBRARIES(program))
    } >MEM_A_L1_CODE

    L1_code_cache {
       INPUT_SECTION_ALIGN(4)
#if INSTR_CACHE 
       ___l1_code_cache = 1;
#else
       ___l1_code_cache = 0;
       INPUT_SECTIONS( $OBJECTS(L1_code) $LIBRARIES(L1_code))
       INPUT_SECTIONS( $OBJECTS(cplb) $LIBRARIES(cplb))
       INPUT_SECTIONS( $OBJECTS(cplb_code) $LIBRARIES(cplb_code))
       INPUT_SECTIONS( $OBJS_LIBS_INTERNAL(program) )
       INPUT_SECTIONS( $OBJS_LIBS_NOT_EXTERNAL(program) )
       INPUT_SECTIONS( $OBJECTS(program) $LIBRARIES(program))
#endif /* INSTR_CACHE */
    } >MEM_A_L1_CODE_CACHE

#if DATAB_CACHE

    L1_data_b_cache {
       INPUT_SECTION_ALIGN(4)
       ___l1_data_cache_b = 1;
    } >MEM_A_L1_DATA_B_CACHE

#endif /* DATAB_CACHE */

    L1_data_b {
       INPUT_SECTION_ALIGN(4)
#if !DATAB_CACHE 
       ___l1_data_cache_b = 0;
#endif
       INPUT_SECTIONS( $OBJECTS(L1_data_b) $LIBRARIES(L1_data_b))
       INPUT_SECTIONS( $OBJECTS(L1_data) $LIBRARIES(L1_data))
#if !defined(USE_SDRAM) && (defined(__cplusplus) || defined(USER_CRT))
       INPUT_SECTIONS( $OBJECTS(ctor) $LIBRARIES(ctor) )
       INPUT_SECTIONS( $OBJECTS(ctorl) $LIBRARIES(ctorl) )
       INPUT_SECTIONS( $OBJECTS(.gdt) $LIBRARIES(.gdt) )
       INPUT_SECTIONS( $OBJECTS(.gdtl) $LIBRARIES(.gdtl) )
       INPUT_SECTIONS( $OBJECTS(.frt) $LIBRARIES(.frt) )
       INPUT_SECTIONS( $OBJECTS(.frtl) $LIBRARIES(.frtl) )
#endif 
       INPUT_SECTIONS( $OBJS_LIBS_INTERNAL(data1) )
       INPUT_SECTIONS( $OBJS_LIBS_NOT_EXTERNAL(data1) )
       INPUT_SECTIONS( $OBJECTS(constdata) $LIBRARIES(constdata))
       INPUT_SECTIONS( $OBJECTS(voldata) $LIBRARIES(voldata))
       INPUT_SECTIONS( $OBJECTS(data1) $LIBRARIES(data1))
#if defined(__cplusplus) || defined(USER_CRT) 
       INPUT_SECTIONS( $OBJECTS(.edt) $LIBRARIES(.edt) )
       INPUT_SECTIONS( $OBJECTS(.cht) $LIBRARIES(.cht) )
       INPUT_SECTIONS( $OBJECTS(.rtti) $LIBRARIES(.rtti) )
       INPUT_SECTIONS( $OBJECTS(vtbl) $LIBRARIES(vtbl) )
#endif
       INPUT_SECTIONS( $OBJECTS(cplb_data) $LIBRARIES(cplb_data))
    } >MEM_A_L1_DATA_B

    bsz_L1_data_b ZERO_INIT {
       INPUT_SECTION_ALIGN(4)
       INPUT_SECTIONS( $OBJECTS(L1_bsz) $LIBRARIES(L1_bsz))
       INPUT_SECTIONS( $OBJS_LIBS_INTERNAL(bsz) )
       INPUT_SECTIONS( $OBJS_LIBS_NOT_EXTERNAL(bsz) )
       INPUT_SECTIONS( $OBJECTS(bsz) $LIBRARIES(bsz))
    } >MEM_A_L1_DATA_B

#if DATAA_CACHE 

    l1_data_a_cache {
       INPUT_SECTION_ALIGN(4)
       ___l1_data_cache_a = 1;
    } >MEM_A_L1_DATA_A_CACHE

#endif /* DATAA_CACHE */

    L1_data_a {
       INPUT_SECTION_ALIGN(4)
#if !DATAA_CACHE
       ___l1_data_cache_a = 0;
#endif
       INPUT_SECTIONS( $OBJECTS(L1_data_a) $LIBRARIES(L1_data_a))
       INPUT_SECTIONS( $OBJECTS(L1_data) $LIBRARIES(L1_data))
#if !defined(USE_SDRAM)
#  if defined(__MEMINIT__)
       INPUT_SECTIONS( $OBJECTS(bsz_init) $LIBRARIES(bsz_init))
#  endif
#endif
#if USE_L1DATA_STACK && USE_L1DATA_HEAP
       RESERVE(stack_and_heap_in_L1_data_a, stack_and_heap_in_L1_data_a_length = STACKHEAP_SIZE, 4)
#elif USE_L1DATA_HEAP
       RESERVE(stack_and_heap_in_L1_data_a, stack_and_heap_in_L1_data_a_length = HEAP_SIZE, 4)
#elif USE_L1DATA_STACK
       RESERVE(stack_and_heap_in_L1_data_a, stack_and_heap_in_L1_data_a_length = STACK_SIZE, 4)
#endif
       INPUT_SECTIONS( $OBJS_LIBS_INTERNAL(data1) )
       INPUT_SECTIONS( $OBJS_LIBS_NOT_EXTERNAL(data1) )
       INPUT_SECTIONS( $OBJECTS(constdata) $LIBRARIES(constdata))
       INPUT_SECTIONS( $OBJECTS(voldata) $LIBRARIES(voldata))
       INPUT_SECTIONS( $OBJECTS(data1) $LIBRARIES(data1))
#if defined(__cplusplus) || defined(USER_CRT)
       INPUT_SECTIONS( $OBJECTS(.edt) $LIBRARIES(.edt) )
       INPUT_SECTIONS( $OBJECTS(.cht) $LIBRARIES(.cht) )
       INPUT_SECTIONS( $OBJECTS(.rtti) $LIBRARIES(.rtti) )
       INPUT_SECTIONS( $OBJECTS(vtbl) $LIBRARIES(vtbl) )
#endif
       INPUT_SECTIONS( $OBJECTS(cplb_data) $LIBRARIES(cplb_data))
    } >MEM_A_L1_DATA_A

    bsz_L1_data_a ZERO_INIT {
       INPUT_SECTION_ALIGN(4)
       INPUT_SECTIONS( $OBJECTS(L1_bsz) $LIBRARIES(L1_bsz))
       INPUT_SECTIONS( $OBJS_LIBS_INTERNAL(bsz) )
       INPUT_SECTIONS( $OBJS_LIBS_NOT_EXTERNAL(bsz) )
    } >MEM_A_L1_DATA_A

#if defined(__MEMINIT__) && !defined(USE_SDRAM)
   .meminit { ALIGN(4) } >MEM_A_L1_DATA_A
#endif

#if USE_L1DATA_STACK || USE_L1DATA_HEAP
   stack_and_heap_L1_data_a
   {
       INPUT_SECTION_ALIGN(4)
#if !defined(__MEMINIT__) && !defined(USE_SDRAM)
       RESERVE_EXPAND(stack_and_heap_in_L1_data_a, stack_and_heap_in_L1_data_a_length, 0, 4)
#endif
#if USE_L1DATA_STACK && USE_L1DATA_HEAP
       ldf_stack_space = stack_and_heap_in_L1_data_a;
       ldf_stack_end = (ldf_stack_space + ((stack_and_heap_in_L1_data_a_length * STACK_SIZE) / STACKHEAP_SIZE) - 4 ) & 0xfffffffc;
       ldf_heap_space = ldf_stack_end + 4;
       ldf_heap_end = ldf_stack_space + stack_and_heap_in_L1_data_a_length;
       ldf_heap_length = ldf_heap_end - ldf_heap_space;
#elif USE_L1DATA_STACK
       ldf_stack_space = stack_and_heap_in_L1_data_a;
       ldf_stack_end = ldf_stack_space + stack_and_heap_in_L1_data_a_length;
#elif USE_L1DATA_HEAP
       ldf_heap_space = stack_and_heap_in_L1_data_a;
       ldf_heap_end = ldf_heap_space + stack_and_heap_in_L1_data_a_length;
       ldf_heap_length = ldf_heap_end - ldf_heap_space;
#endif
   } >MEM_A_L1_DATA_A
#endif 

    L2_sram_a {
       INPUT_SECTION_ALIGN(4)
       INPUT_SECTIONS( $OBJECTS(L2_sram_a) $LIBRARIES(L2_sram_a))
       INPUT_SECTIONS( $OBJECTS(l2_sram) $LIBRARIES(l2_sram))
#if defined(USE_L2_STACK) && defined(USE_L2_HEAP)
      RESERVE(stack_and_heap_in_L2_sram_a, stack_and_heap_in_L2_sram_a_length = STACKHEAP_SIZE, 4)
#elif defined(USE_L2_HEAP)
      RESERVE(stack_and_heap_in_L2_sram_a, stack_and_heap_in_L2_sram_a_length = HEAP_SIZE, 4)
#elif defined(USE_L2_STACK)
      RESERVE(stack_and_heap_in_L2_sram_a, stack_and_heap_in_L2_sram_a_length = STACK_SIZE, 4)
#endif
#if defined(__ADI_MULTICORE) 
       INPUT_SECTIONS( $OBJECTS(mc_data) $LIBRARIES(mc_data))
#endif /* __ADI_MULTICORE */
       INPUT_SECTIONS( $OBJECTS(cplb) $LIBRARIES(cplb))
       INPUT_SECTIONS( $OBJECTS(cplb_code) $LIBRARIES(cplb_code))
       INPUT_SECTIONS( $OBJS_LIBS_INTERNAL(program) )
       INPUT_SECTIONS( $OBJS_LIBS_INTERNAL(data1) )
       INPUT_SECTIONS( $OBJS_LIBS_NOT_EXTERNAL(program) )
       INPUT_SECTIONS( $OBJS_LIBS_NOT_EXTERNAL(data1) )
       INPUT_SECTIONS( $OBJECTS(constdata) $LIBRARIES(constdata))
       INPUT_SECTIONS( $OBJECTS(voldata) $LIBRARIES(voldata))
       INPUT_SECTIONS( $OBJECTS(noncache_code) $LIBRARIES(noncache_code))
       INPUT_SECTIONS( $OBJECTS(program) $LIBRARIES(program))
       INPUT_SECTIONS( $OBJECTS(data1) $LIBRARIES(data1))
#if defined(__cplusplus) || defined(USER_CRT) 
       INPUT_SECTIONS( $OBJECTS(.edt) $LIBRARIES(.edt) )
       INPUT_SECTIONS( $OBJECTS(.cht) $LIBRARIES(.cht) )
       INPUT_SECTIONS( $OBJECTS(.rtti) $LIBRARIES(.rtti) )
#endif 
       INPUT_SECTIONS( $OBJECTS(cplb_data) $LIBRARIES(cplb_data))
    } >MEM_L2_SRAM_A

    bsz_L2_sram_a ZERO_INIT {
       INPUT_SECTION_ALIGN(4)
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