//******************************************************************************
//   MSP-FET430P140 Demo - I2C Multimaster Interface
//
//   Description: This demo connects two MSP430s via the I2C bus. Both MSP430s
//   are configured to be master transmitters when they need to transmit and
//   slave receivers when they are not transmitting. The I2C data to be
//   transmitted comes into the MSP430 via UART1 and a PC. When the complete
//   system shown below is assembled, you will be able to type data in a
//   terminal window of one of the PCs, it will be received by the MSP430
//   connected to it's serial port, it will then be transmitted to the other
//   MSP430 via I2C. After the other MSP430 receives it from I2C, it will send
//   it to its PC via UART1 and the data can be displayed in a terminal window.
//
//   The RS232 settings for the UARTS are 2400 baud, N81. The code is normally in 
//   LPM3 with both the UART and the I2C ready to receive a charcter. When A UART
//   character comes in, the UART receive interrupt occurs and the code configures the 
//   I2C for master transmiter and transmits the character on the I2C bus. It 
//   then goes back into receive-ready mode for both the UART and the I2C.  If
//   an I2C character comes the I2C receive ready interrupt occurs and the code
//   transmits the character out the UART.  In case arbitration is lost, the 
//   code echoes back the character to the UART so the user can see that 
//   arbitration was lost.
//   ACLK = UCLK1 = 32768, I2CCLK = MCLK = SMCLK = ~800KHz
//  //*An external watch crystal on XIN XOUT is required for ACLK*//	  
//  //* MSP430F169 Device Required*//
//
//   ** NOTE ** The slave address and Own Address of the two MSP430s in the
//   system must be different. 
//
//  
//                                 /|\   /|\
//      COMPUTER      MSP430F169   10k   10k   MSP430F169      COMPUTER
//      --------      ----------    |     |    ----------      --------
//     |        |    |      P3.1|<--|-----+-->|P3.1      |    |        |
//     |      TX|--->|URXD1 P3.3|<--+-------->|P3.3 URXD1|<---|TX      |
//     |      RX|<---|UTXD1     |             |     UTXD1|--->|RX      |
//     |        |    |       XIN|             |XIN       |    |        |
//     |        |    |          |32kHZ   32khZ|          |    |        |
//     |        |    |      XOUT|             |XOUT      |    |        |
//
//  M.Mitchell
//  Texas Instruments, Inc
//  January 2004
//******************************************************************************

#include  "msp430x16x.h"
void I2C_TX(void);                      // Function prototypes

void main(void)
{
  WDTCTL = WDTPW + WDTHOLD;             // Stop WDT
  U1CTL |= CHAR;                        // 8-bit character, SWRST = 1
  U1TCTL = SSEL0;                       // UCLK = ACLK
  U1BR0 = 0x0D;                         // 32k/2400 - 13.65
  U1BR1 = 0x00;                         
  U1MCTL = 0x6B;                        // Modulation
  ME2 |= UTXE1 + URXE1;                 // Enable USART1 TXD/RXD
  U1CTL &= ~SWRST;                      // Enable USART1
  IE2 |= URXIE1;                        // Enable USART1 RX interrupt
  P3SEL = 0xCA;                         // USART1 and I2C pin option select
  P3DIR = 0x20;                         // P3.6 = output direction
 
  U0CTL |= I2C+SYNC;                    // Recommended I2C init procedure
  U0CTL &= ~I2CEN;                      // Recommended I2C init procedure
  I2CTCTL |= I2CSSEL1;                  // SMCLK for I2C


// !!!!!  Slave Address of first device must match own address of 2nd device
//        Change comments for following 4 lines for each MSP430
  I2COA = 0x0048;                       // Own address for device 1
  I2CSA = 0x0056;                       // Address of device 2
//  I2COA = 0x0056;                     // Own address of device2
// I2CSA = 0x0048;                      // Address of device 1
  
  I2CIE = RXRDYIE+ALIE+NACKIE+ARDYIE;   // Enable used I2C interrupts
  U0CTL |= I2CEN;                       // Enable I2C

  for (;;)                              
  {
  _BIS_SR(LPM3_bits+GIE);               // Enter LPM3 with interrupts
  while (I2CBUSY & I2CDCTL);            // I2C ready?
  I2C_TX();                             // Trasmit received char over I2C
  }
}

void I2C_TX(void)
{
  U0CTL |= MST;                         // Master mode
  I2CNDAT = 0x01;                       // Write one byte
  I2CTCTL |= I2CSTT+I2CSTP+I2CTRX;      // Initiate transfer
  I2CDRB = RXBUF1;                      // Copy RXBUF1 to I2CDRB  
}

// Common ISR for I2C Module
#pragma vector=USART0TX_VECTOR
    __interrupt void I2C_ISR(void)
{
  switch(I2CIV)
  {
   case  2:                             // Arbitration lost
     TXBUF1 = RXBUF1;                   // Echo
     I2CTCTL &= ~I2CTRX;                // Clear transmit mode   
     break;
   case  4:                             // No Acknowledge
     U0CTL &= ~MST;                     // Clear Master mode
     I2CTCTL &= ~I2CTRX;                // Clear transmit mode
     break;
   case  6: break;                      // Own Address
   case  8:                             // Register Access Ready
     I2CTCTL &= ~I2CTRX;                // Clear transmit mode   
     break;
   case 10:                             // Receive Ready
     while (!(IFG2 & UTXIFG1));         // USART1 TX buffer ready?
     I2CTCTL &= ~I2CTRX;                // Clear trasmit mode
     TXBUF1 = I2CDRB;                   // Copy I2C RX data to TXBUF1
     break;
   case 12: break;                      // Transmit Ready
   case 14: break;                      // General Call
   case 16: break;                      // Start Condition
  }
}  

// UART1 RX ISR will for exit from LPM3 in Mainloop
#pragma vector=USART1RX_VECTOR
__interrupt void usart1_rx(void)
{
  _BIC_SR_IRQ(LPM3_bits);               // Clear LPM3 bits from stack
}