?? dsp28_ecan.h
字號:
Uint16 LNT27:1; // 27 LNT for Mailbox 27
Uint16 LNT28:1; // 28 LNT for Mailbox 28
Uint16 LNT29:1; // 29 LNT for Mailbox 29
Uint16 LNT30:1; // 30 LNT for Mailbox 30
Uint16 LNT31:1; // 31 LNT for Mailbox 31
};
/* Allow access to the bit fields or entire register */
union CANLNT_REG {
Uint32 all;
struct CANLNT_BITS bit;
};
/* eCAN Time-out Control register (CANTOC) bit definitions */
struct CANTOC_BITS { // bit description
Uint16 TOC0:1; // 0 TOC for Mailbox 0
Uint16 TOC1:1; // 1 TOC for Mailbox 1
Uint16 TOC2:1; // 2 TOC for Mailbox 2
Uint16 TOC3:1; // 3 TOC for Mailbox 3
Uint16 TOC4:1; // 4 TOC for Mailbox 4
Uint16 TOC5:1; // 5 TOC for Mailbox 5
Uint16 TOC6:1; // 6 TOC for Mailbox 6
Uint16 TOC7:1; // 7 TOC for Mailbox 7
Uint16 TOC8:1; // 8 TOC for Mailbox 8
Uint16 TOC9:1; // 9 TOC for Mailbox 9
Uint16 TOC10:1; // 10 TOC for Mailbox 10
Uint16 TOC11:1; // 11 TOC for Mailbox 11
Uint16 TOC12:1; // 12 TOC for Mailbox 12
Uint16 TOC13:1; // 13 TOC for Mailbox 13
Uint16 TOC14:1; // 14 TOC for Mailbox 14
Uint16 TOC15:1; // 15 TOC for Mailbox 15
Uint16 TOC16:1; // 16 TOC for Mailbox 16
Uint16 TOC17:1; // 17 TOC for Mailbox 17
Uint16 TOC18:1; // 18 TOC for Mailbox 18
Uint16 TOC19:1; // 19 TOC for Mailbox 19
Uint16 TOC20:1; // 20 TOC for Mailbox 20
Uint16 TOC21:1; // 21 TOC for Mailbox 21
Uint16 TOC22:1; // 22 TOC for Mailbox 22
Uint16 TOC23:1; // 23 TOC for Mailbox 23
Uint16 TOC24:1; // 24 TOC for Mailbox 24
Uint16 TOC25:1; // 25 TOC for Mailbox 25
Uint16 TOC26:1; // 26 TOC for Mailbox 26
Uint16 TOC27:1; // 27 TOC for Mailbox 27
Uint16 TOC28:1; // 28 TOC for Mailbox 28
Uint16 TOC29:1; // 29 TOC for Mailbox 29
Uint16 TOC30:1; // 30 TOC for Mailbox 30
Uint16 TOC31:1; // 31 TOC for Mailbox 31
};
/* Allow access to the bit fields or entire register */
union CANTOC_REG {
Uint32 all;
struct CANTOC_BITS bit;
};
/* eCAN Time-out Status register (CANTOS) bit definitions */
struct CANTOS_BITS { // bit description
Uint16 TOS0:1; // 0 TOS for Mailbox 0
Uint16 TOS1:1; // 1 TOS for Mailbox 1
Uint16 TOS2:1; // 2 TOS for Mailbox 2
Uint16 TOS3:1; // 3 TOS for Mailbox 3
Uint16 TOS4:1; // 4 TOS for Mailbox 4
Uint16 TOS5:1; // 5 TOS for Mailbox 5
Uint16 TOS6:1; // 6 TOS for Mailbox 6
Uint16 TOS7:1; // 7 TOS for Mailbox 7
Uint16 TOS8:1; // 8 TOS for Mailbox 8
Uint16 TOS9:1; // 9 TOS for Mailbox 9
Uint16 TOS10:1; // 10 TOS for Mailbox 10
Uint16 TOS11:1; // 11 TOS for Mailbox 11
Uint16 TOS12:1; // 12 TOS for Mailbox 12
Uint16 TOS13:1; // 13 TOS for Mailbox 13
Uint16 TOS14:1; // 14 TOS for Mailbox 14
Uint16 TOS15:1; // 15 TOS for Mailbox 15
Uint16 TOS16:1; // 16 TOS for Mailbox 16
Uint16 TOS17:1; // 17 TOS for Mailbox 17
Uint16 TOS18:1; // 18 TOS for Mailbox 18
Uint16 TOS19:1; // 19 TOS for Mailbox 19
Uint16 TOS20:1; // 20 TOS for Mailbox 20
Uint16 TOS21:1; // 21 TOS for Mailbox 21
Uint16 TOS22:1; // 22 TOS for Mailbox 22
Uint16 TOS23:1; // 23 TOS for Mailbox 23
Uint16 TOS24:1; // 24 TOS for Mailbox 24
Uint16 TOS25:1; // 25 TOS for Mailbox 25
Uint16 TOS26:1; // 26 TOS for Mailbox 26
Uint16 TOS27:1; // 27 TOS for Mailbox 27
Uint16 TOS28:1; // 28 TOS for Mailbox 28
Uint16 TOS29:1; // 29 TOS for Mailbox 29
Uint16 TOS30:1; // 30 TOS for Mailbox 30
Uint16 TOS31:1; // 31 TOS for Mailbox 31
};
/* Allow access to the bit fields or entire register */
union CANTOS_REG {
Uint32 all;
struct CANTOS_BITS bit;
};
/**************************************/
/* eCAN Control & Status register file */
/**************************************/
struct ECAN_REGS {
union CANME_REG CANME; // Mailbox Enable
union CANMD_REG CANMD; // Mailbox Direction
union CANTRS_REG CANTRS; // Transmit Request Set
union CANTRR_REG CANTRR; // Transmit Request Reset
union CANTA_REG CANTA; // Transmit Acknowledge
union CANAA_REG CANAA; // Abort Acknowledge
union CANRMP_REG CANRMP; // Received Message Pending
union CANRML_REG CANRML; // Received Message Lost
union CANRFP_REG CANRFP; // Remote Frame Pending
union CANGAM_REG CANGAM; // Global Acceptance Mask
union CANMC_REG CANMC; // Master Control
union CANBTC_REG CANBTC; // Bit Timing
union CANES_REG CANES; // Error Status
union CANTEC_REG CANTEC; // Transmit Error Counter
union CANREC_REG CANREC; // Receive Error Counter
union CANGIF0_REG CANGIF0; // Global Interrupt Flag 0
union CANGIM_REG CANGIM; // Global Interrupt Mask 0
union CANGIF1_REG CANGIF1; // Global Interrupt Flag 1
union CANMIM_REG CANMIM; // Mailbox Interrupt Mask
union CANMIL_REG CANMIL; // Mailbox Interrupt Level
union CANOPC_REG CANOPC; // Overwrite Protection Control
union CANTIOC_REG CANTIOC; // TX I/O Control
union CANRIOC_REG CANRIOC; // RX I/O Control
union CANLNT_REG CANLNT; // Local Network Time
union CANTOC_REG CANTOC; // Time-out Control
union CANTOS_REG CANTOS; // Time-out Status
};
/* --------------------------------------------------- */
/* eCAN Mailbox Registers */
/* ----------------------------------------------------*/
/* eCAN Message ID (MID) bit definitions */
struct CANMID_BITS { // bits description
Uint16 MSGID_L:16; // 0:15
Uint16 MSGID_H:13; // 16:28
Uint16 AAM:1; // 29
Uint16 AME:1; // 30
Uint16 IDE:1; // 31
};
/* Allow access to the bit fields or entire register */
union CANMID_REG {
Uint32 all;
struct CANMID_BITS bit;
};
/* eCAN Master Control Field (MCF) bit definitions */
struct CANMCF_BITS { // bits description
Uint16 DLC:4; // 0:3
Uint16 RTR:1; // 4
Uint16 rsvd1:3; // 7:5 reserved
Uint16 TPL:5; // 12:8
Uint16 rsvd2:3; // 15:13 reserved
Uint16 rsvd3:16; // 31:16 reserved
};
/* Allow access to the bit fields or entire register */
union CANMCF_REG {
Uint32 all;
struct CANMCF_BITS bit;
};
/* eCAN Message Data Register low (MDR_L) bit definitions */
struct CANMDRL_BITS { // bits description
Uint16 LOW_WORD:16; // 0:15
Uint16 HI_WORD:16; // 31:16
};
/* Allow access to the bit fields or entire register */
union CANMDRL_REG {
Uint32 all;
struct CANMDRL_BITS bit;
};
/* eCAN Message Data Register high (MDR_H) bit definitions */
struct CANMDRH_BITS { // bits description
Uint16 LOW_WORD:16; // 0:15
Uint16 HI_WORD:16; // 31:16
};
/* Allow access to the bit fields or entire register */
union CANMDRH_REG {
Uint32 all;
struct CANMDRH_BITS bit;
};
struct MBOX {
union CANMID_REG MID;
union CANMCF_REG MCF;
union CANMDRL_REG MDRL;
union CANMDRH_REG MDRH;
};
/**************************************/
/* eCAN Mailboxes */
/**************************************/
struct ECAN_MBOXES {
struct MBOX MBOX0;
struct MBOX MBOX1;
struct MBOX MBOX2;
struct MBOX MBOX3;
struct MBOX MBOX4;
struct MBOX MBOX5;
struct MBOX MBOX6;
struct MBOX MBOX7;
struct MBOX MBOX8;
struct MBOX MBOX9;
struct MBOX MBOX10;
struct MBOX MBOX11;
struct MBOX MBOX12;
struct MBOX MBOX13;
struct MBOX MBOX14;
struct MBOX MBOX15;
struct MBOX MBOX16;
struct MBOX MBOX17;
struct MBOX MBOX18;
struct MBOX MBOX19;
struct MBOX MBOX20;
struct MBOX MBOX21;
struct MBOX MBOX22;
struct MBOX MBOX23;
struct MBOX MBOX24;
struct MBOX MBOX25;
struct MBOX MBOX26;
struct MBOX MBOX27;
struct MBOX MBOX28;
struct MBOX MBOX29;
struct MBOX MBOX30;
struct MBOX MBOX31;
};
/* eCAN Local Acceptance Mask (LAM) bit definitions */
struct CANLAM_BITS { // bits description
Uint16 LAM_L:16; // 0:15
Uint16 LAM_H:13; // 16:28
Uint16 rsvd1:2; // 29:30 reserved
Uint16 LAMI:1; // 31
};
/* Allow access to the bit fields or entire register */
union CANLAM_REG {
Uint32 all;
struct CANLAM_BITS bit;
};
/**************************************/
/* eCAN Local Acceptance Masks */
/**************************************/
/* eCAN LAM File */
struct LAM_REGS {
union CANLAM_REG LAM0;
union CANLAM_REG LAM1;
union CANLAM_REG LAM2;
union CANLAM_REG LAM3;
union CANLAM_REG LAM4;
union CANLAM_REG LAM5;
union CANLAM_REG LAM6;
union CANLAM_REG LAM7;
union CANLAM_REG LAM8;
union CANLAM_REG LAM9;
union CANLAM_REG LAM10;
union CANLAM_REG LAM11;
union CANLAM_REG LAM12;
union CANLAM_REG LAM13;
union CANLAM_REG LAM14;
union CANLAM_REG LAM15;
union CANLAM_REG LAM16;
union CANLAM_REG LAM17;
union CANLAM_REG LAM18;
union CANLAM_REG LAM19;
union CANLAM_REG LAM20;
union CANLAM_REG LAM21;
union CANLAM_REG LAM22;
union CANLAM_REG LAM23;
union CANLAM_REG LAM24;
union CANLAM_REG LAM25;
union CANLAM_REG LAM26;
union CANLAM_REG LAM27;
union CANLAM_REG LAM28;
union CANLAM_REG LAM29;
union CANLAM_REG LAM30;
union CANLAM_REG LAM31;
};
/* Mailbox MOTS File */
struct MOTS {
unsigned long MOTS0;
unsigned long MOTS1;
unsigned long MOTS2;
unsigned long MOTS3;
unsigned long MOTS4;
unsigned long MOTS5;
unsigned long MOTS6;
unsigned long MOTS7;
unsigned long MOTS8;
unsigned long MOTS9;
unsigned long MOTS10;
unsigned long MOTS11;
unsigned long MOTS12;
unsigned long MOTS13;
unsigned long MOTS14;
unsigned long MOTS15;
unsigned long MOTS16;
unsigned long MOTS17;
unsigned long MOTS18;
unsigned long MOTS19;
unsigned long MOTS20;
unsigned long MOTS21;
unsigned long MOTS22;
unsigned long MOTS23;
unsigned long MOTS24;
unsigned long MOTS25;
unsigned long MOTS26;
unsigned long MOTS27;
unsigned long MOTS28;
unsigned long MOTS29;
unsigned long MOTS30;
unsigned long MOTS31;
};
/* Mailbox MOTO File */
struct MOTO {
unsigned long MOTO0;
unsigned long MOTO1;
unsigned long MOTO2;
unsigned long MOTO3;
unsigned long MOTO4;
unsigned long MOTO5;
unsigned long MOTO6;
unsigned long MOTO7;
unsigned long MOTO8;
unsigned long MOTO9;
unsigned long MOTO10;
unsigned long MOTO11;
unsigned long MOTO12;
unsigned long MOTO13;
unsigned long MOTO14;
unsigned long MOTO15;
unsigned long MOTO16;
unsigned long MOTO17;
unsigned long MOTO18;
unsigned long MOTO19;
unsigned long MOTO20;
unsigned long MOTO21;
unsigned long MOTO22;
unsigned long MOTO23;
unsigned long MOTO24;
unsigned long MOTO25;
unsigned long MOTO26;
unsigned long MOTO27;
unsigned long MOTO28;
unsigned long MOTO29;
unsigned long MOTO30;
unsigned long MOTO31;
};
//---------------------------------------------------------------------------
// eCAN External References & Function Declarations:
//
extern volatile struct ECAN_REGS ECanaRegs;
extern volatile struct ECAN_MBOXES ECanaMboxes;
#endif // end of DSP28_ECAN.H definition
//===========================================================================
// No more.
//===========================================================================
?? 快捷鍵說明
復(fù)制代碼
Ctrl + C
搜索代碼
Ctrl + F
全屏模式
F11
切換主題
Ctrl + Shift + D
顯示快捷鍵
?
增大字號
Ctrl + =
減小字號
Ctrl + -