/***************************************************************************************************************
;														
;    NNNNNN          NN  EEEEEEEEEEEEEEEEEE     CCCCCCCCCCCCCCC							
;    NNNNNNNN        NN  EEEEEE               CCCCCC           							
;    NNNNNNNNNN      NN  EEEEEE              CCCCCC            							
;    NN  NNNNNNNN    NN  EEEEEEEEEEEEEEEEE   CCCCCC            							
;    NN    NNNNNNNN  NN  EEEEEE              CCCCCC            							
;    NN      NNNNNNNNNN  EEEEEE               CCCCCC          							
;    NN          NNNNNN    EEEEEEEEEEEEEEEE     CCCCCCCCCCCCCCC							
;														
;    NEC Electronics	78K0R/Kx3 Series									
;丂丂														
;亂License Agreement亃
;. This sample program is subject to change without notice.
;
;. NEC Electronics does not assume any liability for infringement of patents, copyrights or other intellectual
;  property rights of third parties by or arising from the use of this sample program. No license, express,
;  implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of
;  NEC Electronics or others.
;
;. Descriptions of commands, program, and other related information in this sample program are provided for
;  illustrative purposes in semiconductor product operation and application examples. The incorporation of
;  this sample program in the design of a customer's equipment shall be done under the full responsibility of
;  the customer. NEC Electronics assumes no responsibility for any losses incurred by customers or third parties
;  arising from the use of this sample program.
;
;丂Please use this sample program under the agreement listed above.
;
;***************************************************************************************************************
;	78K0R/Kx3 Series	sample program								
;***************************************************************************************************************
;	Initial Setting
;***************************************************************************************************************
; [History]
;	2007.07 new
;**************************************************************************************************************/

/***************************************************************************
*	Title: initial setting
***************************************************************************/
#include	"K0R_def.h"
#include	"K0R_ext.h"

static void f_ini_cpu(void);
static void f_ini_port(void);
static void f_ini_reg(void);
static void f_ini_itr(void);

/***************************************************************************
*	Title:	hardware initial setting
****************************************************************************
*	Module:	void hdwinit(void)
*	Arg:
*	Ret:
***************************************************************************/
void hdwinit(void)
{
	f_ini_cpu();			/* CPU initial setting */
	f_ini_port();			/* port initial setting	*/
	f_ini_reg();			/* peripheral register initial setting */
	f_ini_itr();			/* interrupt function initial setting */
}

/***************************************************************************
*	Title: CPU initial setting
****************************************************************************
*	Module:	static void f_ini_cpu(void)
*	Arg:
*	Ret:
***************************************************************************/
static void f_ini_cpu(void)
{
	/****************************************
	 external bus interface (default value) */

	MEM = 0x00;			/*  EXEN=0: single-chip mode (port function is valid.)
					   		EXWEN=0: external wait pin is not used
					   		EW1=EW0=0: CLKOUT=fclk
					  		MM3=0: multiplexed bus mode
					   		MM2=0: 8-bit bus mode
					   		MM1=MM0=0: 256-byte extension mode */

	/****************************************
	 clock generator setting */
	CMC = 0b01010000;		/* EXCLK=0, OSCSEL=1: X1 oscillation mode
					   		   OSCSELS=1: XT1 oscillation mode
					   		   AMPH=0 (2MHz亝fmx亝10MHz)*/

	/*****************************************
	 X1 clock oscillation stabilization wait time when STOP mode is released */
	OSTS = 0x07;			/* OSTS2=OSTS1=OSTS0=1: 2^18/fx */

	CSC = 0b00000000;		/* MSTOP=0: X1 operating
								XTSTOP=0: XT1 operating
								HIOSTOP=0: internal high-speed oscillator operating */

/*	OSMC = 0x01;			 FSEL=1: operates at a frequency over higher than 10MHz */

	while(OSTC != 0xff);		/* oscillation stabilization ? */

	CKC = 0b00001000;		/* CLS=0: fCLK = main system clock (fMAIN)
					   MCS=0: fMAIN = internal high-speed oscillation clock (fIH)
					   CSS=MCM0=MDIV2=MDIV1=MDIV0=0: fCLK = fIH */

/*	MCM0 = 1;				 fCLK: fIH -> fMX */

/*	while (MCS == 0) {
	}						 wait until MCS=1 (fCLK=fMX) */

	HIOTRM = 0x10;			/* TTRM4=TTRM3=TTRM2=TTRM1=TTRM0=0: clock correction value = 亇0% (default) */

	/****************************************
	 low-voltage detector */
	LVIM = 0x00;			/* LVION=0: disable operation
					   LVISEL=0: detects level of supply voltage (VDD)
					   LVIMD=0: generates an interrupt signal when VDD drops lower than VLVI
					   LVIF=0: LVI operation is disabled */

	LVIS = 0x0e;			/* LVIS3=LVIS2=LVIS1=1, LVIS0=0: 2.07亇0.1V */

	/*****************************************
	 flash memory */
	BECTL = 0x00;			/* FLMDPUP=0: selects pul-down */

	/*****************************************
	 enable or disable each peripheral hardware */
	PER0 = 0b11111101;		/* RTCEN=DACEN=ADCEN=IIC0EN=SAU1EN=SAU0EN=TAU0EN=1: supplies input clock to RTC, DAC, ADC, IIC0, SAU0, SAU1 and TAU0 */

	PER1 = 0b00000000;		/* EXBEN=0: stops input clock supply to external bus interface */
}

/***************************************************************************
*	Title: port initial setting
****************************************************************************
*	Module:	static void f_ini_port(void)
*	Arg:
*	Ret:
***************************************************************************/
static void f_ini_port(void)
{
	/*****************************************
	 port 0 */
	PIM0 = 0x00;		/* PIM04=PIM03=0: normal input buffer for P03-04 */
	POM0 = 0x00;		/* POM04=POM03=POM02=0: normal output mode for P02-04 */
	P0 = 0x00;			/* P00-06: low */
	PU0 = 0x00;			/* P00-06: on-chip pull-up resistor not connected */
	PM0 = 0xff;			/* P00-06: input mode */

	/*****************************************
	 port 1 */
	P1 = 0x00;			/* P10-17: low */
	PU1 = 0x00;			/* P10-17: on-chip pull-up resistor not connected */
	PM1 = 0xff;			/* P10-17: input mode */

	/*****************************************
	 port 2 */
	P2 = 0x00;			/* P20-27: low */
	PM2 = 0xff;			/* P20-27: input mode */

	/*****************************************
	 port 3 */
	P3 = 0x00;			/* P30-31: low */
	PU3 = 0x00;			/* P30-31: on-chip pull-up resistor not connected */
	PM3 = 0xff;			/* P30-31: input mode */

	/*****************************************
	 port 4 */
	PIM4 = 0x00;		/* PIM44=PIM43=0: normal input buffer for P43-44 */
	POM4 = 0x00;		/* POM45=POM43=0: normal output mode P43 & P45 */	
	P4 = 0x00;			/* P40-47: low */
	PU4 = 0x00;			/* P40-47: on-chip pull-up resistor not connected */
	PM4 = 0xff;			/* P40-47: input mode */

	/*****************************************
	 port 5 */
	P5 = 0x00;			/* P50-57: low */
	PU5 = 0x00;			/* P50-57: on-chip pull-up resistor not connected */
	PM5 = 0xff;			/* P50-57: input mode */

	/*****************************************
	 port 6 */
	P6 = 0x00;			/* P60-67: low */
	PU6 = 0x00;			/* P64-67: on-chip pull-up resistor not connected */
	PM6 = 0xff;			/* P60-67: input mode */

	/*****************************************
	 port 7 */
	P7 = 0x00;			/* P70-77: low */
	PU7 = 0x00;			/* P70-77: on-chip pull-up resistor not connected */
	PM7 = 0xff; 		/* P70-77: input mode */

	/*****************************************
	 port 8 */
	P8 = 0x00;			/* P80-87: low */
	PU8 = 0x00;			/* P80-87: on-chip pull-up resistor not connected */
	PM8 = 0xff;			/* P80-87: input mode */

	/*****************************************
	 port 11 */
	P11 = 0x00;			/* P110-111: low */
	PM11 = 0xff;		/* P110-111: input mode */

	/*****************************************
	 port 12 */
	P12 = 0x00;			/* P120-124: low */
	PU12 = 0x00;		/* P120: on-chip pull-up resistor not connected */
	PM12 = 0xff;		/* P120: input mode */

	/*****************************************
	 port 13 */
	P13 = 0x00;			/* P130-131: low */
	PU13 = 0x00;		/* P131: on-chip pull-up resistor not connected */
	PM13 = 0xfe;		/* P130-131: input mode */

	/*****************************************
	 port 14 */
	PIM14 = 0x00;		/* PIM143=PIM142=0: normal input buffer for P142-143 */
	POM14 = 0x00;		/* POM144=POM143=POM142=0: normal output mode for P142-144 */
	P14 = 0x00;			/* P140-145: low */
	PU14 = 0x00;		/* P140-145: on-chip pull-up resistor not connected */
	PM14 = 0xff;		/* P140-145: input mode */

	/*****************************************
	 port 15 */
	P15 = 0x00;			/* P150-157: low */
	PM15 = 0xff;		/* P150-157: input mode */

	/*****************************************
	 A/D port */
	ADPC = 0x10;		/* P20-P27, P150-157: all digital ports */
}

/***************************************************************************
*	Title:	peripheral register initial setting
****************************************************************************
*	Module:	static void f_ini_reg(void)
*	Arg:
*	Ret:
***************************************************************************/
static void f_ini_reg(void)
{

	/****************************************
	 The folloing setting ares default values.
	 Please change them if necessary.
	 ****************************************/

	/*****************************************
	 timer array unit setting */
	TPS0 = 0x0000;		/* CK00=CK01=fCLK */

	TIS0 = 0x00;		/* TIS00-7=0: input signal of timer input pin (TI0-7) */

	NFEN1 = 0x00;		/* TNFEN00-7=0: noise filter of timer input pin (TI0-7) off */

	TOE0 = 0x0000;		/* TOE00-7=0: timer output (TO0-7) operation stopped by count operation */

	TO0 = 0x0000;		/* TO00-7=0: timer output (TO0-7) value: "0" */

	TOL0 = 0x0000;		/* TOL00-7=0: timer output (TO0-7) level: postive logic output (active-high) */

	TOM0 = 0x0000;		/* TOM00-7=0: timer output (TO0-7) mode: toggle mode */

	ISC = 0x00;			/* ISC0=ISC1=0: normal operation (LIN-bus is not used) */

	/****************************************
	 timer channel 0 */
	TMR00 = 0x0000;			/* CKS00=0: operation clock CK00 set by PRS register
					   CCS00=0: operation clock MCK specified by CKS00 bit
					   MASTER00=0: stand-alone mode
					   STS002-0=0: only software trigger start is valid
					   MD003-0=0: interval timer mode, no timer interrupt when counting starts */