/************************************************************
File Name	: camif.c
Descriptions
 -S3C2440 camera test routines & basic libraries
History
 - July 23, 2003. Draft Version 0.0 by purnnamu
 - Janualy 15, 2004. Modifed by Boaz

Copyright 2004 SAMSUNG Electronics.
However, Anybody can use this code without our permission.  
*************************************************************/

#include "def.h"
#include "option.h"
#include "2440addr.h"
#include "2440lib.h"

#include "camif.h"
#include "camproset.h" // for camera setting

//*****************************************************************************
#define MVAL		(13)
#define MVAL_USED 	(0)		//0=each frame   1=rate by MVAL
#define BSWP		(0)		//Byte swap control
#define HWSWP		(0)		//Half word swap control

#define M5D(n) ((n) & 0x1fffff)	// To get lower 21bits

//TFT 240320
#define LCD_XSIZE_TFT_240320 	(240)	
#define LCD_YSIZE_TFT_240320 	(320)

//TFT 240320
//#define SCR_XSIZE_TFT_240320 	(640)
//#define SCR_YSIZE_TFT_240320 	(480)
#define SCR_XSIZE_TFT_240320 	(240)
#define SCR_YSIZE_TFT_240320 	(320)

//TFT240320
#define HOZVAL_TFT_240320	(LCD_XSIZE_TFT_240320-1)
#define LINEVAL_TFT_240320	(LCD_YSIZE_TFT_240320-1)

//Timing parameter for LCD LQ035Q7DB02
#define VBPD_240320		(2)		//垂直同步信號的后肩
#define VFPD_240320		(2)		//垂直同步信號的前肩
#define VSPW_240320		(4)		//垂直同步信號的脈寬

#define HBPD_240320		(8)		//水平同步信號的后肩
#define HFPD_240320		(8)		//水平同步信號的前肩
#define HSPW_240320		(6)		//水平同步信號的脈寬

#define CLKVAL_TFT_240320	(3) 	
//FCLK=180MHz,HCLK=90MHz,VCLK=6.5MHz

#define CLKVAL_TFT_640480	(1)		
//元太6.4寸TFT液晶屏V16C6448AC時鐘頻率典型值為25.175MHz
//FCLK = 180MHz, HCLK = PCLK = 90MHz
//VCLK = HCLK / [(CLKVAL+1) * 2]	 ( CLKVAL >= 0 )
//VCLK = 45MHz		//  34MHz < VCLK < 40MHz

//TFT 640480
#define LCD_XSIZE_TFT_640480 	(640)	
#define LCD_YSIZE_TFT_640480 	(480)

//TFT 640480
#define SCR_XSIZE_TFT_640480 	(640)
#define SCR_YSIZE_TFT_640480 	(480)

//TFT640480
#define HOZVAL_TFT_640480	(LCD_XSIZE_TFT_640480-1)
#define LINEVAL_TFT_640480	(LCD_YSIZE_TFT_640480-1)

//以下參數只針對元太6.4寸TFT液晶屏V16C6448AC
#define VGA350_MODE		0
#define FREEDOM_MODE		1

#if VGA350_MODE
	#define VBPD_640480		(33)	//垂直同步信號的后肩		VGA350模式，都是負極性
	#define VFPD_640480		(10)		//垂直同步信號的前肩
	#define VSPW_640480		(2)		//垂直同步信號的脈寬

	#define HBPD_640480		(48)		//水平同步信號的后肩
	#define HFPD_640480		(16)		//水平同步信號的前肩
	#define HSPW_640480		(96)		//水平同步信號的脈寬
#elif   FREEDOM_MODE
	#define VBPD_640480		(20)	//垂直同步信號的后肩		FREEDOM模式，都是正極性
	#define VFPD_640480		(16)		//垂直同步信號的前肩
	#define VSPW_640480		(2)		//垂直同步信號的脈寬

	#define HBPD_640480		(48)		//水平同步信號的后肩
	#define HFPD_640480		(16)		//水平同步信號的前肩
	#define HSPW_640480		(96)		//水平同步信號的脈寬
#endif

#if( DISP_TYPE == 1 )
	volatile static unsigned short LCD_BUFFER_CAM[SCR_YSIZE_TFT_240320][SCR_XSIZE_TFT_240320];
#elif( DISP_TYPE == 2 )
	volatile static unsigned short LCD_BUFFER_CAM[SCR_YSIZE_TFT_640480][SCR_XSIZE_TFT_640480];
#endif
//*****************************************************************************

volatile U32 camTestMode;
volatile U32 camCodecCaptureCount;
volatile U32 camPviewCaptureCount;
volatile U32 camCodecStatus;
volatile U32 camPviewStatus;
volatile U32 amount;

U32 save_GPJCON, save_GPJDAT, save_GPJUP;

U8 flagCaptured_P = 0;
U8 flagCaptured_C = 0;

extern void Lcd_Tft_V16C6448AC_Init( void ) ;
//*****************************************************************************
static void LCD_LTS350Q1_PE1_Init( void )
{
	rLCDCON1 = rLCDCON1 & 0x3fffe; // ENVID Off

	rGPCUP = 0xffffffff; // Disable Pull-up register
	rGPCCON = 0xaaaa56a9; //Initialize VD[7:0],LCDVF[2:0],VM,VFRAME,VLINE,VCLK,LEND 

	rGPDUP = 0xffffffff; // Disable Pull-up register
	rGPDCON = 0xaaaaaaaa; //Initialize VD[15:8]

	rLCDCON1 = ( CLKVAL_TFT_240320 << 8 ) | ( MVAL_USED << 7 ) | ( 3 << 5 ) | ( 12 << 1 ) | 0;
	// TFT LCD panel,12bpp TFT,ENVID=off
	rLCDCON2 = ( VBPD_240320 << 24 ) | ( LINEVAL_TFT_240320 << 14 ) | ( VFPD_240320 << 6 ) | ( VSPW_240320 );
	rLCDCON3 = ( HBPD_240320 << 19 ) | ( HOZVAL_TFT_240320 << 8 ) | ( HFPD_240320 );
	rLCDCON4 = ( MVAL << 8 ) | ( HSPW_240320 );
	rLCDCON5 = ( 1 << 11 ) | ( 0 << 9 ) | ( 0 << 8 ) | ( 0 << 6 ) | ( BSWP << 1 ) | ( HWSWP );	//FRM5:6:5,HSYNC and VSYNC are inverted

	rLCDSADDR1 = ( ( ( U32 ) LCD_BUFFER_CAM >> 22 ) << 21 ) | M5D( ( U32 ) LCD_BUFFER_CAM >> 1 );
	rLCDSADDR2 = M5D( ( ( U32 ) LCD_BUFFER_CAM + ( SCR_XSIZE_TFT_240320 * LCD_YSIZE_TFT_240320 * 2 ) ) >> 1 );
	rLCDSADDR3 = ( ( ( SCR_XSIZE_TFT_240320 - LCD_XSIZE_TFT_240320 ) / 1 ) << 11 ) | ( LCD_XSIZE_TFT_240320 / 1 );
	rLCDINTMSK |= ( 3 ); // MASK LCD Sub Interrupt
	rTCONSEL &= ~( ( 1 << 4 ) | 1 ); // Disable LCC3600, LPC3600
	rTPAL = 0; // Disable Temp Palette

	rLCDCON1 |= 1; // ENVID=ON
}


/**************************************************************
**************************************************************/
static void Lcd_V16C6448AC_Init( void )
{
	rLCDCON1 = rLCDCON1 & 0x3fffe; // ENVID Off

	rGPCUP = 0xffffffff; // Disable Pull-up register
	rGPCCON = 0xaaaa56a9; //Initialize VD[7:0],LCDVF[2:0],VM,VFRAME,VLINE,VCLK,LEND 

	rGPDUP = 0xffffffff; // Disable Pull-up register
	rGPDCON = 0xaaaaaaaa; //Initialize VD[15:8]

	rLCDCON1 = ( CLKVAL_TFT_640480 << 8 ) | ( MVAL_USED << 7 ) | ( 3 << 5 ) | ( 12 << 1 ) | 0;
	// TFT LCD panel,12bpp TFT,ENVID=off
	rLCDCON2 = ( VBPD_640480 << 24 ) | ( LINEVAL_TFT_640480 << 14 ) | ( VFPD_640480 << 6 ) | ( VSPW_640480 );
	rLCDCON3 = ( HBPD_640480 << 19 ) | ( HOZVAL_TFT_640480 << 8 ) | ( HFPD_640480 );
	rLCDCON4 = ( MVAL << 8 ) | ( HSPW_640480 );
	rLCDCON5 = ( 1 << 11 ) | ( 0 << 9 ) | ( 0 << 8 ) | ( 0 << 6 ) | ( BSWP << 1 ) | ( HWSWP );	//FRM5:6:5,HSYNC and VSYNC are inverted

	rLCDSADDR1 = ( ( ( U32 ) LCD_BUFFER_CAM >> 22 ) << 21 ) | M5D( ( U32 ) LCD_BUFFER_CAM >> 1 );
	rLCDSADDR2 = M5D( ( ( U32 ) LCD_BUFFER_CAM + ( SCR_XSIZE_TFT_640480 * LCD_YSIZE_TFT_640480 * 2 ) ) >> 1 );
	rLCDSADDR3 = ( ( ( SCR_XSIZE_TFT_640480 - LCD_XSIZE_TFT_640480 ) / 1 ) << 11 ) | ( LCD_XSIZE_TFT_640480 / 1 );
	rLCDINTMSK |= ( 3 ); // MASK LCD Sub Interrupt
	rTCONSEL &= ~( ( 1 << 4 ) | 1 ); // Disable LCC3600, LPC3600
	rTPAL = 0; // Disable Temp Palette

	rLCDCON1 |= 1; // ENVID=ON
}

//*****************************************************************************

void Camera_Test( void )
{
	int i;

	Uart_Printf( "\nCamera Preview Test\n" );

	CamReset();

	// Initializing camif
	rCLKCON |= ( 1 << 19 ); // enable camclk
	CamPortSet();	
	//ChangeUPllValue(60, 4, 1);		// UPLL clock = 96MHz, PLL input 16.9344MHz
	//--- hzh
	ChangeUPllValue( 56 , 2 , 1 );		// UPLL clock = 96MHz, PLL input 12MHz
	//---
	rCLKDIVN |= ( 1 << 3 ); // UCLK 48MHz setting for UPLL 96MHz
	// 0:48MHz, 1:24MHz, 2:16MHz, 3:12MHz...
	// Camera clock = UPLL/[(CAMCLK_DIV+1)X2]

	switch ( USED_CAM_TYPE )
	{
		case CAM_AU70H :
			if ( AU70H_VIDEO_SIZE == 1152 )
				SetCAMClockDivider( CAMCLK24000000 ); //Set Camera Clock for SXGA
			if ( AU70H_VIDEO_SIZE == 640 )
				SetCAMClockDivider( CAMCLK16000000 ); //Set Camera Clock for VGA
			break;
		case CAM_S5X3A1 :
			SetCAMClockDivider( CAMCLK24000000 ); //Set Camera Clock for SXGA
			break;
		default :
			// 24MHz
			SetCAMClockDivider( CAMCLK24000000 ); //Set Camera Clock 24MHz s5x532, ov7620
			break;
	}

	// Initializing camera module
	CamModuleReset(); // s5x532 must do this..
	Delay( 100 ); // ready time of s5x433, s5x532 IIC interface. needed...
	CameraModuleSetting();

	Uart_Printf( "Initializing end...\n" );

	Test_CamPreview() ;

	Uart_Printf( "\nCamera Preview Test End\n" );

	//	CamModuleReset(); // s5x532 must do this..

	rCLKCON &= ~( 1 << 19 ); // disable camclk
	
#if( DISP_TYPE == 1 )	
	Lcd_Tft_LTS350Q1_PE1_Init() ;		//
#elif( DISP_TYPE == 2 )
	Lcd_Tft_V16C6448AC_Init() ;		//Modufied by GongJun
#endif
}


void CamPortSet( void )
{
	save_GPJCON = rGPJCON;
	save_GPJDAT = rGPJDAT;
	save_GPJUP = rGPJUP;

	rGPJCON = 0x2aaaaaa;
	rGPJDAT = 0;
	rGPJUP = 0;

	//--- hzh
	rGPGCON &= ~( 3 << 24 );
	rGPGCON |= 1 << 24;
	rGPGUP |= 1 << 12;
#if (USED_CAM_TYPE==CAM_OV7620)
	rGPGDAT &= ~( 1 << 12 );
#else
	rGPGDAT |= 1 << 12;
#endif
	//---
}

void CamPortReturn( void )
{
	rGPJCON = save_GPJCON;
	rGPJDAT = save_GPJDAT;
	rGPJUP = save_GPJUP;
}

void CamPreviewIntUnmask( void )
{
	rINTSUBMSK &= ~( BIT_SUB_CAM_P );//INT CAMERA Port A ENABLE 
	rINTMSK &= ~( BIT_CAM );
}

void CamCodecIntUnmask( void )
{
	rINTSUBMSK &= ~( BIT_SUB_CAM_C );//INT CAMERA Port B ENABLE 
	rINTMSK &= ~( BIT_CAM );
}

void CamPreviewIntMask( void )
{
	rINTSUBMSK |= BIT_SUB_CAM_P;//INT CAMERA Port A ENABLE 
	rINTMSK |= ( BIT_CAM );
}

void CamCodecIntMask( void )
{
	rINTSUBMSK |= BIT_SUB_CAM_C;//INT CAMERA Port B ENABLE 
	rINTMSK |= ( BIT_CAM );
}


/******************************************************
 *  																								*    
 *  					 camera interface initialization							*
 *  																		  					*     
 *******************************************************/

void CamReset( void )
{
	rCIGCTRL |= ( 1 << 31 ); //camera I/F soft reset
	Delay( 10 );
	rCIGCTRL &= ~( 1 << 31 );
}

void CamModuleReset( void )
{
	switch ( USED_CAM_TYPE )
	{
		case CAM_OV7620 :
			// reset - active high
			//case CAM_S5X532 : // reset - active low, but H/W inverted.. so, in this case active high, masked by hzh
		case CAM_S5X433 :
			// reset - active low, but H/W inverted.. so, in this case active high
		case CAM_S5X3A1 :
			// reset - active low, but H/W inverted.. so, in this case active high
			rCIGCTRL |= ( 1 << 30 );	  //external camera reset high
			Delay( 30 );
			rCIGCTRL &= ~( 1 << 30 );	//external camera reset low
			break;
		case CAM_S5X532 :
			// reset - active low, move here by hzh
		case CAM_AU70H :
			// reset - active low
		default :
			rCIGCTRL &= ~( 1 << 30 );	//external camera reset low
			Delay( 10 );
			rCIGCTRL |= ( 1 << 30 ); //external camera reset high
			break;
	}
}

// 0:48MHz, 1:24MHz, 2:16MHz, 3:12MHz...
// Camera clock = UPLL/[(CAMCLK_DIV+1)X2]
void SetCAMClockDivider( int divn )
{
	rCAMDIVN = ( rCAMDIVN & ~( 0xf ) ) | ( 1 << 4 ) | ( divn ); // CAMCLK is divided..
}

/* Description of Parameters
CoDstWidth: Destination Width of Codec Path
CoDstHeight: Destination Height of Codec Path
PrDstWidth: Destination Width of Preview Path
PrDstHeight: Destination Height of Preview Path
WinHorOffset: Size of Window Offset for Horizontal Direction
WinVerOffset: Size of Window Offset for Vertical Direction
CoFrameBuffer: Start Address for Codec DMA
PrFrameBuffer: Start Address for Previe DMA
*/
void CamInit( U32 CoDstWidth , U32 CoDstHeight , U32 PrDstWidth , U32 PrDstHeight , U32 WinHorOffset ,
	U32 WinVerOffset , U32 CoFrameBuffer , U32 PrFrameBuffer )
{
	U32 WinOfsEn;
	U32 divisor, multiplier;
	U32 MainBurstSizeY, RemainedBurstSizeY, MainBurstSizeC, RemainedBurstSizeC, MainBurstSizeRGB, RemainedBurstSizeRGB;
	U32 H_Shift, V_Shift, PreHorRatio, PreVerRatio, MainHorRatio, MainVerRatio;
	U32 SrcWidth, SrcHeight;
	U32 ScaleUp_H_Co, ScaleUp_V_Co, ScaleUp_H_Pr, ScaleUp_V_Pr;

	//constant for calculating codec dma address
	if ( CAM_CODEC_OUTPUT )
		divisor = 2; //CCIR-422
	else