?? fx2.lst
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C51 COMPILER V7.50 FX2 11/07/2006 14:50:05 PAGE 1
C51 COMPILER V7.50, COMPILATION OF MODULE FX2
OBJECT MODULE PLACED IN .\Fx2.obj
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE C:\Cypress\USB\Target\Inc\Fx2.h ROM(COMPACT) OPTIMIZE(9,SPEED) REGFILE(.\fx
-2_ata.ORC) BROWSE ORDER INCDIR(c:\cypress\usb\target\inc) DEFINE(GPIF=0,FLASH=0,DEVICE_TYPE_IS_SCSI=1,DEVICE_TYPE_IS_IDE
-=1,VBUS_DETECT=1) DEBUG OBJECTEXTEND CODE PRINT(.\Fx2.lst) OBJECT(.\Fx2.obj)
line level source
1 //-----------------------------------------------------------------------------
2 // File: FX2.h
3 // Contents: EZ-USB FX2 constants, macros, datatypes, globals, and library
4 // function prototypes.
5 //
6 // Copyright (c) 2000 Cypress Semiconductor, All rights reserved
7 //-----------------------------------------------------------------------------
8 #ifndef FX2_H //Header sentry
9 #define FX2_H
10
11 #define INTERNAL_DSCR_ADDR 0x0080 // Relocate Descriptors to 0x80
12 #define bmSTRETCH 0x07
13 #define FW_STRETCH_VALUE 0x0 // Set stretch to 0 in frameworks
14 // Note: a RevE eratta states that stretch must=0 to set OUTxBC
15
16 //-----------------------------------------------------------------------------
17 // Constants
18 //-----------------------------------------------------------------------------
19 #define TRUE 1
20 #define FALSE 0
21
22 #define bmBIT0 0x01
23 #define bmBIT1 0x02
24 #define bmBIT2 0x04
25 #define bmBIT3 0x08
26 #define bmBIT4 0x10
27 #define bmBIT5 0x20
28 #define bmBIT6 0x40
29 #define bmBIT7 0x80
30
31 #define DEVICE_DSCR 0x01 // Descriptor type: Device
32 #define CONFIG_DSCR 0x02 // Descriptor type: Configuration
33 #define STRING_DSCR 0x03 // Descriptor type: String
34 #define INTRFC_DSCR 0x04 // Descriptor type: Interface
35 #define ENDPNT_DSCR 0x05 // Descriptor type: End Point
36 #define DEVQUAL_DSCR 0x06 // Descriptor type: Device Qualifier
37 #define OTHERSPEED_DSCR 0x07 // Descriptor type: Other Speed Configuration
38
39 #define bmBUSPWR bmBIT7 // Config. attribute: Bus powered
40 #define bmSELFPWR bmBIT6 // Config. attribute: Self powered
41 #define bmRWU bmBIT5 // Config. attribute: Remote Wakeup
42
43 #define bmEPOUT bmBIT7
44 #define bmEPIN 0x00
45
46 #define EP_CONTROL 0x00 // End Point type: Control
47 #define EP_ISO 0x01 // End Point type: Isochronous
48 #define EP_BULK 0x02 // End Point type: Bulk
49 #define EP_INT 0x03 // End Point type: Interrupt
50
51 #define SUD_SIZE 8 // Setup data packet size
52
53 //////////////////////////////////////////////////////////////////////////////
C51 COMPILER V7.50 FX2 11/07/2006 14:50:05 PAGE 2
54 //Added for HID
55
56 #define SETUP_MASK 0x60 //Used to mask off request type
57 #define SETUP_STANDARD_REQUEST 0 //Standard Request
58 #define SETUP_CLASS_REQUEST 0x20 //Class Request
59 #define SETUP_VENDOR_REQUEST 0x40 //Vendor Request
60 #define SETUP_RESERVED_REQUEST 0x60 //Reserved or illegal request
61
62 //////////////////////////////////////////////////////////////////////////////
63
64
65 #define SC_GET_STATUS 0x00 // Setup command: Get Status
66 #define SC_CLEAR_FEATURE 0x01 // Setup command: Clear Feature
67 #define SC_RESERVED 0x02 // Setup command: Reserved
68 #define SC_SET_FEATURE 0x03 // Setup command: Set Feature
69 #define SC_SET_ADDRESS 0x05 // Setup command: Set Address
70 #define SC_GET_DESCRIPTOR 0x06 // Setup command: Get Descriptor
71 #define SC_SET_DESCRIPTOR 0x07 // Setup command: Set Descriptor
72 #define SC_GET_CONFIGURATION 0x08 // Setup command: Get Configuration
73 #define SC_SET_CONFIGURATION 0x09 // Setup command: Set Configuration
74 #define SC_GET_INTERFACE 0x0a // Setup command: Get Interface
75 #define SC_SET_INTERFACE 0x0b // Setup command: Set Interface
76 #define SC_SYNC_FRAME 0x0c // Setup command: Sync Frame
77 #define SC_ANCHOR_LOAD 0xa0 // Setup command: Anchor load
78
79 #define GD_DEVICE 0x01 // Get descriptor: Device
80 #define GD_CONFIGURATION 0x02 // Get descriptor: Configuration
81 #define GD_STRING 0x03 // Get descriptor: String
82 #define GD_INTERFACE 0x04 // Get descriptor: Interface
83 #define GD_ENDPOINT 0x05 // Get descriptor: Endpoint
84 #define GD_DEVICE_QUALIFIER 0x06 // Get descriptor: Device Qualifier
85 #define GD_OTHER_SPEED_CONFIGURATION 0x07 // Get descriptor: Other Configuration
86 #define GD_INTERFACE_POWER 0x08 // Get descriptor: Interface Power
87 #define GD_HID 0x21 // Get descriptor: HID
88 #define GD_REPORT 0x22 // Get descriptor: Report
89
90 #define GS_DEVICE 0x80 // Get Status: Device
91 #define GS_INTERFACE 0x81 // Get Status: Interface
92 #define GS_ENDPOINT 0x82 // Get Status: End Point
93
94 #define FT_DEVICE 0x00 // Feature: Device
95 #define FT_ENDPOINT 0x02 // Feature: End Point
96
97 #define I2C_IDLE 0 // I2C Status: Idle mode
98 #define I2C_SENDING 1 // I2C Status: I2C is sending data
99 #define I2C_RECEIVING 2 // I2C Status: I2C is receiving data
100 #define I2C_PRIME 3 // I2C Status: I2C is receiving the first byte of a string
101 #define I2C_STOP 5 // I2C Status: I2C waiting for stop completion
102 #define I2C_BERROR 6 // I2C Status: I2C error; Bit Error
103 #define I2C_NACK 7 // I2C Status: I2C error; No Acknowledge
104 #define I2C_OK 8 // I2C positive return code
105 #define I2C_WAITSTOP 9 // I2C Status: Wait for STOP complete
106
107 /*-----------------------------------------------------------------------------
108 Macros
109 -----------------------------------------------------------------------------*/
110
111 #define MSB(word) (BYTE)(((WORD)(word) >> 8) & 0xff)
112 #define LSB(word) (BYTE)((WORD)(word) & 0xff)
113
114 #define SWAP_ENDIAN(word) ((BYTE*)&word)[0] ^= ((BYTE*)&word)[1];\
115 ((BYTE*)&word)[1] ^= ((BYTE*)&word)[0];\
C51 COMPILER V7.50 FX2 11/07/2006 14:50:05 PAGE 3
116 ((BYTE*)&word)[0] ^= ((BYTE*)&word)[1]
117
118 #define EZUSB_IRQ_ENABLE() EUSB = 1
119 #define EZUSB_IRQ_DISABLE() EUSB = 0
120 #define EZUSB_IRQ_CLEAR() EXIF &= ~0x10 // IE2_
121
122 #define EZUSB_STALL_EP0() EP0CS |= bmEPSTALL
123 #define EZUSB_STALL_EP(ep_id) // fx2bug
124 #define EZUSB_UNSTALL_EP(ep_id) // fx2bug
125 #define EZUSB_GET_EP_STATUS(ep_id) // fx2bug
126 #define EZUSB_SET_EP_BYTES(ep_id,count) // fx2bug
127
128
129 // WRITEDELAY() has been replaced by SYNCDELAY; macro in fx2sdly.h
130 // ...it is here for backwards compatibility...
131
132 // the WRITEDELAY macro compiles to the time equivalent of 3 NOPs.
133 // It is used in the frameworks to allow for write recovery time
134 // requirements of certain registers. This is only necessary for
135 // EZ-USB FX parts. See the EZ-USB FX TRM for
136 // more information on write recovery time issues.
137 #define WRITEDELAY() {char writedelaydummy = 0;}
138 // if this firmware will never run on an EZ-USB FX part replace
139 // with:
140 // #define WRITEDELAY()
141
142 // macro to reset and endpoint data toggle
143 #define EZUSB_RESET_DATA_TOGGLE(ep) TOGCTL = (((ep & 0x80) >> 3) + (ep & 0x0F));\
144 TOGCTL |= bmRESETTOGGLE
145
146
147 #define EZUSB_ENABLE_RSMIRQ() (EICON |= 0x20) // Enable Resume Interrupt (EPFI_)
148 #define EZUSB_DISABLE_RSMIRQ() (EICON &= ~0x20) // Disable Resume Interrupt (EPFI_)
149 #define EZUSB_CLEAR_RSMIRQ() (EICON &= ~0x10) // Clear Resume Interrupt Flag (PFI_)
150
151 #define EZUSB_GETI2CSTATUS() (I2CPckt.status)
152 #define EZUSB_CLEARI2CSTATUS() if((I2CPckt.status == I2C_BERROR) || (I2CPckt.status == I2C_NACK))\
153 I2CPckt.status = I2C_IDLE;
154
155 #define EZUSB_ENABLEBP() (BREAKPT |= bmBPEN) // TGE fx2bug
156 #define EZUSB_DISABLEBP() (BREAKPT &= ~bmBPEN) // TGE fx2bug
157 #define EZUSB_CLEARBP() (BREAKPT |= bmBREAK) // TGE fx2bug
158 #define EZUSB_BP(addr) BPADDRH = (BYTE)(((WORD)addr >> 8) & 0xff);\
159 BPADDRL = (BYTE)addr // TGE fx2bug
160
161 #define EZUSB_EXTWAKEUP() (((WAKEUPCS & bmWU2) && (WAKEUPCS & bmWU2EN)) ||\
162 ((WAKEUPCS & bmWU) && (WAKEUPCS & bmWUEN)))
163
164 #define EZUSB_HIGHSPEED() (USBCS & bmHSM)
165
166 //-----------------------------------------------------------------------------
167 // Datatypes
168 //-----------------------------------------------------------------------------
169 typedef unsigned char BYTE;
170 typedef unsigned short WORD;
171 typedef unsigned long DWORD;
172 typedef bit BOOL;
173
174 #define INT0_VECT 0
175 #define TMR0_VECT 1
176 #define INT1_VECT 2
177 #define TMR1_VECT 3
C51 COMPILER V7.50 FX2 11/07/2006 14:50:05 PAGE 4
178 #define COM0_VECT 4
179 #define TMR2_VECT 5
180 #define WKUP_VECT 6
181 #define COM1_VECT 7
182 #define USB_VECT 8
183 #define I2C_VECT 9
184 #define INT4_VECT 10
185 #define INT5_VECT 11
186 #define INT6_VECT 12
187
188
189 // TGE fx2bug
190 #define SUDAV_USBVECT (0 << 2)
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