//CANCTRL:CAN control register 
#define BIT_REQOP2  (0X01<<7) //operation mode 
#define BIT_REQOP1  (0X01<<6) //operaiton mode
#define BIT_REQOP0  (0X01<<5) //operation mode
#define BIT_ABAT    (0X01<<4) //abort the transmit
#define BIT_OSM     (0X01<<3) //one send mode
#define BIT_CLKEN   (0X01<<2) //clockout enable
#define BIT_CLKPRE1 (0X01<<1) //clockout prescale
#define BIT_CLKPRE0 (0X01<<0) //clockout prescale

//interrupte flag register
#define BIT_MERIF  (0X01<<7) //message error interrupt flag
#define BIT_WAKIF  (0X01<<6) //wake up interrupt flag
#define BIT_ERRIF  (0X01<<5) //error interrupt flag
#define BIT_TX2IF  (0X01<<4) //TXB2 interrupt flag
#define BIT_TX1IF  (0X01<<3) //TXB1 interrupt flag
#define BIT_TX0IF  (0X01<<2) //TXB0 interrupt flag
#define BIT_RX1IF  (0X01<<1) //RXB1 interrupt flag
#define BIT_RX0IF  (0X01<<0) //RXB0 interrupt flag

//error flags register 
#define BIT_RX1OVER (0X01<<7) //RXB1 overflow
#define BIT_RX0OVER (0X01<<6) //RXB0 overflow
#define BIT_BUSOFF  (0X01<<5) //CAN bus turn off
#define BIT_TXERRP  (0X01<<4) //transmit passive error
#define BIT_RXERRP  (0X01<<3) //recept passive error
#define BIT_TXWARN  (0X01<<2) //transmit warning
#define BIT_RXWARN  (0X01<<1) //recept warning
#define BIT_ERWARN  (0X01<<0) //error warning


/********** MCP2515: SPI instuction word *******/
#define INSTRUCTION_RESET               0xC0
#define INSTRUCTION_READ                0x03

#define INSTRUCTION_READ_RXB0SIDH       0x90
#define INSTRUCTION_READ_RXB0D0         0x92

#define INSTRUCTION_READ_RXB1SIDH       0x94
#define INSTRUCTION_READ_RXB1D0         0x96

#define INSTRUCTION_WRITE               0x02

#define INSTRUCTION_WRITE_TXB0SIDH      0x40
#define INSTRUCTION_WRITE_TXB0D0        0x41

#define INSTRUCTION_WRITE_TXB1SIDH      0x42
#define INSTRUCTION_WRITE_TXB1D0        0x43

#define INSTRUCTION_WRITE_TXB2SIDH      0x44
#define INSTRUCTION_WRITE_TXB2D0        0x45

#define INSTRUCTION_RTS_TXB0            0x80
#define INSTRUCTION_RTS_TXB1            0x82
#define INSTRUCTION_RTS_TXB2            0x84

#define INSTRUCTION_READ_STATUS         0xA0
#define INSTRUCTION_READ_RXBn_STATUS    0xB0
#define INSTRUCTION_BIT_MODIFY          0x05	  


/******MCP2515: control register address *******/
#define REGISTER_BFPCTRL   0x0C //RXBF control register

#define REGISTER_RXB0CTRL  0x60 //RXB0 control register
#define REGISTER_RXB0SIDH  0x61 //RXB0 standard ID high 8 bytes
#define REGISTER_RXB0SIDL  0x62 //RXB0 standard ID low 8 bytes
#define REGISTER_RXB0EID8  0x63 //RXB0 extended ID high 8 bytes
#define REGISTER_RXB0EID0  0x64 //RXB0 extended ID low 8 bytes
#define REGISTER_RXB0DLC   0x65 //RXB0 data length control register
#define REGISTER_RXB0D0    0x66
#define REGISTER_RXB0D1    0x67
#define REGISTER_RXB0D2    0x68
#define REGISTER_RXB0D3    0x69
#define REGISTER_RXB0D4    0x6A
#define REGISTER_RXB0D5    0x6B
#define REGISTER_RXB0D6    0x6C
#define REGISTER_RXB0D7    0x6D

#define REGISTER_RXB1CTRL  0x70 //RXB1 control register
#define REGISTER_RXB1SIDH  0x71 //RXB1 standard ID high 8 bytes
#define REGISTER_RXB1SIDL  0x72 //RXB1 standard ID low 8 bytes
#define REGISTER_RXB1EID8  0x73 //RXB1 extended ID high 8 bytes
#define REGISTER_RXB1EID0  0x74 //RXB1 extended ID low 8 bytes
#define REGISTER_RXB1DLC   0x75 //RXB1 data length control register
#define REGISTER_RXB1D0    0x76
#define REGISTER_RXB1D1    0x77
#define REGISTER_RXB1D2    0x78
#define REGISTER_RXB1D3    0x79
#define REGISTER_RXB1D4    0x7A
#define REGISTER_RXB1D5    0x7B
#define REGISTER_RXB1D6    0x7C
#define REGISTER_RXB1D7    0x7D


#define REGISTER_TXRTSCTRL 0x0D //RTS(requie to send) control register

#define REGISTER_TXB0CTRL  0x30 //TXB0 control register					
#define REGISTER_TXB0SIDH  0x31 //TXB0 standard ID high 8 bytes
#define REGISTER_TXB0SIDL  0x32 //TXB0 standard ID low 8 bytes
#define REGISTER_TXB0EID8  0x33 //TXB0 extended ID high 8 bytes
#define REGISTER_TXB0EID0  0x34 //TXB0 extended ID low 8 bytes
#define REGISTER_TXB0DLC   0x35 //TXB0 data length control register     
#define REGISTER_TXB0D0    0x36
#define REGISTER_TXB0D1    0x37
#define REGISTER_TXB0D2    0x38
#define REGISTER_TXB0D3    0x39
#define REGISTER_TXB0D4    0x3A
#define REGISTER_TXB0D5    0x3B
#define REGISTER_TXB0D6    0x3C
#define REGISTER_TXB0D7    0x3D

#define REGISTER_TXB1CTRL  0x40 //TXB1 control register
#define REGISTER_TXB1SIDH  0x41 //TXB1 standard ID high 8 bytes
#define REGISTER_TXB1SIDL  0x42 //TXB1 standard ID low 8 bytes
#define REGISTER_TXB1EID8  0x43 //TXB1 extended ID high 8 bytes
#define REGISTER_TXB1EID0  0x44 //TXB1 extended ID low 8 bytes
#define REGISTER_TXB1DLC   0x45 //TXB1 data length control register
#define REGISTER_TXB1D0    0x46
#define REGISTER_TXB1D1    0x47
#define REGISTER_TXB1D2    0x48
#define REGISTER_TXB1D3    0x49
#define REGISTER_TXB1D4    0x4A
#define REGISTER_TXB1D5    0x4B
#define REGISTER_TXB1D6    0x4C
#define REGISTER_TXB1D7    0x4D

#define REGISTER_TXB2CTRL  0x50 //TXB2 control register
#define REGISTER_TXB2SIDH  0x51 //TXB2 standard ID high 8 bytes
#define REGISTER_TXB2SIDL  0x52 //TXB2 standard ID low 8 bytes
#define REGISTER_TXB2EID8  0x53 //TXB2 extended ID high 8 bytes
#define REGISTER_TXB2EID0  0x54 //TXB2 extended ID low 8 bytes
#define REGISTER_TXB2DLC   0x55 //TXB2 data length control register
#define REGISTER_TXB2D0    0x56
#define REGISTER_TXB2D1    0x57
#define REGISTER_TXB2D2    0x58
#define REGISTER_TXB2D3    0x59
#define REGISTER_TXB2D4    0x5A
#define REGISTER_TXB2D5    0x5B
#define REGISTER_TXB2D6    0x5C
#define REGISTER_TXB2D7    0x5D

#define REGISTER_CANSTAT   0x0E //status register
#define REGISTER_CANCTRL   0x0F //control register

#define REGISTER_TEC       0x1C //transmit error counter register
#define REGISTER_REC       0x1D //recept error counter register

#define REGISTER_CNF3      0x28 //configure register 3
#define REGISTER_CNF2      0x29 //configure register 2
#define REGISTER_CNF1      0x2A //configure register 1

#define REGISTER_CANINTE   0x2B //interrupt enable register
#define REGISTER_CANINTF   0x2C //interrupt flag register

#define REGISTER_EFLG      0x2D //error flag register


/*****MCP2515: RXF0,RXF1,RXF2,RXF3,RXF4,RXF5*****/
#define REGISTER_RXF0SIDH  0x00
#define REGISTER_RXF0SIDL  0x01
#define REGISTER_RXF0EID8  0x02	
#define REGISTER_RXF0EID0  0x03

#define REGISTER_RXF1SIDH  0x04
#define REGISTER_RXF1SIDL  0x05
#define REGISTER_RXF1EID8  0x06
#define REGISTER_RXF1EID0  0x07

#define REGISTER_RXF2SIDH  0x08
#define REGISTER_RXF2SIDL  0x09
#define REGISTER_RXF2EID8  0x0A
#define REGISTER_RXF2EID0  0x0B

#define REGISTER_RXF3SIDH  0x10
#define REGISTER_RXF3SIDL  0x11
#define REGISTER_RXF3EID8  0x12
#define REGISTER_RXF3EID0  0x13

#define REGISTER_RXF4SIDH  0x14
#define REGISTER_RXF4SIDL  0x15
#define REGISTER_RXF4EID8  0x16
#define REGISTER_RXF4EID0  0x17

#define REGISTER_RXF5SIDH  0x18
#define REGISTER_RXF5SIDL  0x19		
#define REGISTER_RXF5EID8  0x1A
#define REGISTER_RXF5EID0  0x1B

/*****MCP2515: RXM0,RXM1*****/	
#define REGISTER_RXM0SIDH  0x20
#define REGISTER_RXM0SIDL  0x21	
#define REGISTER_RXM0EID8  0x22
#define REGISTER_RXM0EID0  0x23

#define REGISTER_RXM1SIDH  0x24			
#define REGISTER_RXM1SIDL  0x25
#define REGISTER_RXM1EID8  0x26
#define REGISTER_RXM1EID0  0x27