//----------------------------------------------------------------------------
//
//  S1D13700.H 
//
//  Copyright (c) 2003 Epson Research and Development, Inc.
//  All rights reserved.
//
//----------------------------------------------------------------------------

// comment the next line to use S1D13700BOB evaluation board
#define S1D13700BOB

#define REG_OFFSET					0x8000

#ifndef S1D13700BOB
//Modify the following addresses appropriate platforms. 
	#define S1D_PHYSICAL_VMEM_ADDR		0x10000000L
	#define S1D_PHYSICAL_REG_ADDR		S1D_PHYSICAL_VMEM_ADDR + REG_OFFSET
#endif

// Uncomment the next line to use indirect mode.
//#define INDIRECT

// Custom Datatypes used.
typedef unsigned char  UInt8;
typedef unsigned short UInt16;
typedef unsigned long  UInt32;

// S1D13700 Register Names
#define REG0000_SYSTEMSET_P1		0x00
#define REG0001_SYSTEMSET_P2		0x01
#define REG0002_SYSTEMSET_P3		0x02
#define REG0003_SYSTEMSET_P4		0x03
#define REG0004_SYSTEMSET_P5		0x04
#define REG0005_SYSTEMSET_P6		0x05
#define REG0006_SYSTEMSET_P7		0x06
#define REG0007_SYSTEMSET_P8		0x07
#define REG0008_SLEEPIN				0x08
#define REG0009_DISPONOFF			0x09
#define REG000A_DISPONOFF_P1		0x0a
#define REG000B_SCROLL_P1			0x0b
#define REG000C_SCROLL_P2			0x0c
#define REG000D_SCROLL_P3			0x0d
#define REG000E_SCROLL_P4			0x0e
#define REG000F_SCROLL_P5			0x0f
#define REG0010_SCROLL_P6			0x10
#define REG0011_SCROLL_P7			0x11
#define REG0012_SCROLL_P8			0x12
#define REG0013_SCROLL_P9			0x13
#define REG0014_SCROLL_P10			0x14
#define REG0015_CSRFORM_P1			0x15
#define REG0016_CSRFORM_P2			0x16
#define REG0017_CSRDIR_P1			0x17
#define REG0018_OVLAY_P1			0x18
#define REG0019_CGRAMADDR_P1		0x19
#define REG001A_CGRAMADDR_P2		0x1a
#define REG001B_HDOTSCR_P1			0x1b
#define REG001C_CSRW_P1				0x1c
#define REG001D_CSRW_P2				0x1d
#define REG001E_CSRR_P1				0x1e
#define REG001F_CSRR_P2				0x1f
#define REG0020_GRAYSCALE_P1		0x20

//indirect mode command set
#define CMD_SYSTEM_SET				0x40
#define CMD_SLEEP_IN				0x53
#define CMD_DISPOFF					0x58
#define CMD_DISPON					0x59
#define CMD_SCROLL					0x44
#define CMD_CSRFORM					0x5d
#define CMD_CSRDIR_RIGHT			0x4c
#define CMD_CSRDIR_LEFT				0x4d
#define CMD_CSRDIR_UP				0x4e
#define CMD_CSRDIR_DOWN				0x4f
#define CMD_OVLAY					0x5b
#define CMD_CG_RAM_ADDR				0x5c
#define CMD_HDOT_SCR				0x5a
#define CMD_CSRW					0x46
#define CMD_CSRR					0x47
#define CMD_MWRITE					0x42
#define CMD_MREAD					0x43
#define CMD_GRAY_SCALE				0x60


typedef struct
{
	UInt16 Index;
	UInt8  Value;
} S1D_REGS;


#define PANEL_WIDTH					640
#define PANEL_HEIGHT				200

// Panel: 640x200x1bpp 
static S1D_REGS aS1DRegs[] = 
{
	{ REG0000_SYSTEMSET_P1,		0x30 },
	{ REG0001_SYSTEMSET_P2,		0x87 },
	{ REG0002_SYSTEMSET_P3,		0x07 },
	{ REG0003_SYSTEMSET_P4,		0x4F },
	{ REG0004_SYSTEMSET_P5,		0x53 },
	{ REG0005_SYSTEMSET_P6,		0xC7 },
	{ REG0006_SYSTEMSET_P7,		0x50 },
	{ REG0007_SYSTEMSET_P8,		0x00 },
	{ REG0008_SLEEPIN,			0x00 },
	{ REG0009_DISPONOFF,		0x01 },
	{ REG000A_DISPONOFF_P1,		0x05 },
	{ REG000B_SCROLL_P1,		0x00 },
	{ REG000C_SCROLL_P2,		0x00 },
	{ REG000D_SCROLL_P3,		0xc7 },
	{ REG000E_SCROLL_P4,		0x80 },
	{ REG000F_SCROLL_P5,		0x1f },
	{ REG0010_SCROLL_P6,		0x27 },
	{ REG0011_SCROLL_P7,		0x20 },
	{ REG0012_SCROLL_P8,		0x30 },
	{ REG0013_SCROLL_P9,		0x24 },
	{ REG0014_SCROLL_P10,		0x60 },
	{ REG0015_CSRFORM_P1,		0x07 },
	{ REG0016_CSRFORM_P2,		0x87 },
	{ REG0017_CSRDIR_P1,		0x00 },
	{ REG0018_OVLAY_P1,			0x00 },
	{ REG0019_CGRAMADDR_P1,		0x00 },
	{ REG001A_CGRAMADDR_P2,		0x70 },
	{ REG001B_HDOTSCR_P1,		0x00 },
	{ REG001C_CSRW_P1,			0x00 },
	{ REG001D_CSRW_P2,			0x00 },
	{ REG0020_GRAYSCALE_P1,		0x00 },
};