/*// TI File $Revision: /main/4 $
// Checkin $Date: August 2, 2006   16:57:00 $
//###########################################################################
//
// FILE:	F2808.cmd
//
// TITLE:	Linker Command File For F2808 Device
//
//###########################################################################*/
- stack 0x380
MEMORY
{
PAGE 0:    /* Program Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */

   RAML0       : origin = 0x008000, length = 0x00700     /* on-chip RAM block L0 */
   OTP         : origin = 0x3D7800, length = 0x000400     /* on-chip OTP */
   /*FLASHD      : origin = 0x3E8000, length = 0x004000     /* on-chip FLASH */
  /* FLASHC      : origin = 0x3EC000, length = 0x004000     /* on-chip FLASH */
   PRAMH0       : origin = 0x009000, length = 0x003000
   FLASH_A      : origin = 0x3F4000, length = 0x003F80     /* on-chip FLASH */
   CSM_RSVD    : origin = 0x3F7F80, length = 0x000076     /* Part of PRAMH0.  Program with all 0x0000 when CSM is in use. */
   /*BEGIN       : origin = 0x3F7FF6, length = 0x000002     /* Part of PRAMH0.  Used for "boot to Flash" bootloader mode. */
   BEGIN       : origin = 0x0, length = 0x000002 
   CSM_PWL     : origin = 0x3F7FF8, length = 0x000008     /* Part of PRAMH0.  CSM password locations in PRAMH0 */
   
   ROM         : origin = 0x3FF000, length = 0x000FC0     /* Boot ROM */
   RESET       : origin = 0x3FFFC0, length = 0x000002     /* part of boot ROM  */
   VECTORS     : origin = 0x3FFFC2, length = 0x00003E     /* part of boot ROM  */

PAGE 1 :   /* Data Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
           /* Registers remain on PAGE1                                                  */

   RAMM0       : origin = 0x000000, length = 0x000400     /* on-chip RAM block M0 */
   BOOT_RSVD   : origin = 0x000400, length = 0x000080     /* Part of M1, BOOT rom will use this for stack */
   RAMM1       : origin = 0x000480, length = 0x000380     /* on-chip RAM block M1 */
   RAML1       : origin = 0x008700, length = 0x00800     /* on-chip RAM block L1 */
   /*FLASHB      : origin = 0x3F0000, length = 0x004000     /* on-chip FLASH */
   /*RAMH0       : origin = 0x3FA000, length = 0x002000     /* on-chip RAM block H0 */
}

/* Allocate sections to memory blocks.
   Note:
         codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code 
                   execution when booting to flash
         ramfuncs  user defined section to store functions that will be copied from Flash into RAM
*/ 
 
SECTIONS
{
 
   /* Allocate program areas: */
   .cinit              : > PRAMH0      PAGE = 0
   .pinit              : > PRAMH0,     PAGE = 0
   .text               : > PRAMH0      PAGE = 0
   codestart           : > BEGIN       PAGE = 0
   ramfuncs            : LOAD = PRAMH0, 
                         RUN = RAML0, 
                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_END(_RamfuncsLoadEnd),
                         RUN_START(_RamfuncsRunStart),
                         PAGE = 0

   csmpasswds          : > CSM_PWL     PAGE = 0
   csm_rsvd            : > CSM_RSVD    PAGE = 0
   
   /* Allocate uninitalized data sections: */
   .stack              : > RAMM0       PAGE = 1
   .ebss               : > RAML1       PAGE = 1
   .esysmem            : > RAML1       PAGE = 1

   /* Initalized sections go in Flash */
   /* For SDFlash to program these, they must be allocated to page 0 */
   .econst             : > PRAMH0      PAGE = 0
   .switch             : > PRAMH0      PAGE = 0      

   /* Allocate IQ math areas: */
   IQmath              : > PRAMH0      PAGE = 0                  /* Math Code */
   IQmathTables        : > ROM         PAGE = 0, TYPE = NOLOAD   /* Math Tables In ROM */

   /* .reset is a standard section used by the compiler.  It contains the */ 
   /* the address of the start of _c_int00 for C Code.   /*
   /* When using the boot ROM this section and the CPU vector */
   /* table is not needed.  Thus the default type is set here to  */
   /* DSECT  */ 
   .reset              : > RESET,      PAGE = 0, TYPE = DSECT
   vectors             : > VECTORS     PAGE = 0, TYPE = DSECT
}

/*
//===========================================================================
// End of file.
//===========================================================================
*/