?? example_280xadcsoc.c
字號:
MAX_PWM=(Uint32)710000/U_SUM_PJ;
if(MAX_PWM>2495)
MAX_PWM=2495;
MAX_PWM_adj=(((Uint32)MAX_PWM*MOTOR_ADJ)/9000)+100;
if(MAX_PWM_adj>2495)
MAX_PWM_adj=2495;
//--------------------------------------------
TEMP_PWM=(MOTOR_ADJ>>7)+((MOTOR_ADJ>>8)*(MOTOR_ADJ>>8))+((MOTOR_ADJ>>9)*(MOTOR_ADJ>>9));
if(TEMP_PWM>600)
pwm_temp=600;
else
pwm_temp=TEMP_PWM;
//-------
//protect();
run_start();
//--計算輸入直流電壓--
cal_dc_in_vol();
//--過欠壓保護--
if(PROTECT_FLAG_reg.bit.FAULT_flag==0)
{
if((U_SUM>430)||(U_SUM<200))
{
PROTECT_FLAG_reg.bit.FAULT_flag=1;
GpioDataRegs.GPACLEAR.bit.GPIO25=1;
}
}
else
{
if((U_SUM<430)&&(U_SUM>200))
{
PROTECT_FLAG_reg.bit.FAULT_flag=0;
GpioDataRegs.GPASET.bit.GPIO25=1;
}
}
//-----------------------------------------
if(MOTOR_ADJ<12)
{
PROTECT_FLAG_reg.bit.stop_run_flag=1;
PROTECT_FLAG_reg.bit.soft_run_flag=0;
Soft_vol=50;
}
else
{
if(PROTECT_FLAG_reg.bit.stop_run_flag==1)
{
PROTECT_FLAG_reg.bit.stop_run_flag=0;
PROTECT_FLAG_reg.bit.soft_run_flag=1;
Soft_vol=50;
}
}
if(MOTOR_ADJ<35)
MT_325=75;
else
MT_325=89;
///////////////////////////////////////////
}
}
interrupt void adc_isr(void)
{
Uint16 i,temp,temp_i,TEMP2;
if(ConversionCount==3)
Voltage1[ConversionCount] = AdcRegs.ADCRESULT0 >>5;
else
Voltage1[ConversionCount] = AdcRegs.ADCRESULT0 >>4;
//Voltage2[ConversionCount] = AdcRegs.ADCRESULT1 >>4;
//Voltage3[ConversionCount] = AdcRegs.ADCRESULT2 >>6;
//Voltage4[ConversionCount] = AdcRegs.ADCRESULT3 >>4;
I_SUM128+=AdcRegs.ADCRESULT1 >>4;
U_SUM128+=AdcRegs.ADCRESULT2 >>4;
MOTOR_SUM128+=AdcRegs.ADCRESULT3 >>4;
//Voltage5[ConversionCount]=AdcRegs.ADCRESULT3 >>4;
//----------------------------------------------------------
if(PROTECT_FLAG_reg.bit.run_start_flag==1)
{
EPwm1Regs.AQCSFRC.bit.CSFA =0x01;
}
else
{
if(ConversionCount==MT_325)
{
if(MOTOR_ADJ<250)
EPwm1Regs.AQCSFRC.bit.CSFA =0x01;
}
if(ConversionCount==0)
{
if(MOTOR_ADJ<12)
EPwm1Regs.AQCSFRC.bit.CSFA =0x01;
else
EPwm1Regs.AQCSFRC.bit.CSFA =0x00;
}
}
//----------------------------------------------------------
//if(ConversionCount ==127)
// If 40 conversions have been logged, start over
if(ConversionCount == 127)
{
S60_S90_QF();
ConversionCount = 0;
// EPwm1Regs.AQCSFRC.bit.CSFA =0x01;
PROTECT_FLAG_reg.bit.SAMP_flag=1;
MOTOR_SUM+=MOTOR_SUM128>>8;//
MOTOR_SUM128=0;
MOTOR_COUNT++;
//--
if(MOTOR_COUNT==15)
{
MOTOR_COUNT=0;
if(MOTOR_SUM<8000)
MOTOR_ADJ_s60s90=MOTOR_SUM>>4;
else
MOTOR_ADJ_s60s90=MOTOR_SUM/5;
//---
ADJ_count++;
if(ADJ_count>127)
ADJ_count=0;
Voltage5[ADJ_count]=MOTOR_ADJ_s60s90;
//--
MOTOR_SUM=0;
}
//--
U_SUM=U_SUM128/819;
U_SUM128=0;
MAX_COUNT++;
U_SUM_SUM+=U_SUM;
if(MAX_COUNT>15)
{
U_SUM_PJ=U_SUM_SUM>>4;
MAX_COUNT=0;
U_SUM_SUM=0;
}
NOLOAD_CURRENT=(((Uint32)17*(Uint32)M_U)/5830)+5;//27*5830=157410
if(NOLOAD_CURRENT>17)
NOLOAD_CURRENT=17;
temp_i=(I_SUM128/699);//I_SUM
if(temp_i<NOLOAD_CURRENT)
I_SUM=0;
else
I_SUM=temp_i-NOLOAD_CURRENT;
I_SUM128=0;
}
else
ConversionCount++;
if(ConversionCount==1)
{
temp=0;
for(i=0;i<4;i++)
{
temp+=Voltage1[124+i];
}
if(PROTECT_FLAG_reg.bit.A1_flag==1)//MC2
{
TEMP2=temp>>2;
if(TEMP2>11)
Uint16Emf1=TEMP2-8;
else
Uint16Emf1=TEMP2;
}
else//mc3
{
TEMP2=temp>>2;
if(TEMP2>11)
Uint16Emf1=TEMP2-10;
else
Uint16Emf1=TEMP2;
}
//------------------------------
if(MOTOR_ADJ<30)
motor_ctrl_1();
else if(MOTOR_ADJ<226)
motor_ctrl_2();
// else if(MOTOR_ADJ<700)
// motor_ctrl_3();
// else if(MOTOR_ADJ<1300)
// motor_ctrl_4();
else
motor_ctrl_9();
//------------------------------
}
//----------------------------------------------------
//----------------------------------------------------
// if(ConversionCount == 40)
// EPwm1Regs.AQCSFRC.bit.CSFA =0x00;
// Reinitialize for next ADC sequence
AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1; // Reset SEQ1
AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1; // Clear INT SEQ1 bit
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; // Acknowledge interrupt to PIE
return;
}
//---------------------------------------------------------------------------------
interrupt void epwm1_isr(void)
{
// Update the CMPA and CMPB values
//update_compare(&epwm1_info);
// EPwm1Regs.CMPA.half.CMPA++;
// EPwm1Regs.CMPB++;
// Clear INT flag for this timer
/*if(PwmCount<38)
{
EPwm1Regs.AQCSFRC.bit.CSFA =0x01;
}
else
EPwm1Regs.AQCSFRC.bit.CSFA =0x00; */
if(PROTECT_FLAG_reg.bit.soft_run_flag==1)
{
if(Soft_vol<50)
{
Soft_vol++;
EPwm1Regs.CMPA.half.CMPA=60+Soft_vol;
}
else
{
PROTECT_FLAG_reg.bit.soft_run_flag=0;
Soft_vol=0;
}
}
else
{
EPwm1Regs.CMPA.half.CMPA = EPWM1_CMPA; // Set compare A value EPWM1_CMPA123,//
}
EPwm1Regs.CMPA.half.CMPAHR = (DutyFine << 8)+0x180; // Left shift by 8 to write into MSB bits
EPwm1Regs.ETCLR.bit.INT = 1;
// Acknowledge this interrupt to receive more interrupts from group 3
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
}
interrupt void epwm2_isr(void)
{
// Update the CMPA and CMPB values
//update_compare(&epwm2_info);
// EPwm2Regs.CMPA.half.CMPA++;
// EPwm2Regs.CMPB++;
// Clear INT flag for this timer
EPwm2Regs.ETCLR.bit.INT = 1;
// ConversionCount = 0;
// LoopCount++;
//if(LoopCount>15)
// LoopCount=0;
// Acknowledge this interrupt to receive more interrupts from group 3
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
}
/*interrupt void epwm3_isr(void)
{
// Update the CMPA and CMPB values
update_compare(&epwm3_info);
// Clear INT flag for this timer
EPwm3Regs.ETCLR.bit.INT = 1;
// Acknowledge this interrupt to receive more interrupts from group 3
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
}*/
void InitEPwm1Example()
{
// Setup TBCLK
//EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up
EPwm1Regs.TBPRD = EPWM1_TIMER_TBPRD; //2000 // Set timer period
EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
EPwm1Regs.TBPHS.half.TBPHS = 0x0000; // Phase is 0
EPwm1Regs.TBCTR = 0x0000; // Clear counter
//XZLEPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV2; // Clock ratio to SYSCLKOUT
//XZLEPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV2;
EPwm1Regs.TBCTL.bit.HSPCLKDIV = 0; // Clock ratio to SYSCLKOUT
EPwm1Regs.TBCTL.bit.CLKDIV = 0;
// Setup shadow register load on ZERO
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
// Set Compare values
EPwm1Regs.CMPA.half.CMPA = EPWM1_MIN_CMPA; // Set compare A value EPWM1_CMPA
EPwm1Regs.CMPB = EPWM1_MIN_CMPB; // Set Compare B value
// Set actions
EPwm1Regs.AQCTLA.bit.ZRO =AQ_SET; // Set PWM1A on Zero
EPwm1Regs.AQCTLA.bit.CAU = AQ_CLEAR; // Clear PWM1A on event A, up count
EPwm1Regs.AQCTLB.bit.ZRO = AQ_CLEAR; // Set PWM1B on Zero
EPwm1Regs.AQCTLB.bit.CBU = AQ_SET; // Clear PWM1B on event B, up count
// Interrupt where we will change the Compare Values
EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // Select INT on Zero event
EPwm1Regs.ETSEL.bit.INTEN = 1; // Enable INT
EPwm1Regs.ETPS.bit.INTPRD = ET_3RD; // Generate INT on 3rd event
// Information this example uses to keep track
// of the direction the CMPA/CMPB values are
// moving, the min and max allowed values and
// a pointer to the correct ePWM registers
epwm1_info.EPwm_CMPA_Direction = EPWM_CMP_UP; // Start by increasing CMPA & CMPB
epwm1_info.EPwm_CMPB_Direction = EPWM_CMP_UP;
epwm1_info.EPwmTimerIntCount = 0; // Zero the interrupt counter
epwm1_info.EPwmRegHandle = &EPwm1Regs; // Set the pointer to the ePWM module
epwm1_info.EPwmMaxCMPA = EPWM1_MAX_CMPA; // Setup min/max CMPA/CMPB values
epwm1_info.EPwmMinCMPA = EPWM1_MIN_CMPA;
epwm1_info.EPwmMaxCMPB = EPWM1_MAX_CMPB;
epwm1_info.EPwmMinCMPB = EPWM1_MIN_CMPB;
EALLOW;
EPwm2Regs.HRCNFG.all = 0x0;
EPwm2Regs.HRCNFG.bit.EDGMODE = HR_FEP; //MEP control on Rising edge
EPwm2Regs.HRCNFG.bit.CTLMODE = HR_CMP;
EPwm2Regs.HRCNFG.bit.HRLOAD = HR_CTR_ZERO;
EDIS;
}
/*
*/
void InitEPwm2Example()
{
// Setup TBCLK
// EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up
EPwm2Regs.TBPRD = EPWM2_TIMER_TBPRD; //2000 // Set timer period
EPwm2Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
EPwm2Regs.TBPHS.half.TBPHS = 0x0000; // Phase is 0
EPwm2Regs.TBCTR = 0x0000; // Clear counter
//XZLEPwm2Regs.TBCTL.bit.HSPCLKDIV = TB_DIV2; // Clock ratio to SYSCLKOUT
//XZLEPwm2Regs.TBCTL.bit.CLKDIV = TB_DIV2;
EPwm2Regs.TBCTL.bit.HSPCLKDIV = 4; // Clock ratio to SYSCLKOUT
EPwm2Regs.TBCTL.bit.CLKDIV = 4;
// Setup shadow register load on ZERO
EPwm2Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm2Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm2Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm2Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
// Set Compare values
EPwm2Regs.CMPA.half.CMPA = EPWM2_MIN_CMPA; // Set compare A value
EPwm2Regs.CMPB = EPWM2_MIN_CMPB; // Set Compare B value
// Set actions
EPwm2Regs.AQCTLA.bit.ZRO = AQ_CLEAR; // Set PWM1A on Zero
EPwm2Regs.AQCTLA.bit.CAU = AQ_SET; // Clear PWM1A on event A, up count
EPwm2Regs.AQCTLB.bit.ZRO = AQ_CLEAR; // Set PWM1B on Zero
EPwm2Regs.AQCTLB.bit.CBU = AQ_SET; // Clear PWM1B on event B, up count
// Interrupt where we will change the Compare Values
EPwm2Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // Select INT on Zero event
EPwm2Regs.ETSEL.bit.INTEN = 1; // Enable INT
EPwm2Regs.ETPS.bit.INTPRD = ET_3RD; // Generate INT on 3rd event
// Information this example uses to keep track
// of the direction the CMPA/CMPB values are
// moving, the min and max allowed values and
// a pointer to the correct ePWM registers
epwm2_info.EPwm_CMPA_Direction = EPWM_CMP_UP; // Start by increasing CMPA & CMPB
epwm2_info.EPwm_CMPB_Direction = EPWM_CMP_UP;
epwm2_info.EPwmTimerIntCount = 0; // Zero the interrupt counter
epwm2_info.EPwmRegHandle = &EPwm2Regs; // Set the pointer to the ePWM module
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