-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--current_state.st3 is current_state.st3
current_state.st3 = DFFEAS(A1L701, !ADS8364_CLK,  ,  ,  ,  ,  ,  ,  );


--current_state.st13 is current_state.st13
current_state.st13 = DFFEAS(current_state.st12, !ADS8364_CLK,  ,  ,  ,  ,  ,  ,  );


--current_state.st5 is current_state.st5
current_state.st5 = DFFEAS(current_state.st4, !ADS8364_CLK,  ,  ,  ,  ,  ,  ,  );


--current_state.st7 is current_state.st7
current_state.st7 = DFFEAS(current_state.st6, !ADS8364_CLK,  ,  ,  ,  ,  ,  ,  );


--current_state.st9 is current_state.st9
current_state.st9 = DFFEAS(current_state.st8, !ADS8364_CLK,  ,  ,  ,  ,  ,  ,  );


--current_state.st11 is current_state.st11
current_state.st11 = DFFEAS(current_state.st10, !ADS8364_CLK,  ,  ,  ,  ,  ,  ,  );


--A1L921 is reduce_or~242
A1L921 = current_state.st5 # current_state.st7 # current_state.st9 # current_state.st11;


--current_state.st15 is current_state.st15
current_state.st15 = DFFEAS(current_state.st14, !ADS8364_CLK,  ,  ,  ,  ,  ,  ,  );


--current_state.st17 is current_state.st17
current_state.st17 = DFFEAS(current_state.st16, !ADS8364_CLK,  ,  ,  ,  ,  ,  ,  );


--current_state.st19 is current_state.st19
current_state.st19 = DFFEAS(current_state.st18, !ADS8364_CLK,  ,  ,  ,  ,  ,  ,  );


--A1L031 is reduce_or~243
A1L031 = !current_state.st15 & !current_state.st17 & !current_state.st19;


--A1L131 is reduce_or~244
A1L131 = current_state.st3 # current_state.st13 # A1L921 # !A1L031;


--ADS8364_CLK is ADS8364_CLK
ADS8364_CLK = DFFEAS(A1L81, LB1__clk0,  ,  , A1L721,  ,  ,  ,  );


--current_state.st1 is current_state.st1
current_state.st1 = DFFEAS(A1L54, !ADS8364_CLK,  ,  ,  ,  ,  ,  ,  );


--current_state.st2 is current_state.st2
current_state.st2 = DFFEAS(A1L531, !ADS8364_CLK,  ,  ,  ,  ,  ,  ,  );


--current_state.st16 is current_state.st16
current_state.st16 = DFFEAS(current_state.st15, !ADS8364_CLK,  ,  ,  ,  ,  ,  ,  );


--current_state.st18 is current_state.st18
current_state.st18 = DFFEAS(current_state.st17, !ADS8364_CLK,  ,  ,  ,  ,  ,  ,  );


--current_state.st20 is current_state.st20
current_state.st20 = DFFEAS(current_state.st19, !ADS8364_CLK,  ,  ,  ,  ,  ,  ,  );


--A1L231 is reduce_or~245
A1L231 = A1L031 & !current_state.st16 & !current_state.st18 & !current_state.st20;


--current_state.st0 is current_state.st0
current_state.st0 = DFFEAS(A1L34, !ADS8364_CLK,  ,  ,  ,  ,  ,  ,  );


--A1L821 is reduce_or~0
A1L821 = current_state.st1 # current_state.st2 # !current_state.st0 # !A1L231;


--A1L42 is altera_internal_jtag~TDO
A1L42 = CYCLONEII_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , C1L81);

--A1L52 is altera_internal_jtag~TMSUTAP
A1L52 = CYCLONEII_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , C1L81);

--A1L32 is altera_internal_jtag~TCKUTAP
A1L32 = CYCLONEII_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , C1L81);

--altera_internal_jtag is altera_internal_jtag
altera_internal_jtag = CYCLONEII_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , C1L81);


--next_state.st3 is next_state.st3
next_state.st3 = DFFEAS(VCC, EOC_0, A1L621,  ,  ,  ,  ,  ,  );


--A1L701 is next_state~500
A1L701 = !next_state.st3 & current_state.st2;


--current_state.st12 is current_state.st12
current_state.st12 = DFFEAS(current_state.st11, !ADS8364_CLK,  ,  ,  ,  ,  ,  ,  );


--current_state.st4 is current_state.st4
current_state.st4 = DFFEAS(current_state.st3, !ADS8364_CLK,  ,  ,  ,  ,  ,  ,  );


--current_state.st6 is current_state.st6
current_state.st6 = DFFEAS(current_state.st5, !ADS8364_CLK,  ,  ,  ,  ,  ,  ,  );


--current_state.st8 is current_state.st8
current_state.st8 = DFFEAS(current_state.st7, !ADS8364_CLK,  ,  ,  ,  ,  ,  ,  );


--current_state.st10 is current_state.st10
current_state.st10 = DFFEAS(current_state.st9, !ADS8364_CLK,  ,  ,  ,  ,  ,  ,  );


--current_state.st14 is current_state.st14
current_state.st14 = DFFEAS(current_state.st13, !ADS8364_CLK,  ,  ,  ,  ,  ,  ,  );


--LB1__clk0 is ADLL_ADS:U1|altpll:altpll_component|_clk0
LB1__clk0 = PLL.CLK0(.ENA(), .CLKSWITCH(), .ARESET(), .PFDENA(), .INCLK(SYSCLOCK), .INCLK());


--\ADCLK:COUNT[1] is \ADCLK:COUNT[1]
\ADCLK:COUNT[1] = DFFEAS(A1L3, LB1__clk0,  ,  , \ADCLK:COUNT[0],  ,  ,  ,  );


--\ADCLK:COUNT[0] is \ADCLK:COUNT[0]
\ADCLK:COUNT[0] = DFFEAS(A1L83, LB1__clk0,  ,  ,  ,  ,  ,  ,  );


--\ADCLK:COUNT[3] is \ADCLK:COUNT[3]
\ADCLK:COUNT[3] = DFFEAS(A1L6, LB1__clk0,  ,  , A1L51,  ,  ,  ,  );


--\ADCLK:COUNT[2] is \ADCLK:COUNT[2]
\ADCLK:COUNT[2] = DFFEAS(A1L93, LB1__clk0,  ,  ,  ,  ,  ,  ,  );


--A1L721 is reduce_nor~26
A1L721 = !\ADCLK:COUNT[1] & !\ADCLK:COUNT[0] & !\ADCLK:COUNT[3] & \ADCLK:COUNT[2];


--A1L531 is Select~180
A1L531 = current_state.st1 # current_state.st2 & next_state.st3;


--C1_hub_tdo is sld_hub:sld_hub_inst|hub_tdo
C1_hub_tdo = AMPP_FUNCTION(!A1L32, C1L71, !JB1_state[8], JB1L12);


--A1L621 is reduce_nor~1
A1L621 = \COM:COUNT1[1] & !\COM:COUNT1[0];


--A1L83 is COUNT~66
A1L83 = !\ADCLK:COUNT[0] & (\ADCLK:COUNT[1] # \ADCLK:COUNT[3] # !\ADCLK:COUNT[2]);


--A1L51 is add~114
A1L51 = \ADCLK:COUNT[2] & \ADCLK:COUNT[1] & \ADCLK:COUNT[0];


--A1L93 is COUNT~67
A1L93 = \ADCLK:COUNT[1] & (\ADCLK:COUNT[2] $ \ADCLK:COUNT[0]) # !\ADCLK:COUNT[1] & \ADCLK:COUNT[2] & (\ADCLK:COUNT[3] # \ADCLK:COUNT[0]);


--GB6_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[0]
GB6_Q[0] = AMPP_FUNCTION(A1L32, C1L72, !C1L2, GB6L4);


--GB5_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRF_ENA_0|Q[0]
GB5_Q[0] = AMPP_FUNCTION(A1L32, GB5L3, C1L42);


--G2_WORD_SR[0] is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0]
G2_WORD_SR[0] = AMPP_FUNCTION(A1L32, G2L72, G2_WORD_SR[1], !G1_clear_signal, JB1_state[4], C1L4);


--C1_HUB_BYPASS_REG is sld_hub:sld_hub_inst|HUB_BYPASS_REG
C1_HUB_BYPASS_REG = AMPP_FUNCTION(A1L32, C1L01);


--KB1_dffe1a[0] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_rpe:auto_generated|dffe1a[0]
KB1_dffe1a[0] = AMPP_FUNCTION(A1L32, KB1_w_anode1w[3], !C1L2, C1L6);


--C1L21 is sld_hub:sld_hub_inst|hub_tdo~245
C1L21 = AMPP_FUNCTION(G2_WORD_SR[0], C1_HUB_BYPASS_REG, KB1_dffe1a[0]);


--C1_jtag_debug_mode_usr1 is sld_hub:sld_hub_inst|jtag_debug_mode_usr1
C1_jtag_debug_mode_usr1 = AMPP_FUNCTION(A1L32, C1L94, JB1_state[0], JB1_state[12]);


--C1L31 is sld_hub:sld_hub_inst|hub_tdo~246
C1L31 = AMPP_FUNCTION(GB6_Q[0], GB5_Q[0], C1L21, C1_jtag_debug_mode_usr1);


--B1_bypass_reg_out is sld_signaltap:auto_signaltap_0|bypass_reg_out
B1_bypass_reg_out = AMPP_FUNCTION(A1L32, altera_internal_jtag, !B1_reset_all, C1L34);


--GB1_Q[5] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[5]
GB1_Q[5] = AMPP_FUNCTION(A1L32, C1L32, !C1L2, C1L62);


--GB1_Q[3] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[3]
GB1_Q[3] = AMPP_FUNCTION(A1L32, C1L12, !C1L2, C1L62);


--GB1_Q[4] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[4]
GB1_Q[4] = AMPP_FUNCTION(A1L32, C1L22, !C1L2, C1L62);


--C1L41 is sld_hub:sld_hub_inst|hub_tdo~247
C1L41 = AMPP_FUNCTION(B1_bypass_reg_out, GB1_Q[5], GB1_Q[3], GB1_Q[4]);


--L3_dffs[0] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[0]
L3_dffs[0] = AMPP_FUNCTION(A1L32, L3_dffs[1], !B1_reset_all, H1_trigger_setup_ena);


--G1_WORD_SR[0] is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|WORD_SR[0]
G1_WORD_SR[0] = AMPP_FUNCTION(A1L32, G1L52, !G1_clear_signal, B1L48);


--C1L51 is sld_hub:sld_hub_inst|hub_tdo~248
C1L51 = AMPP_FUNCTION(GB1_Q[5], GB1_Q[3], L3_dffs[0], G1_WORD_SR[0]);


--L1_dffs[0] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[0]
L1_dffs[0] = AMPP_FUNCTION(A1L32, L1L1, !B1_reset_all);


--C1L61 is sld_hub:sld_hub_inst|hub_tdo~249
C1L61 = AMPP_FUNCTION(C1L41, C1L51, GB1_Q[4], L1_dffs[0]);


--GB4_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]
GB4_Q[0] = AMPP_FUNCTION(A1L32, altera_internal_jtag, !C1L2, C1L42);


--C1L71 is sld_hub:sld_hub_inst|hub_tdo~250
C1L71 = AMPP_FUNCTION(C1L31, C1L61, GB4_Q[0], C1_jtag_debug_mode_usr1);


--JB1_state[8] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[8]
JB1_state[8] = AMPP_FUNCTION(A1L32, JB1L52, !A1L52);


--JB1_state[3] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3]
JB1_state[3] = AMPP_FUNCTION(A1L32, JB1L91);