/* config.h - ARM Integrator configuration header */ /* Copyright 1999-2001 ARM Limited *//* Copyright 1999-2001 Wind River Systems, Inc. *//*This module contains the configuration parameters for the ARM Integrator BSP.*/#ifndef	INCconfigh#define	INCconfigh#ifdef __cplusplusextern "C" {#endif/* BSP version/revision identification, before configAll.h */#define BSP_VER_1_1     1       /* 1.2 is backwards compatible with 1.1 */#define BSP_VER_1_2     1#define BSP_VERSION	"1.0"#define BSP_REV		"/1"	/* 0 for first revision */#include "configAll.h"#define S3C_EXC_BASE	 	0x33ffff04/* Memory configuration */#undef	LOCAL_MEM_AUTOSIZE			/* run-time memory sizing */#define USER_RESERVED_MEM       0x1000		/* see sysMemTop() *//* * Local-to-Bus memory address constants: * the local memory address always appears at 0 locally; * it is not dual ported. */#define LOCAL_MEM_LOCAL_ADRS    0x30000000	#define LOCAL_MEM_SIZE          0x04000000	/*64MB*/#define LOCAL_MEM_END_ADRS      (LOCAL_MEM_LOCAL_ADRS + LOCAL_MEM_SIZE)#define LOCAL_MEM_BUS_ADRS      LOCAL_MEM_LOCAL_ADRS/* * Boot ROM is an image written into Flash. Part of the Flash can be * reserved for boot parameters etc. (see the Flash section below). * * The following parameters are defined here and in the Makefile. * They must be kept synchronized; effectively config.h depends on Makefile. * Any changes made here must be made in the Makefile and vice versa. * * ROM_BASE_ADRS is the base of the Flash ROM/EPROM. * ROM_TEXT_ADRS is the entry point of the VxWorks image * ROM_SIZE is the size of the part of the Flash ROM/EPROM allocated to *		the VxWorks image (block size - size of headers) * * Two other constants are used: * ROM_COPY_SIZE is the size of the part of the ROM to be copied into RAM * 		 (e.g. in uncompressed boot ROM) * ROM_SIZE_TOTAL is the size of the entire Flash ROM (used in sysPhysMemDesc) * * The values are given as literals here to make it easier to ensure * that they are the same as those in the Makefile. */#define ROM_BASE_ADRS       0x00000000     /* base of Flash/EPROM */#define ROM_TEXT_ADRS       ROM_BASE_ADRS  /* code start addr in ROM */#define ROM_WARM_ADRS       0x00000004     /* code start addr in ROM */#define ROM_SIZE            0x00800000     /* size of ROM holding VxWorks*/ #define ROM_COPY_SIZE       0x00100000     /*ROM_SIZE*/#define ROM_SIZE_TOTAL      0x01000000     /* total size of ROM */#define RAM_LOW_ADRS	    0x30006000	   /* VxWorks image entry point */#define RAM_HIGH_ADRS	    0x33e00000	   /* RAM address for ROM boot *//* * Count for a CPU delay loop at the beginning of romInit. There have been * reports of problems with certain boards and certain power supplies, and * adding a delay at the start of romInit appears to help with this. This * value may need tuning for different board/PSU combinations. */#define INTEGRATOR_DELAY_VALUE	0x10000/* * Cache/MMU configuration * * Note that when MMU is enabled, cache modes are controlled by * the MMU table entries in sysPhysMemDesc[], not the cache mode * macros defined here. */#define	INCLUDE_MMU_BASIC#define INCLUDE_CACHE_SUPPORT#undef  USER_I_CACHE_MODE#define USER_I_CACHE_MODE       CACHE_WRITETHROUGH#undef  USER_D_CACHE_MODE#define USER_D_CACHE_MODE       CACHE_COPYBACK/* * We use the generic architecture libraries, with caches/MMUs present. A * call to sysHwInit0() is needed from within usrInit before * cacheLibInit() is called. */#ifndef _ASMLANGUAGEIMPORT void sysHwInit0 (void);#endif#define INCLUDE_SYS_HW_INIT_0#define SYS_HW_INIT_0()         sysHwInit0 ()/* * Network driver configuration. * * De-select unused (default) network drivers selected in configAll.h. */#undef	INCLUDE_ENP		/* include CMC Ethernet interface*/#undef	INCLUDE_EX		/* include Excelan Ethernet interface */#undef	INCLUDE_SM_NET		/* include backplane net interface */#undef	INCLUDE_SM_SEQ_ADDR	/* shared memory network auto address setup *//*#undef  INCLUDE_NETWORK*//* Enhanced Network Driver (END) Support */#define INCLUDE_END              /* Enhanced Network Driver see configNet.h */
#define END_OVERRIDE             /* define if you are using old boot ROMs. */#define INCLUDE_PING#undef  NUM_TTY#define NUM_TTY               	N_SIO_CHANNELS   #undef  CONSOLE_TTY#define CONSOLE_TTY           	0#undef  CONSOLE_BAUD_RATE#define CONSOLE_BAUD_RATE     	115200#undef  WDB_COMM_TYPE         /* default WDB agent communication path is END */#define WDB_COMM_TYPE        WDB_COMM_END /*#undef  WDB_TTY_CHANNEL#define WDB_TTY_CHANNEL 	1#undef  WDB_COMM_TYPE#define WDB_COMM_TYPE 		WDB_COMM_SERIAL#undef  WDB_TTY_BAUD#define WDB_TTY_BAUD          	38400 #define WDB_TTY_DEV_NAME      	"/tyCo/1"*//*#define INCLUDE_TSFS_BOOT*/#define FORCE_DEFAULT_BOOT_LINE#define DEFAULT_BOOT_LINE \         "cs(0,0) host:vxWorks " \         "h=192.168.0.142 e=192.168.0.249:ffffff00 u=yk pw=yk tn=S3C2410_DVB"/*#define DEFAULT_BOOT_LINE "tsfs(0,0) host:vxWorks"*//* * Interrupt mode - interrupts can be in either preemptive or non-preemptive * mode.  For non-preemptive mode, change INT_MODE to INT_NON_PREEMPT_MODEL */#define INT_MODE	INT_PREEMPT_MODEL/* * Enable BSP-configurable interrupt priorities: order of servicing and * masking of interrupts will be determined by ambaIntLvlPriMap[] in * sysLib.c.  If AMBA_INT_PRIORITY_MAP is not defined, priority of * interrupts will be least-significant bit first. *//* * miscellaneous definitions * Note: ISR_STACK_SIZE is defined here rather than in ../all/configAll.h * (as is more usual) because the stack size depends on the interrupt * structure of the BSP. */#define ISR_STACK_SIZE	0x800	/* size of ISR stack, in bytes *//* Optional timestamp support */#undef	INCLUDE_TIMESTAMP	/* define to include timestamp driver *//*#define INCLUDE_TIMESTAMP*//* Optional TrueFFS support */#undef	INCLUDE_TFFS		/* define to include TrueFFS driver *//* * Flash memory configuration * * If a Flash memory part is fitted instead of an EPROM, part of it can * be used as NVRAM storage, if desired.  If this is wanted, define * INCLUDE_FLASH and reduce ROM_SIZE in this file and in Makefile by * NV_RAM_SIZE.  The default is not to provide support for Flash. */#undef INCLUDE_FLASH#ifdef INCLUDE_FLASH#define FLASH_WIDTH           2#define FLASH_CHIP_WIDTH      2#define SYS_FLASH_TYPE        FLASH_28F128J3A    /* Specify 16 bit 28f128j3 */#define FLASH_SEGMENT_SIZE    0x20000           /* sector size */#define FLASH_ADRS            (ROM_BASE_ADRS+0xfe0000)#define FLASH_SIZE            FLASH_SEGMENT_SIZE#undef  FLASH_NO_OVERLAY#define FLASH_WIDTH_SPECIAL_2#undef NV_RAM_ADRS#undef NV_RAM_INTRVL#undef NV_RAM_SIZE#undef NV_BOOT_OFFSET#define NV_RAM_ADRS           FLASH_ADRS#define NV_RAM_INTRVL         1#define NV_RAM_SIZE           FLASH_SEGMENT_SIZE#define NV_BOOT_OFFSET        (FLASH_SEGMENT_SIZE - 0x200)#else#define NV_RAM_SIZE           NONE#endif    /* INCLUDE_FLASH */#include "s3c2410.h"#undef BSP_VTS#ifdef BSP_VTS#undef INCLUDE_PING#undef INCLUDE_NET_SHOW#undef INCLUDE_SHELL#undef INCLUDE_RLOGIN#undef INCLUDE_LOADER#undef INCLUDE_SHOW_ROUTINES#undef INCLUDE_NET_SYM_TABLE#undef INCLUDE_NETWORK
#undef STANDALONE_NET#undef INCLUDE_WDB#define INCLUDE_PING#define INCLUDE_NET_SHOW#define INCLUDE_SHELL#define INCLUDE_RLOGIN#define INCLUDE_LOADER#define INCLUDE_SHOW_ROUTINES#define INCLUDE_NET_SYM_TABLE#define INCLUDE_NETWORK
#define STANDALONE_NET#define INCLUDE_WDB#endif /*BSP_VTS*/#undef INCLUDE_WINDML          /* define to include windML support */#define DO_NOT_INIT_VEC_TBL#ifdef __cplusplus}#endif#endif  /* INCconfigh */#if defined(PRJ_BUILD)#include "prjParams.h"#endif