?? a2d.vhd
字號:
-- tlc0820ac ---a/d轉換
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity a2d is
port(clk :in std_logic;--輸入時鐘信號50MHz
sw0 : in std_logic; --復位
-- mode :out std_logic; --0820模式，1為寫0為讀，懸空相當于低
adcs : out std_logic;
rd : out std_logic;
int : in std_logic;
datain : in std_logic_vector(7 downto 0);
ld: out std_logic_vector(7 downto 0);
--ram
ramcs: out std_logic;
ramsck: out std_logic;
ramsi: out std_logic;
ramso: in std_logic;
--da
dacs:out std_logic;
dasck:out std_logic;
dadin:out std_logic
);
end a2d;
architecture aa of a2d is
signal t_rd, t_adcs : std_logic;
signal count1: integer range 0 to 4999; --控制AD，total采樣間隔為50+2600=3100ns
signal count2: integer range 0 to 499; --控制回放，每1us回放一次，total采樣間隔為1微妙
signal t_int: integer range 0 to 15; --350ns 肯定夠int變為高了
signal t_addata :std_logic_vector(7 downto 0);
signal time: integer range 0 to 1002;
signal t_ramcs,t_sck,t_ramsi:std_logic;
signal t_ramso:std_logic_vector(7 downto 0);
signal count3:integer range 0 to 3;
signal ram_part_addr: integer range 0 to 15;
signal t_ramaddr:std_logic_vector(15 downto 0);
signal t_dacs,t_dasck,t_dadin:std_logic;
begin
process(clk,int,sw0)
variable t_ramdata:std_logic_vector(7 downto 0):="00000000";
variable t_dadata:std_logic_vector(15 downto 0):="0000000000000000";
begin
--異步復位
if sw0='0' then
count1 <= 0;
time<=0;
t_adcs <= '1';
t_rd <= '1';
t_addata <= "00000000";
t_ramcs<='1';
t_ramaddr<="0000000000000000";--initiate address as "0000000000000000"
--計數器
elsif(clk'event and clk='1') then
if time<1001 then --%6----用于AD和寫RAM，其中0用于WREN命令的寫入
if count1=4999 then --100ns
count1<=0;
time<=time+1;
t_ramaddr<=t_ramaddr+1; --最終的1000各點存儲在0~999的ram存里面
else
count1<=count1+1;
end if;
elsif count2=499 then --該值應該根據DA的速度而定，最終定為200*20=4000ns=0.25MHZ
count2<=0;
if t_ramaddr="000001111100111" then --%000001111100111--
t_ramaddr<="0000000000000000";
else
t_ramaddr<=t_ramaddr+1;
end if;
else
count2<=count2+1;
end if;
if time<1000 then --%5-- --AD and write data into ram
----------------AD和存儲時序控制start---------------
if count1 < 3 then
t_adcs<='1';
t_rd<='1';
elsif count1 < 23 then
t_adcs<='0';
t_rd<='1';
elsif count1<155 then
t_adcs<='0';
t_rd<='0';
if int='0' then
t_int<=t_int+1;
else
t_int<=0;
end if;
if t_int = 2 then
t_addata <= datain;
end if;
else
t_adcs<='1';
t_rd<='1';
end if;
--------------AD和存儲時序控制end-----------------
-------------存儲操縱代碼start-----------------
---------------write WREN pro-code:start---------------------
if count1<155 then --40ns后讓sck開始驅動
t_ramcs<='1';
elsif count1<157+4 then
t_ramcs<='0';
count3<=3;
t_sck<='0';
t_ramdata:="00000110";
ram_part_addr<=7;
t_ramsi<=t_ramdata(7);
elsif count1< 189+4 then --285=286-1,minus 1 to ensure write 1 byte a time
t_ramcs<='0'; --286=156+130,130=(40+8*80)/20=34
if count3=3 then
count3<=0;
t_sck<=not t_sck;
elsif count3=0 then
count3<=count3+1;
ram_part_addr<=ram_part_addr-1;
elsif count3=1 then --提前一個時鐘將數據寫到si
t_sck<=not t_sck;
t_ramsi<=t_ramdata(ram_part_addr);
count3<=count3+1;
else
count3<=count3+1;
end if;
elsif count1<191+8 then
t_ramcs<='1';
---------------write WREN pro-code:end---------------------
----------------寫數據：start-------------------------------
elsif count1<193+8 then --40ns后讓sck開始驅動
t_ramcs<='0';
count3<=3;
t_sck<='0';
t_ramdata:="00000010";
ram_part_addr<=7;
t_ramsi<=t_ramdata(7);
elsif count1< 321+8 then --285=157+128,minus 1 to ensure write 1 byte a time
t_ramcs<='0'; --286=156+130,130=(40+32*80)/20
if count1< 225+8-2 then--189=157+32 --減2由于讀信號在下降沿
t_ramdata:="00000010";
elsif count1<257+8-2 then --221=189+32
t_ramdata:=t_ramaddr(15 downto 8);
elsif count1<289+8-2 then
t_ramdata:=t_ramaddr(7 downto 0);
else
t_ramdata:=t_addata;
end if;
if count3=3 then
count3<=0;
t_sck<=not t_sck;
elsif count3=0 then
count3<=count3+1;
if ram_part_addr=0 then --ram_part_addr perhaps should be variable?
ram_part_addr<=7;
else
ram_part_addr<=ram_part_addr-1;
end if;
elsif count3=1 then --提前一個時鐘將數據寫到si
count3<=count3+1;
t_sck<=not t_sck;
t_ramsi<=t_ramdata(ram_part_addr);
else
count3<=count3+1;
end if;
else
t_ramcs<='1';
end if;
----------------寫數據：end-------------------------------
-------------存儲操縱代碼到此-----------------------------
elsif time=1000 then --%5--
--------------寫入WRDI pro-code：start---------
t_ramaddr<="0000000000000000"; --為ram讀做準備，存在0-999處
if count1<2 then --40ns后讓sck開始驅動
t_ramcs<='0';
count3<=3;
t_sck<='0';
t_ramdata:="00000100";
ram_part_addr<=7;
t_ramsi<=t_ramdata(7);
elsif count1< 34 then --285=286-1,minus 1 to ensure write 1 byte a time
t_ramcs<='0'; --286=156+130,130=(40+8*80)/20=34
t_dacs<='1';
if count3=3 then
count3<=0;
t_sck<=not t_sck;
elsif count3=0 then
ram_part_addr<=ram_part_addr-1;
count3<=count3+1;
elsif count3=1 then --提前一個時鐘將數據寫到si
t_ramsi<=t_ramdata(ram_part_addr);
count3<=count3+1;
t_sck<=not t_sck;
else
count3<=count3+1;
end if;
else
t_ramcs<='1';
end if;
--------------寫入WRDI pro-code：end---------
elsif(time=1001)then
if count2<2 then
t_dacs<='1';
t_ramcs<='1';
elsif count2<4 then
t_dacs<='0';
count3<=3;
t_dasck<='1';
t_dadata:="1101000000000010";
ram_part_addr<=15;
t_dadin<=t_dadata(15);
elsif count2< 68 then --196=132+64,
t_dacs<='0'; --286=156+130,130=(40+32*80)/20
t_ramcs<='1';
if count3=3 then
count3<=0;
t_dasck<=not t_dasck;
elsif count3=0 then
count3<=count3+1;
if ram_part_addr=0 then --ram_part_addr perhaps should be variable?
ram_part_addr<=15;
else
ram_part_addr<=ram_part_addr-1;
end if;
elsif count3=1 then --提前一個時鐘將數據寫到si
t_dadin<=t_dadata(ram_part_addr);
count3<=count3+1;
t_dasck<=not t_dasck;
else
count3<=count3+1;
end if;
elsif count2=499 then
time<=time+1;
else
t_dacs<='1';
t_ramcs<='1';
end if;
else --time=1002,read RAM and D/A to display
----------------回放(即DA)時序控制------------------------
-----------1. read ram:start-----------------------------
if count2<2 then --40ns后讓sck開始驅動
t_ramcs<='0';
count3<=3;
t_sck<='0';
t_ramdata:="00000011"; --read mode
ram_part_addr<=7;
t_ramsi<=t_ramdata(7);
elsif count2< 130 then
t_ramcs<='0'; --286=156+130,130=(40+32*80)/20
if count2< 34-2 then--34=2+32
t_ramdata:="00000011";
elsif count2<66-2 then --221=34+32
t_ramdata:=t_ramaddr(15 downto 8);
elsif count2<98-2 then
t_ramdata:=t_ramaddr(7 downto 0);
else
t_ramdata:="ZZZZZZZZ";
if count3=3 then
t_ramso(ram_part_addr)<=ramso;
end if;
end if;
if count3=3 then
count3<=0;
t_sck<=not t_sck;
elsif count3=0 then
count3<=count3+1;
if ram_part_addr=0 then --ram_part_addr perhaps should be variable?
ram_part_addr<=7;
else
ram_part_addr<=ram_part_addr-1;
end if;
elsif count3=1 then --提前一個時鐘將數據寫到si
t_ramsi<=t_ramdata(ram_part_addr);
count3<=count3+1;
t_sck<=not t_sck;
else
count3<=count3+1;
end if;
else
t_ramcs<='1';
end if;
-----------1. read ram:end-----------------------------
-----------2. DA recovery:start------------------------
if count2<130+2 then --follow 1
t_dacs<='1';
t_dasck<='1';
elsif count2<132+2 then --40ns后讓dasck開始驅動
t_dacs<='0';
count3<=3;
t_dasck<='1';
t_dadata:="1000"&t_ramso&"0000";
ram_part_addr<=15; --借用ram的
t_ramsi<=t_dadata(15);
elsif count2< 196+2 then --196=132+64,
t_dacs<='0'; --286=156+130,130=(40+32*80)/20
if count3=3 then
count3<=0;
t_dasck<=not t_dasck;
elsif count3=0 then
count3<=count3+1;
if ram_part_addr=0 then --ram_part_addr perhaps should be variable?
ram_part_addr<=15;
else
ram_part_addr<=ram_part_addr-1;
end if;
elsif count3=1 then --提前一個時鐘將數據寫到si
t_dadin<=t_dadata(ram_part_addr);
count3<=count3+1;
t_dasck<=not t_dasck;
else
count3<=count3+1;
end if;
else
t_dacs<='1';
end if;
-----------2. DA recovery:end------------------------
end if; --time>1000
end if; --clk
end process;
adcs<=t_adcs;
rd<=t_rd;
ramcs<=t_ramcs;
ramsck<=t_sck;
ramsi<=t_ramsi;
dacs<=t_dacs;
dasck<=t_dasck;
dadin<=t_dadin;
--dataout<=t_addata;
--dclk <= count1;
ld <= t_addata;
end aa;?? 快捷鍵說明
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