# Copyright (C) 1991-2004 Altera Corporation
# Any  megafunction  design,  and related netlist (encrypted  or  decrypted),
# support information,  device programming or simulation file,  and any other
# associated  documentation or information  provided by  Altera  or a partner
# under  Altera's   Megafunction   Partnership   Program  may  be  used  only
# to program  PLD  devices (but not masked  PLD  devices) from  Altera.   Any
# other  use  of such  megafunction  design,  netlist,  support  information,
# device programming or simulation file,  or any other  related documentation
# or information  is prohibited  for  any  other purpose,  including, but not
# limited to  modification,  reverse engineering,  de-compiling, or use  with
# any other  silicon devices,  unless such use is  explicitly  licensed under
# a separate agreement with  Altera  or a megafunction partner.  Title to the
# intellectual property,  including patents,  copyrights,  trademarks,  trade
# secrets,  or maskworks,  embodied in any such megafunction design, netlist,
# support  information,  device programming or simulation file,  or any other
# related documentation or information provided by  Altera  or a megafunction
# partner, remains with Altera, the megafunction partner, or their respective
# licensors. No other licenses, including any licenses needed under any third
# party's intellectual property, are provided herein.


# The default values for assignments are stored in the file
#		da_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 4.2
set_global_assignment -name PROJECT_CREATION_TIME_DATE "15:25:26  AUGUST 10, 2005"
set_global_assignment -name LAST_QUARTUS_VERSION 5.1
set_global_assignment -name VHDL_FILE da.vhd
set_global_assignment -name VECTOR_WAVEFORM_FILE da.vwf
set_global_assignment -name VHDL_FILE da_0.vhd
set_global_assignment -name VHDL_FILE daa.vhd

# Pin & Location Assignments
# ==========================
set_location_assignment PIN_18 -to clk
set_location_assignment PIN_110 -to clk_out
set_location_assignment PIN_102 -to data1[0]
set_location_assignment PIN_103 -to data1[1]
set_location_assignment PIN_104 -to data1[2]
set_location_assignment PIN_105 -to data1[3]
set_location_assignment PIN_106 -to data1[4]
set_location_assignment PIN_107 -to data1[5]
set_location_assignment PIN_108 -to data1[6]
set_location_assignment PIN_109 -to data1[7]
set_location_assignment PIN_111 -to data2[0]
set_location_assignment PIN_112 -to data2[1]
set_location_assignment PIN_113 -to data2[2]
set_location_assignment PIN_114 -to data2[3]
set_location_assignment PIN_117 -to data2[4]
set_location_assignment PIN_118 -to data2[5]
set_location_assignment PIN_119 -to data2[6]
set_location_assignment PIN_120 -to data2[7]
set_location_assignment PIN_71 -to ins[0]
set_location_assignment PIN_72 -to ins[1]
set_location_assignment PIN_73 -to ins[2]
set_location_assignment PIN_121 -to pdb3
set_location_assignment PIN_52 -to pdb2
set_location_assignment PIN_70 -to pdb1

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY "MAX II"
set_global_assignment -name TOP_LEVEL_ENTITY daa

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EPM1270T144C5ES

# Simulator Assignments
# =====================
set_global_assignment -name ADD_DEFAULT_PINS_TO_SIMULATION_OUTPUT_WAVEFORMS OFF