ldr	    r1,=0x0 		
    str	    r1,[r0]

    ldr	    r0,=INTMSK
    ldr	    r1,=0x07ffffff  ;all interrupt disable
    str	    r1,[r0]
;2.根據(jù)工作頻率設(shè)置PLL
;這里介紹一下計(jì)算公式 
;	Fpllo=(m*Fin)/(p*2^s) 
;	m=MDIV+8,p=PDIV+2,s=SDIV 
;	Fpllo必須大于20Mhz小于66Mhz 
;	Fpllo*2^s必須小于170Mhz 
;如下面的PLLCON設(shè)定中的M_DIV P_DIV S_DIV是取自option.h中 
;#elif 	(MCLK==40000000) 
;#define 	PLL_M (0x48) 
;#define 	PLL_P (0x3) 
;#define 	PLL_S (0x2) 
;所以m=MDIV+8=80,p=PDIV+2=5,s=SDIV=2 
;硬件使用晶振為10Mhz,即Fin=10Mhz 
;Fpllo=80*10/5*2^2=40Mhz 
    ;****************************************************
    ;*	Set clock control registers			*
    ;****************************************************
    ldr	r0,=LOCKTIME
    ldr	r1,=800	    ; count = t_lock * Fin (t_lock=200us, Fin=4MHz) = 800
    str	r1,[r0]

    [ PLLONSTART
    ldr	r0,=PLLCON			;temporary setting of PLL
	ldr	r1,=((M_DIV<<12)+(P_DIV<<4)+S_DIV)	;Fin=10MHz,Fout=40MHz
	str	r1,[r0]
    ]

    ldr	    r0,=CLKCON		 
    ldr	    r1,=0x7ff8	    ;All unit block CLK enable	
    str	    r1,[r0]
;3.設(shè)置存儲(chǔ)相關(guān)寄存器的程序 
;主要設(shè)置SDRAM,flash ROM 存儲(chǔ)器連接和工作時(shí)序的程序,以及片選定義的程序 
;SMRDATA map在下面的程序中定義 
;SMRDATA中涉及的值請(qǐng)參考memcfg.s程序 
;具體寄存器各位含義請(qǐng)參考S3C44B0X Specification
    ;****************************************************
    ;*	Set memory control registers			* 	
    ;****************************************************
    ldr	    r0,=SMRDATA
    ldmia   r0,{r1-r13}
    ldr	    r0,=0x01c80000  ;BWSCON Address
    stmia   r0,{r1-r13}

    ;****************************************************
    ;*	Initialize stacks				* 
    ;****************************************************
    ldr	    sp, =SVCStack	;Why?
    bl	    InitStacks
;
;5.設(shè)置缺省中斷處理函數(shù) 
    ;****************************************************
    ;*	Setup IRQ handler				*
    ;****************************************************
    ldr	    r0,=HandleIRQ		;This routine is needed
    ldr	    r1,=IsrIRQ			;if there isn't 'subs pc,lr,#4' at 0x18, 0x1c
    str	    r1,[r0]
;6.將數(shù)據(jù)段拷貝到RAM中,將ZI數(shù)據(jù)段清零,跳入C語(yǔ)言的main函數(shù)執(zhí)行。
;到這里Bootloader初步引導(dǎo)結(jié)束。拷貝|Image$$RO$$Limit|起始的大小為（|Image$$ZI$$Base|－|Image$$RW$$Base|）
;的數(shù)據(jù)拷貝到|Image$$RW$$Base|對(duì)應(yīng)的數(shù)據(jù)單元處。
    ;********************************************************
    ;*	Copy and paste RW data/zero initialized data	    *
    ;********************************************************
    LDR	    r0, =|Image$$RO$$Limit|	; Get pointer to ROM data
    LDR	    r1, =|Image$$RW$$Base|	; and RAM copy
    LDR	    r3, =|Image$$ZI$$Base|	
	;Zero init base => top of initialised data
			
    CMP	    r0, r1	    ; Check that they are different
    BEQ	    %F1
0		
    CMP	    r1, r3	    ; Copy init data
    LDRCC   r2, [r0], #4    ;--> LDRCC r2, [r0] + ADD r0, r0, #4		 
    STRCC   r2, [r1], #4    ;--> STRCC r2, [r1] + ADD r1, r1, #4
    BCC	    %B0
1		
    LDR	    r1, =|Image$$ZI$$Limit| ; Top of zero init segment
    MOV	    r2, #0
2		
    CMP	    r3, r1	    ; Zero init
    STRCC   r2, [r3], #4
    BCC	    %B2

    [ :LNOT:THUMBCODE
	BL	Main	    ;Don't use main() because ......
;跳入main()函數(shù)
	B	.						
    ]

    [ THUMBCODE		    ;for start-up code for Thumb mode
	orr     lr,pc,#1
	bx      lr
	CODE16
	bl      Main	    ;Don't use main() because ......
	b       .
	CODE32
    ]
;4.初始化各模式下的堆棧指針 
;****************************************************
;*	The function for initializing stack	    *
;****************************************************
InitStacks
	;Don't use DRAM,such as stmfd,ldmfd......
	;SVCstack is initialized before
	;Under toolkit ver 2.50, 'msr cpsr,r1' can be used instead of 'msr cpsr_cxsf,r1'

    mrs	    r0,cpsr
    bic	    r0,r0,#MODEMASK
    orr	    r1,r0,#UNDEFMODE|NOINT
    msr	    cpsr_cxsf,r1		;UndefMode
    ldr	    sp,=UndefStack
	
    orr	    r1,r0,#ABORTMODE|NOINT
    msr	    cpsr_cxsf,r1 	    	;AbortMode
    ldr	    sp,=AbortStack

    orr	    r1,r0,#IRQMODE|NOINT
    msr	    cpsr_cxsf,r1 	    	;IRQMode
    ldr	    sp,=IRQStack
	
    orr	    r1,r0,#FIQMODE|NOINT
    msr	    cpsr_cxsf,r1 	    	;FIQMode
    ldr	    sp,=FIQStack

    bic	    r0,r0,#MODEMASK|NOINT
    orr	    r1,r0,#SVCMODE
    msr	    cpsr_cxsf,r1 	    	;SVCMode
    ldr	    sp,=SVCStack

	;USER mode is not initialized.
    mov	    pc,lr ;The LR register may be not valid for the mode changes.
;
;下面是PWDN模式下的相關(guān)寄存器的定義
;****************************************************
;*	The function for entering power down mode   *
;****************************************************
;void EnterPWDN(int CLKCON);
EnterPWDN
    mov	    r2,r0               ;r0=CLKCON
    ldr	    r0,=REFRESH		
    ldr	    r3,[r0]
    mov	    r1, r3
    orr	    r1, r1, #0x400000   ;self-refresh enable
    str	    r1, [r0]

    nop     ;Wait until self-refresh is issued. May not be needed.
    nop     ;If the other bus master holds the bus, ...
    nop	    ; mov r0, r0
    nop
    nop
    nop
    nop

;enter POWERDN mode
    ldr	    r0,=CLKCON
    str	    r2,[r0]

;wait until enter SL_IDLE,STOP mode and until wake-up
    mov	    r0,#0xff
0   subs    r0,r0,#1
    bne	    %B0

;exit from DRAM/SDRAM self refresh mode.
    ldr	    r0,=REFRESH
    str	    r3,[r0]
    
    mov	    pc,lr

    LTORG
;
;
;這是上面提到的對(duì)存儲(chǔ)寄存器初始化的數(shù)據(jù)映射表（DATA Map） 
SMRDATA DATA
;*****************************************************************
;* Memory configuration has to be optimized for best performance *
;* The following parameter is not optimized.                     *
;*****************************************************************

;*** memory access cycle parameter strategy ***
; 1) Even FP-DRAM, EDO setting has more late fetch point by half-clock
; 2) The memory settings,here, are made the safe parameters even at 66Mhz.
; 3) FP-DRAM Parameters:tRCD=3 for tRAC, tcas=2 for pad delay, tcp=2 for bus load.
; 4) DRAM refresh rate is for 40Mhz. 

   
	DCD 0x11110090	;Bank0=OM[1:0], Bank1~Bank7=16bit, bank2=8bit;
 	DCD ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC))	;GCS0
	DCD ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC))	;GCS1 
	DCD ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC))	;GCS2
	DCD ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC))	;GCS3
	DCD ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC))	;GCS4
	DCD ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC))	;GCS5
	DCD ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN))	;GCS6
	DCD ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN))	;GCS7
	DCD ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)	;REFRESH RFEN=1, TREFMD=0, trp=3clk, trc=5clk, tchr=3clk,count=1019
	DCD 0x16				;SCLK power mode, BANKSIZE 32M/32M
	DCD 0x20			;MRSR6 CL=2clk
	DCD 0x20			;MRSR7

	ALIGN

;下面是對(duì)RAM區(qū)域數(shù)據(jù)映射表的（DATA Map）的定義 
	AREA RamData, DATA, READWRITE
;從地址(_ISR_STARTADDRESS-0x500)處保留指定字節(jié)數(shù)的空間
	^	(_ISR_STARTADDRESS-0x500)
				
UserStack	#	256	;c1(c7)ffa00	;以地址(_ISR_STARTADDRESS-0x500)起始保留連續(xù)256個(gè)字節(jié)		
SVCStack	#	256	;c1(c7)ffb00	;緊接著保留256個(gè)字節(jié)
UndefStack	#	256	;c1(c7)ffc00
AbortStack	#	256	;c1(c7)ffd00
IRQStack	#	256	;c1(c7)ffe00
FIQStack	#	0	;c1(c7)fff00

;從地址_ISR_STARTADDRESS處保留指定字節(jié)數(shù)的空間
		^	_ISR_STARTADDRESS		
HandleReset	#	4			;保留4個(gè)連續(xù)字節(jié)
HandleUndef	#	4
HandleSWI	#	4
HandlePabort	#	4
HandleDabort	#	4
HandleReserved	#	4
HandleIRQ	#	4
HandleFIQ	#	4

;Don't use the label 'IntVectorTable',
;because armasm.exe cann't recognize this label correctly.
;the value is different with an address you think it may be.
;IntVectorTable
HandleADC	#	4
HandleRTC	#	4
HandleUTXD1	#	4
HandleUTXD0	#	4
HandleSIO	#	4
HandleIIC	#	4
HandleURXD1	#	4
HandleURXD0	#	4
HandleTIMER5	#	4
HandleTIMER4	#	4
HandleTIMER3	#	4
HandleTIMER2	#	4
HandleTIMER1	#	4
HandleTIMER0	#	4
HandleUERR01	#	4
HandleWDT	#	4
HandleBDMA1	#	4
HandleBDMA0	#	4
HandleZDMA1	#	4
HandleZDMA0	#	4
HandleTICK	#	4
HandleEINT4567	#	4
HandleEINT3	#	4
HandleEINT2	#	4
HandleEINT1	#	4
HandleEINT0	#	4   ;0xc1(c7)fff84

		END