halt
halt
halt
mipsendian little


# *** Chip Select 0 *** #
# mem_stcfg0
long 0xB4001000 = 0x00000000
# mem_sttime0
long 0xB4001004 = 0x040181D7
# mem_staddr0
long 0xB4001008 = 0x11803E00

# *** Chip Select 1 *** #
# mem_stcfg1
long 0xB4001010 = 0x00000080
# mem_sttime1
long 0xB4001014 = 0x22080a20
# mem_staddr1
long 0xB4001018 = 0x00c03f00

# *** Chip Select 2 *** #
# mem_stcfg2
long 0xB4001020 = 0x00000040
# mem_sttime2
long 0xB4001024 = 0x22080a20
# mem_staddr2
long 0xB4001028 = 0x11003f00

# *** Chip Select 3 *** #
# mem_stcfg3
long 0xB4001030 = 0x00000002
# mem_sttime3
long 0xB4001034 = 0x280E3E07
# mem_staddr3
long 0xB4001038 = 0x10000000



# *** Configure DDR *** #

# mem_sdmode0
long 0xB4000000 = 0x04276223

# mem_sdmode1
long 0xB4000004 = 0x04276223

# mem_sdmode2
long 0xB4000008 = 0x00000000

# mem_sdaddr0
long 0xB400000C = 0xA21003f0

# mem_sdaddr1
long 0xB4000010 = 0xA21043f0

# mem_sdaddr2
long 0xB4000014 = 0x00000000

# mem_gcr1
long 0xB4000848 = 0x00000000

# mem_gcr0 - Refresh Disable
long 0xB4000840 = 0xA030060A

# mem_pgrech
long 0xB40008c0 = 0x00000000

# mem_wrext0
long 0xB4000880 = 0x40000000

# mem_wrext1
long 0xB4000888 = 0x40000000

# mem_wrext0
long 0xB4000880 = 0x00000023

# mem_wrext1
long 0xB4000888 = 0x00000023

# mem_pgrech
long 0xB40008c0 = 0x00000000

# mem_autorf - Two auto refreshes
long 0xB40008c8 = 0x00000000
long 0xB40008c8 = 0x00000000

# mem_gcr0 - Refresh Enable
long 0xB4000840 = 0xA830060A