#ifndef RTC_H
#define RTC_H
/******************************************************************************
**
**  COPYRIGHT (C) 2000, 2001 Intel Corporation.
**
**  This software as well as the software described in it is furnished under 
**  license and may only be used or copied in accordance with the terms of the 
**  license. The information in this file is furnished for informational use 
**  only, is subject to change without notice, and should not be construed as 
**  a commitment by Intel Corporation. Intel Corporation assumes no 
**  responsibility or liability for any errors or inaccuracies that may appear 
**  in this document or any software that may be provided in association with 
**  this document. 
**  Except as permitted by such license, no part of this document may be 
**  reproduced, stored in a retrieval system, or transmitted in any form or by 
**  any means without the express written consent of Intel Corporation. 
**
**  FILENAME:       xsrtc.h
**
**  PURPOSE:        contains the register definitions and prototypes for 
**                  the RTC (Real Time Clock)
**
**  LAST MODIFIED:  02/08/2001
**  EAS 2.1
******************************************************************************/


/*
*******************************************************************************
RTSR RTC Status Register
*******************************************************************************
*/

#define RTSR_HZE        (0x1u << 3) // 1 Hz interrupt enable
#define RTSR_ALE        (0x1u << 2) // RTC Alarm Interrupt Enable
#define RTSR_HZ         (0x1u << 1) // 1 Hz rising edge detected
#define RTSR_AL         (0x1u << 0) // RTC alarm detected

/*
*******************************************************************************
RTTR RTC Trim Register
*******************************************************************************
*/

#define RTTR_LCK        (0x1u << 31) // Locking bit for the trim value
#define RTTR_TDC_SHIFT  16           // Trim delete count
#define RTTR_TDC_MASK   (0x3FFu << RTTR_TDC_SHIFT)           
#define RTTR_CDC_SHIFT  0
#define RTTR_CDC_MASK   (0xFFFFu << RTTR_CDC_SHIFT) // Clock divider count      

#define RTTR_DEFAULT_VALUE  0x00007FFF // assumes perfect crystals
/*
*******************************************************************************
Register structure
*******************************************************************************
*/
typedef struct RTCRegsS
{
VUINT32 RCNR;       //RTC count register
VUINT32 RTAR;       //RTC Alarm register
VUINT32 RTSR;       //RTC Status register
VUINT32 RTTR;       //RTC Timer trim register
} RTCRegsT;                                   

#define RTC_REGISTER_BASE    0x40900000

/*
*******************************************************************************
Local error location codes
*******************************************************************************
*/
typedef enum RTC_LOCATIONS_E 
{
    ERR_RTC_GENPULSE,
    ERR_RTC_HWINIT,
    ERR_RTC_INTHANDLER,
    ERR_RTC_TRIM
}RTC_LOCATIONS_T;


/*
*******************************************************************************
Function declarations
*******************************************************************************
*/

#ifdef RTC_GLOBALS
#define EXTRN
#else
#define EXTRN extern
#endif
EXTRN void RTCSWInit (void);
EXTRN UINT32 RTCHWSetup(void);
EXTRN UINT32 RTCTrim (UINT32, UINT32);
EXTRN void RTCEnableAlarm(void);
EXTRN void RTCDisableAlarm(void);

EXTRN void RTCEnable1HzAlarm(void);
EXTRN void RTCDisable1HzAlarm(void);
EXTRN void RTCClear1HzAlarm(void);

EXTRN UINT32 RTCGeneratePulse (UINT32, UINT32); 
EXTRN void RTCHandleAlarmInterrupt (void); 

/*
*******************************************************************************
End function declarations
*******************************************************************************
*/
#undef EXTRN
#endif // RTC_H