?? mode_switch1.asm
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;*******************************************************************************
; FILENAME : MODE_Switch1.ASM
; AUTHOR : SONiX
; PURPOSE : Test System Mode (Normal mode, Slow mode, Green mode, and Power
; down mode) Switching
; REVISION : 28/01/2003 V1.0 First issue
;*******************************************************************************
;* (c) Copyright 2003, SONiX TECHNOLOGY CO., LTD.
;*******************************************************************************
CHIP SN8P1808 ; Select the CHIP
//{{SONIX_CODE_OPTION
.Code_Option OSG Enable
.Code_Option High_Clk 4M_X'tal
.Code_Option High_Clk/2 Enable
.Code_Option Watch_Dog Enable
.Code_Option Security Enable
.Code_Option LVD Enable
.Code_Option LCD Enable
//}}SONIX_CODE_OPTION
;-------------------------------------------------------------------------------
; Include Files
;-------------------------------------------------------------------------------
.nolist ; do not list the macro file
INCLUDESTD MACRO1.H
INCLUDESTD MACRO2.H
INCLUDESTD MACRO3.H
.list ; Enable the listing function
;-------------------------------------------------------------------------------
; Constants Definition
;-------------------------------------------------------------------------------
; ONE EQU 1
;-------------------------------------------------------------------------------
; Variables Definition
;-------------------------------------------------------------------------------
.DATA
org 0h ;Bank 0 data section start from RAM address 0x000
Wk00B0 DS 1 ;Temporary buffer for main loop
Iwk00B0 DS 1 ;Temporary buffer for ISR
AccBuf DS 1 ;Accumulater buffer
PflagBuf DS 1 ;PFLAG buffer
org 100h ;Bank 1 data section start from RAM address 0x100
BufB1 DS 20 ;Temporary buffer in bank 1
;-------------------------------------------------------------------------------
; Bit Flag Definition
;-------------------------------------------------------------------------------
Wk00B0_0 EQU Wk00B0.0 ;Bit 0 of Wk00B0
Iwk00B0_1 EQU Iwk00B0.1 ;Bit 1 of Iwk00
;-------------------------------------------------------------------------------
; Code section
;-------------------------------------------------------------------------------
.CODE
ORG 0 ;Code section start
jmp Reset ;Reset vector
;Address 4 to 7 are reserved
ORG 8
jmp Isr ;Interrupt vector
ORG 10h
;-------------------------------------------------------------------------------
; Program reset section
;-------------------------------------------------------------------------------
Reset:
mov A,#07Fh ;Initial stack pointer and
b0mov STKP,A ;disable global interrupt
b0mov PFLAG,#00h ;pflag = x,x,x,x,x,c,dc,z
b0mov RBANK,#00h ;Set initial RAM bank in bank 0
mov A,#40h ;Clear watchdog timer and initial system mode
b0mov OSCM,A
call ClrRAM ;Clear RAM
call SysInit ;System initial
b0bset FGIE ;Enable global interrupt
;-------------------------------------------------------------------------------
; Main routine
;-------------------------------------------------------------------------------
Main:
b0bset FWDRST ;Clear watchdog timer
call MnApp
jmp Main
;-------------------------------------------------------------------------------
; Main application
;-------------------------------------------------------------------------------
MnApp:
; Put your main program here
;Normal/Slow mode to power down(sleep) mode (Wakeup by P0/P1)
b0bset fcpum0 ;Set CPUM0=1
;Normal mode to slow mode (The external high-speed oscillator is still running)
b0bset fclkmd ;To set CLKMD=1
;Slow mode to normal mode (The external high-speed oscillator is still running)
b0bclr fclkmd ;To set CLKMD=0
;Normal mode to slow mode (The external high-speed oscillator stops)
b0bset fclkmd ;To set CLKMD=1
b0bset fstphx ;To stop external high-speed oscillator
;Slow mode to normal mode (The external high-speed oscillator stops)
b0bclr fstphx ;Turn on the external high-speed oscillator
b0mov z,#27 ;If VDD=5V, internal RC=32KHz (typical) will delay
@@: decms z ;0.125ms*81=10.125ms for external clock stable
jmp @B
b0bclr fclkmd ;Change the system back to the normal mode
;Normal/Slow mode to green mode (Wakeup by P0/P1)
b0bset fcpum1 ;To set CPUM1=1
;Normal/Slow mode to green mode (Wakeup by T0)
b0bclr ft0ien ;To disable T0 interrupt service
b0bclr ft0enb ;To disable T0 timer
mov a,#20h
b0mov t0m,a ;To set T0 clock=fcpu/64
mov a,#74h
b0mov t0c,a ;To set T0C initial value=74H (To set T0 interval=10ms)
b0bclr ft0ien ;To disable T0 interrupt service
b0bclr ft0irq ;To clear T0 interrupt request
b0bset ft0enb ;To enable T0 timer
b0bclr fcpum0 ;To set CPUM1,CPUM0=10 (Go into green mode)
b0bset fcpum1
ret
;-----------------------------------
; Jump table routine
;-----------------------------------
ORG 0x0100 ;The jump table should start from the head
;of boundary.
b0mov A,Wk00B0
and A,#3
ADD PCL,A
jmp JmpSub0
jmp JmpSub1
jmp JmpSub2
;-----------------------------------
JmpSub0:
; Subroutine 1
jmp JmpExit
JmpSub1:
; Subroutine 2
jmp JmpExit
JmpSub2:
; Subroutine 3
jmp JmpExit
JmpExit:
ret ;Return Main
;-------------------------------------------------------------------------------
; Isr (Interrupt Service Routine)
; Arguments :
; Returns :
; Reg Change:
;-------------------------------------------------------------------------------
/*
Processing multi-interrupt request needs to set the priority of these interrupt requests.
The IRQ flags of the 7 interrupt are controlled by the interrupt event occurring. But the
IRQ flag set doesn't mean the system to execute the interrupt vector. The IRQ flags can be
triggered by the events without interrupt enable. Just only any the event occurs and the
IRQ will be logic "1".
There are two things need to do for multi-interrupt. One is to make a good priority for
these interrupts. Two is using IEN and IRQ flags to decide executing interrupt service
routine or not.
*/
Isr:
;-----------------------------------
; Save ACC and system registers
;-----------------------------------
b0xch A,AccBuf ;B0xch instruction do not change C,Z flag
push ; Save 80h ~ 87h system
;-----------------------------------
; Check which interrupt happen
;-----------------------------------
INTP00CHK: ; Check INT0 interrupt request
B0BTS1 FP00IEN ; Check P00IEN
JMP INTP01CHK ; Jump check to next interrupt
B0BTS0 FP00IRQ ; Check P00IRQ
JMP INTP00 ; Jump to INT0 interrupt service routine
INTP01CHK: ; Check INT1 interrupt request
B0BTS1 FP01IEN ; Check P01IEN
JMP INTP02CHK ; Jump check to next interrupt
B0BTS0 FP01IRQ ; Check P01IRQ
JMP INTP01 ; Jump to INT1 interrupt service routine
INTP02CHK: ; Check INT2 interrupt request
B0BTS1 FP02IEN ; Check P02IEN
JMP INTT0CHK ; Jump check to next interrupt
B0BTS0 FP02IRQ ; Check P02IRQ
JMP INTP02 ; Jump to INT2 interrupt service routine
INTT0CHK: ; Check T0 interrupt request
B0BTS1 FT0IEN ; Check T0IEN
JMP INTTC0CHK ; Jump check to next interrupt
B0BTS0 FT0IRQ ; Check T0IRQ
JMP INTT0 ; Jump to T0 interrupt service routine
INTTC0CHK: ; Check TC0 interrupt request
B0BTS1 FTC0IEN ; Check TC0IEN
JMP INTTC1CHK ; Jump check to next interrupt
B0BTS0 FTC0IRQ ; Check TC0IRQ
JMP INTTC0 ; Jump to TC0 interrupt service routine
INTTC1CHK: ; Check TC1 interrupt request
B0BTS1 FTC1IEN ; Check TC1IEN
JMP INTSIOCHK ; Jump check to next interrupt
B0BTS0 FTC1IRQ ; Check TC1IRQ
JMP INTTC1 ; Jump to TC1 interrupt service routine
INTSIOCHK: ; Check SIO interrupt request
B0BTS1 FSIOIEN ; Check SIOIEN
JMP INT_EXIT ; Jump to exit of IRQ
B0BTS0 FSIOIRQ ; Check SIOIRQ
JMP INTSIO ; Jump to SIO interrupt service routine
;-----------------------------------
; Exit interrupt service routine
;-----------------------------------
INT_EXIT:
pop ; Restore 80h ~ 87h system registers
b0xch A,AccBuf ; B0xch instruction do not change C,Z flag
reti ; Exit the interrupt routine
;-------------------------------------------------------------------------------
; INT0 interrupt service routine
;-------------------------------------------------------------------------------
INTP00:
b0bclr FP00IRQ
;Process P0.0 external interrupt here
jmp INT_EXIT
;-------------------------------------------------------------------------------
; INT1 interrupt service routine
;-------------------------------------------------------------------------------
INTP01:
b0bclr FP01IRQ
;Process P0.1 external interrupt here
jmp INT_EXIT
;-------------------------------------------------------------------------------
; INT2 interrupt service routine
;-------------------------------------------------------------------------------
INTP02:
b0bclr FP02IRQ
;Process P0.2 external interrupt here
jmp INT_EXIT
;-------------------------------------------------------------------------------
; T0 interrupt service routine
;-------------------------------------------------------------------------------
INTT0:
b0bclr FT0IRQ
;Process T0 internal interrupt here
jmp INT_EXIT
;-------------------------------------------------------------------------------
; TC0 interrupt service routine
;-------------------------------------------------------------------------------
INTTC0:
b0bclr FTC0IRQ
;Process TC0 timer interrupt here
jmp INT_EXIT
;-------------------------------------------------------------------------------
; TC1 interrupt service routine
;-------------------------------------------------------------------------------
INTTC1:
b0bclr FTC1IRQ
;Process TC1 timer interrupt here
jmp INT_EXIT
;-------------------------------------------------------------------------------
; SIO interrupt service routine
;-------------------------------------------------------------------------------
INTSIO:
b0bclr FSIOIRQ
;Process SIO interrupt here
jmp INT_EXIT
;-------------------------------------------------------------------------------
; SysInit
; Initialize I/O, Timer, Interrupt, etc.
;-------------------------------------------------------------------------------
SysInit:
@SET_PUR 0x33 ;Set P0, P1, P4, P5 with pull-up resistor
mov a,#00h ;Clear P1, P2, P4, P5
b0mov p1,a
b0mov p2,a
b0mov p4,a
b0mov p5,a
mov a,#00h
b0mov p1m,a ;Set P1 to input mode
mov a,#00000001b
b0mov p1w,a ;Enable P1.0 wakeup function
ret
;-------------------------------------------------------------------------------
; ClrRAM
; Use index @YZ to clear RAM (00h~7Fh)
;-------------------------------------------------------------------------------
ClrRAM:
; RAM Bank 0
clr Y ;Select bank 0
b0mov Z,#0x7f ;Set @YZ address from 7fh
ClrRAM10:
clr @YZ ;Clear @YZ content
decms Z ;z = z - 1 , skip next if z=0
jmp ClrRAM10
clr @YZ ;Clear address 0x00
; RAM Bank 1
mov A,#1
b0mov Y,A ;Select bank 1
b0mov Z,#0x7f ;Set @YZ address from 17fh
ClrRAM20:
clr @YZ ;Clear @YZ content
decms Z ;z = z - 1 , skip next if z=0
jmp ClrRAM20
clr @YZ ;Clear address 0x100
ret
;-------------------------------------------------------------------------------
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