HIF003
--
-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
--
-- Warning: do not edit this file!
--
FILES
{
	chengfa.vhd
	{
		chengfa [] [U2043679.DLS,U7449008.DLS,U1147235.DLS]
		{
			0 [] [];
		}
		ONE_BIT_ADDER [] []
		{
			1 [] [];
		}
	}
}
TREE
{
	chengfa::(0,0):(0): chengfa.vhd
	{
		one_bit_adder:1:(77,19):(4831,U_0_0): chengfa.vhd;
		one_bit_adder:1:(80,19):(4832,U_0_1): chengfa.vhd;
		one_bit_adder:1:(83,19):(4833,U_0_2): chengfa.vhd;
		one_bit_adder:1:(86,19):(4834,U_0_3): chengfa.vhd;
		one_bit_adder:1:(89,19):(4835,U_0_4): chengfa.vhd;
		one_bit_adder:1:(92,19):(4836,U_0_5): chengfa.vhd;
		one_bit_adder:1:(98,19):(4837,U_0_6): chengfa.vhd;
		one_bit_adder:1:(102,19):(4838,U_1_0): chengfa.vhd;
		one_bit_adder:1:(105,19):(4839,U_1_1): chengfa.vhd;
		one_bit_adder:1:(108,19):(4840,U_1_2): chengfa.vhd;
		one_bit_adder:1:(111,19):(4841,U_1_3): chengfa.vhd;
		one_bit_adder:1:(114,19):(4842,U_1_4): chengfa.vhd;
		one_bit_adder:1:(117,19):(4843,U_1_5): chengfa.vhd;
		one_bit_adder:1:(123,19):(4844,U_1_6): chengfa.vhd;
		one_bit_adder:1:(128,19):(4845,U_2_0): chengfa.vhd;
		one_bit_adder:1:(131,19):(4846,U_2_1): chengfa.vhd;
		one_bit_adder:1:(134,19):(4847,U_2_2): chengfa.vhd;
		one_bit_adder:1:(137,19):(4848,U_2_3): chengfa.vhd;
		one_bit_adder:1:(140,19):(4849,U_2_4): chengfa.vhd;
		one_bit_adder:1:(143,19):(4850,U_2_5): chengfa.vhd;
		one_bit_adder:1:(149,19):(4851,U_2_6): chengfa.vhd;
		one_bit_adder:1:(153,19):(4852,U_3_0): chengfa.vhd;
		one_bit_adder:1:(156,19):(4853,U_3_1): chengfa.vhd;
		one_bit_adder:1:(159,19):(4854,U_3_2): chengfa.vhd;
		one_bit_adder:1:(162,19):(4855,U_3_3): chengfa.vhd;
		one_bit_adder:1:(165,19):(4856,U_3_4): chengfa.vhd;
		one_bit_adder:1:(168,19):(4857,U_3_5): chengfa.vhd;
		one_bit_adder:1:(174,19):(4858,U_3_6): chengfa.vhd;
		one_bit_adder:1:(178,19):(4859,U_4_0): chengfa.vhd;
		one_bit_adder:1:(181,19):(4860,U_4_1): chengfa.vhd;
		one_bit_adder:1:(184,19):(4861,U_4_2): chengfa.vhd;
		one_bit_adder:1:(187,19):(4862,U_4_3): chengfa.vhd;
		one_bit_adder:1:(190,19):(4863,U_4_4): chengfa.vhd;
		one_bit_adder:1:(193,19):(4864,U_4_5): chengfa.vhd;
		one_bit_adder:1:(199,19):(4865,U_4_6): chengfa.vhd;
		one_bit_adder:1:(203,19):(4866,U_5_0): chengfa.vhd;
		one_bit_adder:1:(206,19):(4867,U_5_1): chengfa.vhd;
		one_bit_adder:1:(209,19):(4868,U_5_2): chengfa.vhd;
		one_bit_adder:1:(212,19):(4869,U_5_3): chengfa.vhd;
		one_bit_adder:1:(215,19):(4870,U_5_4): chengfa.vhd;
		one_bit_adder:1:(218,19):(4871,U_5_5): chengfa.vhd;
		one_bit_adder:1:(224,19):(4872,U_5_6): chengfa.vhd;
	}
}