/**********************************************************/
/* Linker Command File genarated with                       */
/* DMC Developer             Copyright (C) Technosoft 1999  */
/**********************************************************/
/*-q
-a
-e _start


"D:\Work\Projects\P043_28x_Demos\ASMDemos\Adc\adc_a.obj"*/
/*--------------------------------------------------*/
/*  MEMORY ALLOCATION                     */
/*--------------------------------------------------*/
-l rts2800.lib
-stack 1023
MEMORY
{
PAGE 0 :

   /* SARAM  H0 is split between PAGE 0 and PAGE 1 */  
   PRAMH0     : origin = 0x3F8080, length = 0x001F00   
    /*length = 0x000F80			 */
   /*ZONE22      : origin = 0x010000, length = 0x001000*/
   /*This memory block loaded with the reset vector only if 
       booting from XINTF Zone 7.  Otherwise reset vector is
       fetched from boot ROM. See .reset section below        */
   RESET      : origin = 0x3FFFC0, length = 0x000002           
         
PAGE 1 : 
   /* SARAM                     */     
   RAMM0    : origin = 0x000000, length = 0x000400
   RAMM1    : origin = 0x000400, length = 0x000400
   RAMM2    : origin = 0x008000, length = 0x001000
   /* Peripheral Frame 0:   */
   DEV_EMU    : origin = 0x000880, length = 0x000180
   FLASH_REGS : origin = 0x000A80, length = 0x000060
   CSM        : origin = 0x000AE0, length = 0x000010
   XINTF      : origin = 0x000B20, length = 0x000020
   CPU_TIMER0 : origin = 0x000C00, length = 0x000008
   CPU_TIMER1 : origin = 0x000C08, length = 0x000008		 
   CPU_TIMER2 : origin = 0x000C10, length = 0x000008		 
   PIE_CTRL   : origin = 0x000CE0, length = 0x000020
   PIE_VECT   : origin = 0x000D00, length = 0x000100

   /* Peripheral Frame 1:   */
   ECANA       : origin = 0x006000, length = 0x000040     /* eCAN registers */
   ECANA_LAM   : origin = 0x006040, length = 0x000040     /* eCAN mailbox LAM */
   ECANA_MOTS  : origin = 0x006080, length = 0x000040     /* eCAN MOTS  */
   ECANA_MOTO  : origin = 0x0060C0, length = 0x000040     /* eCAN MOTO  */
   ECANA_MBOX  : origin = 0x006100, length = 0x000100     /* eCAN mailboxes */

   /* Peripheral Frame 2:   */
   SYSTEM     : origin = 0x007010, length = 0x000020
   SPI_A      : origin = 0x007040, length = 0x000010
   SCI_A      : origin = 0x007050, length = 0x000010
   XINTRUPT   : origin = 0x007070, length = 0x000010
   GPIOMUX    : origin = 0x0070C0, length = 0x000020
   GPIODAT    : origin = 0x0070E0, length = 0x000020
   ADC        : origin = 0x007100, length = 0x000020
   EV_A       : origin = 0x007400, length = 0x000040
   EV_B       : origin = 0x007500, length = 0x000040
   SPI_B      : origin = 0x007740, length = 0x000010
   SCI_B      : origin = 0x007750, length = 0x000010
   MCBSP_A    : origin = 0x007800, length = 0x000040

   /* CSM Password Locations */
   CSM_PWL    : origin = 0x3F7FF8, length = 0x000008

   /* SARAM  H0 is split between PAGE 0 and PAGE 1 */     
   DRAMH0_USR : origin = 0x3f9000, length = 0x000400       
   DRAMH0	  : origin = 0x3f9400, length = 0x000C00   
   
   EXTMEM     : origin = 0x100000, length = 0x040000     /* External memory XINTF zone 6 */
}
 
 
SECTIONS
{
   /* Allocate program areas: */
   
   /* The codestart section (found in CodeStartBranch.asm)
      re-directs execution to the start of user code.  
      Place this section or the .text section at the
      start of H0  */
   codestart        : > PRAMH0,      PAGE = 0
   .text            : > PRAMH0,      PAGE = 0
   .cinit           : > PRAMH0,      PAGE = 0
   ramfuncs         : > PRAMH0,      PAGE = 0, TYPE = DSECT  /* not used when only using RAM */
   
   /* Allocate data areas: */
   .stack           : > RAMM1,       PAGE = 1
   .bss             : > DRAMH0,      PAGE = 1
   .ebss            : > DRAMH0,      PAGE = 1
   .const           : > RAMM2,       PAGE = 1
   .econst          : > RAMM2,       PAGE = 1     
   .sysmem          : > DRAMH0,      PAGE = 1

   /* .reset indicates the start of _c_int00 for C Code.  
   /* When using the boot ROM this section is not needed.  
   /* Thus, the default type is set to DESECT */ 
   .reset           : > RESET,      PAGE = 0, TYPE = DSECT
   
   /* Allocate Peripheral Frame 0 Register Structures:   */
   DevEmuRegsFile    : > DEV_EMU,    PAGE = 1
   FlashRegsFile     : > FLASH_REGS, PAGE = 1
   CsmRegsFile       : > CSM,        PAGE = 1
   XintfRegsFile     : > XINTF,      PAGE = 1
   CpuTimer0RegsFile : > CPU_TIMER0, PAGE = 1  

   /* CPU_TIMER1 and CPU_TIMER2 are reserved for DSP BIOS
      and RTOS use.  Therefore these sections are not
      allocated in these examples 
   CpuTimer1RegsFile : > CPU_TIMER1, PAGE = 1      
   CpuTimer2RegsFile : > CPU_TIMER2, PAGE = 1
   */
      
   PieCtrlRegsFile   : > PIE_CTRL,   PAGE = 1      
   PieVectTableFile  : > PIE_VECT,   PAGE = 1

   /* Allocate Peripheral Frame 2 Register Structures:   */
   ECanaRegsFile     : > ECANA,      PAGE = 1   
   ECanaLamFile      : > ECANA_LAM,  PAGE = 1   
   ECanaMotsFile     : > ECANA_MOTS, PAGE = 1   
   ECanaMotoFile     : > ECANA_MOTO, PAGE = 1   
   ECanaMboxesFile   : > ECANA_MBOX, PAGE = 1

   /* Allocate Peripheral Frame 1 Register Structures:   */
   SysCtrlRegsFile   : > SYSTEM,     PAGE = 1
   SpiaRegsFile      : > SPI_A,      PAGE = 1
   SciaRegsFile      : > SCI_A,      PAGE = 1
   XIntruptRegsFile  : > XINTRUPT,   PAGE = 1
   GpioMuxRegsFile   : > GPIOMUX,    PAGE = 1
   GpioDataRegsFile  : > GPIODAT     PAGE = 1
   AdcRegsFile       : > ADC,        PAGE = 1
   EvaRegsFile       : > EV_A,       PAGE = 1
   EvbRegsFile       : > EV_B,       PAGE = 1
   ScibRegsFile      : > SCI_B,      PAGE = 1
   McbspaRegsFile    : > MCBSP_A,    PAGE = 1

   /* CSM Password Locations */
   CsmPwlFile        : > CSM_PWL,    PAGE = 1
   
   /* Demo variables Locations */
   DemoFile      	 : > DRAMH0_USR, PAGE = 1
   DemoResFile   	 : > EXTMEM,     PAGE = 1
}