/** ###################################################################
**     THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
**     Filename  : Vectors.C
**     Project   : ETH_TEST_3
**     Processor : MC9S12NE64CPV
**     Beantype  : MC9S12NE64_112
**     Version   : Bean 01.000, Driver 01.12, CPU db: 2.87.027
**     Datasheet : 9S12NE-FamilyDGV1/D V01.04
**     Compiler  : Metrowerks HC12 C Compiler
**     Date/Time : 23.02. 2004, 15:28
**     Abstract  :
**         This bean "MC9S12NE64_112" implements properties, methods,
**         and events of the CPU.
**     Settings  :
**
**     Contents  :
**         EnableInt   - void Cpu_EnableInt(void);
**         DisableInt  - void Cpu_DisableInt(void);
**         SetWaitMode - void Cpu_SetWaitMode(void);
**         SetStopMode - void Cpu_SetStopMode(void);
**
**     (c) Copyright UNIS, spol. s r.o. 1997-2004
**     UNIS, spol. s r.o.
**     Jundrovska 33
**     624 00 Brno
**     Czech Republic
**     http      : www.processorexpert.com
**     mail      : info@processorexpert.com
** ###################################################################*/


#include "Cpu.h"
#include "IV1.h"
#include "IV2.h"
#include "IV3.h"
#include "IV4.h"
#include "IV5.h"
#include "IV6.h"
#include "IV7.h"
#include "IV8.h"
#include "IV9.h"
#include "IV10.h"
#include "IV11.h"
#include "IV12.h"			

extern void near _EntryPoint(void);    /* Startup routine */

/********** Added by R42485 >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> */
#pragma CODE_SEG __NEAR_SEG NON_BANKED /* Interrupt section for this module. Placement will be in NON_BANKED area. */
__interrupt void RealTimeInterrupt (void);

#pragma CODE_SEG DEFAULT               /* Change code section to DEFAULT. */
/* <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<< */


//==================================================
//=========DEMO SUPPORT =========================================
//==================================================
#pragma CODE_SEG __NEAR_SEG NON_BANKED /* Interrupt section for this module. Placement will be in NON_BANKED area. */
__interrupt void PortHInterrupt (void);

#pragma CODE_SEG DEFAULT               /* Change code section to DEFAULT. */
//==================================================
//==================================================

typedef void (*near tIsrFunc)(void);
const tIsrFunc _vect[] @0xFF80 = {     /* Interrupt table */
        Cpu_Interrupt,                 /* 0 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 1 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 2 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 3 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 4 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 5 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 6 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 7 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 8 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 9 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 10 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 11 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 12 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 13 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 14 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 15 Default (unused) interrupt */
        emac_ec_isr,
        emac_lc_isr,
        emac_b_rx_error_isr,
        emac_rx_b_b_o_isr,
        emac_rx_b_a_o_isr,
        emac_rx_error_isr,
        emac_mii_mtc_isr,
        emac_rx_fc_isr,
        emac_f_tx_c_isr,
        emac_rx_b_b_c_isr,
        emac_rx_b_a_c_isr,
        ephy_isr,
        Cpu_Interrupt,                 /* 28 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 29 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 30 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 31 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 32 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 33 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 34 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 35 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 36 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 37 Default (unused) interrupt */
        PortHInterrupt,                 /* 38 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 39 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 40 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 41 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 42 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 43 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 44 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 45 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 46 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 47 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 48 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 49 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 50 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 51 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 52 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 53 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 54 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 55 Default (unused) interrupt */
        RealTimeInterrupt,             /* 56 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 57 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 58 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 59 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 60 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 61 Default (unused) interrupt */
        Cpu_Interrupt,                 /* 62 Default (unused) interrupt */
        _EntryPoint                    /* Reset vector */
   };
/*
** ###################################################################
**
**     This file was created by UNIS Processor Expert 03.44 for 
**     the Motorola HCS12 series of microcontrollers.
**          !!! DEVELOPER VERSION FOR INTERNAL USAGE ONLY !!!
**
** ###################################################################
*/