?? dm9000end.c
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/* dm9000End.c - dm9000 END network interface driver */
/* Copyright Reserevd all by Davicom Semiconductor CO.,LTD */
/* V1.0 */
/* V1.1 2006/02/20 Bill */
/* V1.11 2006/04/14 JOB */
/* ADD DM9008A , DM900xA PCEL */
/* V1.2 2006/12/31 Landsailor */
/* Ported to ARM s3c2440a, corrected structure */
/* end_device align error; modified dmfe_start_xmit() */
/* and dm9000Int(), now can ping big packet(>1532); */
#include "copyright_wrs.h"
#include "vxWorks.h"
#include "stdlib.h"
#include "cacheLib.h"
#include "intLib.h"
#include "end.h" /* Common END structures. */
#include "endLib.h"
#include "lstLib.h" /* Needed to maintain protocol list. */
#include "wdLib.h"
#include "iv.h"
#include "semLib.h"
#include "etherLib.h"
#include "logLib.h"
#include "netLib.h"
#include "netBufLib.h"
#include "stdio.h"
#include "sysLib.h"
#include "errno.h"
#include "errnoLib.h"
#include "memLib.h"
#include "iosLib.h"
#undef ETHER_MAP_IP_MULTICAST
#include "etherMultiLib.h" /* multicast stuff. */
#include "end.h"
#include "muxLib.h"
#include "etherLib.h"
#include "net/mbuf.h"
#include "net/unixLib.h"
#include "net/protosw.h"
#include "net/systm.h"
#include "net/if_subr.h"
#include "net/route.h"
#include "netinet/in.h"
#include "sys/socket.h"
#include "sys/ioctl.h"
#include "sys/times.h"
#include "arpLib.h"
#include "config.h"
IMPORT int endMultiLstCnt (END_OBJ* pEnd);
#define EEmyMAC 0x00
#define EEmyIP 0x30
#define EEhostIP 0x34
/* defines */
#undef UCHAR
#undef UWORD
#define UCHAR unsigned char
#define UWORD unsigned short
#define DM9000_REG00 0x00
#define DM9000_REG05 0x31 /*clj SKIP_CRC/SKIP_LONG whz modify*/
#define DM9000_REG05_OFF 0x00 /*clj reset stop receive */
#define DM9000_REG08 0x27 /* SAILOR yuan 0x27 *//*old =0x3f */
#define DM9000_REG09 0x38
#define DM9000_REG0A 0x08
#define DM9000_REGFF 0x83 /*clj 0x8F IMR enable tr and re intrupt */
#define DM9000_REGFF_OFF 0x80 /*clj reset stop int request*/
#define DM9000_PHY 0x40 /* clj represent PHY address 0x01 bit 7,6 01 */
#define DM9000_PHY_OFF 0x01 /*clj powerdown the internal phy register*/
#define DM9000_PHY_ON 0x00 /*clj poweron the internal phy register*/
#define DM9000_PKT_MAX 1536 /* Received packet max size */
#define DM9000_PKT_RDY 0x01 /*clj regf0 bit[0]=1 indicate pkt-ready Packet ready to receive */
#define DM9000_10MHD 0x00
#define DM9000_100MHD 0x01
#define DM9000_10MFD 0x04
#define DM9000_100MFD 0x05
#define DM9000_AUTO 0x08
/*#define DM9008A 0x10 cljG*/
#define DM900xA_PECL 0x15
#define DM9000_MEDIA_MODE DM9000_AUTO
#define DM9000_DEV_NAME "dmf"
#define DM9000_DEV_NAME_LEN 4 /*clj dmf's length*/
#define DM9000_BSAEADDR 0x10000000
#define DM9000_IOADDR DM9000_BSAEADDR + 0x0 /*cljG io addrbase*/
#define DM9000_IODATA DM9000_BSAEADDR + 0x4 /*cljG io database*/
/* Configuration items */
/*cljG*/
#ifndef ETHERMTU
#define ETHERMTU (1500)
#endif
#ifndef ENET_HDR_REAL_SIZ
#define ENET_HDR_REAL_SIZ 14
#endif
#define END_BUFSIZ (ETHERMTU + ENET_HDR_REAL_SIZ + 6) /* 1500 + 14 + 6 */
#define EH_SIZE (14)
#define END_SPEED_10M 10000000 /* 10Mbs */
#define END_SPEED_100M 100000000 /* 100Mbs */
#define END_SPEED END_SPEED_100M
/*s3c2440a registers define*/
#undef rEXTINT0
#undef rEXTINT1
#undef rEXTINT2
#undef rGPFCON
#undef rGPFDAT
#undef rGPFUP
#undef rSRCPND
#undef rINTMOD
#undef rINTMSK
#undef rPRIORITY
#undef rINTPND
#undef rINTOFFSET
#undef rSUBSRCPND
#undef rINTSUBMSK
#undef rEINTMASK
#undef rEINTPEND
#define rEXTINT0 (*(volatile unsigned long *)0x56000088)
#define rEXTINT1 (*(volatile unsigned long *)0x5600008c)
#define rEXTINT2 (*(volatile unsigned long *)0x56000090)
#define rGPFCON (*(volatile unsigned long *)0x56000050)
#define rGPFDAT (*(volatile unsigned long *)0x56000054)
#define rGPFUP (*(volatile unsigned long *)0x56000058)
#define rSRCPND (*(volatile unsigned long *)0x4a000000)
#define rINTMOD (*(volatile unsigned long *)0x4a000004)
#define rINTMSK (*(volatile unsigned long *)0x4a000008)
#define rPRIORITY (*(volatile unsigned long *)0x4a00000c)
#define rINTPND (*(volatile unsigned long *)0x4a000010)
#define rINTOFFSET (*(volatile unsigned long *)0x4a000014)
#define rSUBSRCPND (*(volatile unsigned long *)0x4a000018)
#define rINTSUBMSK (*(volatile unsigned long *)0x4a00001c)
#define rEINTMASK (*(volatile unsigned long *)0x560000a4)
#define rEINTPEND (*(volatile unsigned long *)0x560000a8)
#undef htons
#define htons(x) ((((x)&0xff00)>>8)|((x)&0x00ff)<<8)
/* Cache macros */
#define END_CACHE_INVALIDATE(address, len) \
CACHE_DRV_INVALIDATE (&pDrvCtrl->cacheFuncs, (address), (len))
#define END_CACHE_PHYS_TO_VIRT(address) \
CACHE_DRV_PHYS_TO_VIRT (&pDrvCtrl->cacheFuncs, (address))
#define END_CACHE_VIRT_TO_PHYS(address) \
CACHE_DRV_VIRT_TO_PHYS (&pDrvCtrl->cacheFuncs, (address))
/*
* Default macro definitions for BSP interface.
* These macros can be redefined in a wrapper file, to generate
* a new module with an optimized interface.
*/
/* Macro to connect interrupt handler to vector */
#ifndef SYS_INT_CONNECT
#define SYS_INT_CONNECT(pDrvCtrl,rtn,arg,pResult) \
{ \
IMPORT STATUS intConnect(); \
*pResult = intConnect ((VOIDFUNCPTR *)INUM_TO_IVEC (pDrvCtrl->ivec), \
rtn, (int)arg); \
}
#endif
/* Macro to disconnect interrupt handler from vector */
#ifndef SYS_INT_DISCONNECT
#define SYS_INT_DISCONNECT(pDrvCtrl,rtn,pResult) \
{ \
*pResult = OK; /* HELP: need a real routine */ \
}
#endif
/* Macro to get the ethernet address from the BSP */
/*
* Macros to do a short (UINT16) access to the chip. Default
* assumes a normal memory mapped device.
*/
#ifndef DM9000_IN_ADDR /*clj*/
#define DM9000_IN_ADDR( addr ) \
(addr = *(volatile UCHAR *)(DM9000_IOADDR))
/*addr = sysInByte( (DM9000_IOADDR)); */
#endif
#ifndef DM9000_OUT_ADDR /*clj*/
#define DM9000_OUT_ADDR( addr ) \
(*(volatile UCHAR *)(DM9000_IOADDR) = addr)
/*sysOutByte(DM9000_IOADDR,addr);*/
#endif
#ifndef DM9000_IN_BYTE /*clj*/
#define DM9000_IN_BYTE( data ) \
(data = *(volatile UCHAR *)(DM9000_IODATA))
/*data=sysInByte( (DM9000_IODATA)); */
#endif
#ifndef DM9000_OUT_BYTE /*clj*/
#define DM9000_OUT_BYTE( data ) \
(*(volatile UCHAR *)(DM9000_IODATA) = data)
/*sysOutByte( (DM9000_IODATA),(data))*/
#endif
#ifndef DM9000_IN_WORD /*clj*/
#define DM9000_IN_WORD( data ) \
(data = *(volatile UWORD *)(DM9000_IODATA))
/*data = sysInWord( DM9000_IODATA);*/
#endif
#ifndef DM9000_OUT_WORD /*clj*/
#define DM9000_OUT_WORD( data ) \
(*(volatile UWORD *)(DM9000_IODATA) = data)
/*sysOutWord( (DM9000_IODATA),data);*/
#endif
#ifndef DM9000_OUT_CHAR /*clj*/
#define DM9000_OUT_CHAR(addr,value)\
{ \
(*(volatile UCHAR *)(DM9000_IOADDR) = addr); \
(*(volatile UCHAR *)(DM9000_IODATA) = value); \
}
/*sysOutByte( DM9000_IOADDR,addr);\
sysOutByte( DM9000_IODATA,value);\ */
#endif
#ifndef DM9000_IN_CHAR /*clj*/
#define DM9000_IN_CHAR(addr,data)\
{ \
(*(volatile UCHAR *)(DM9000_IOADDR) = addr); \
(data = *(volatile UCHAR *)(DM9000_IODATA)); \
}
/*sysOutByte( (DM9000_IOADDR),(addr));\
data = sysInByte(DM9000_IODATA);\*/
#endif
/* A shortcut for getting the hardware address from the MIB II stuff. */
#define END_HADDR(pEnd) \
((pEnd)->mib2Tbl.ifPhysAddress.phyAddress)
#define END_HADDR_LEN(pEnd) \
((pEnd)->mib2Tbl.ifPhysAddress.addrLength)
/* typedefs */
typedef struct
{
int len;
char * pData;
} PKT; /* A dummy DMA data packet */
#define DM9000_PKT_LEN_GET(pPkt) (((PKT *)pPkt)->len)
#define DM9000_PKT_DATA_GET(pPkt) (((PKT *)pPkt)->pData)
typedef struct rfd
{
PKT * pPkt;
struct rfd * next;
} RFD; /* dummy rx frame descriptor */
/* The definition of the driver control structure */
typedef struct end_device
{
END_OBJ end; /* The class we inherit from. */
END_ERR err;
UINT IOBase;
int unit; /* unit number */
int ivec; /* interrupt vector */
int ilevel; /* interrupt level */
long flags; /* Our local flags. */
UCHAR enetAddr[6]; /* ethernet address */
CACHE_FUNCS cacheFuncs; /* cache function pointers */
CL_POOL_ID pClPoolId; /* cluster pool */
BOOL rxHandling; /* rcv task is scheduled */
UCHAR io_mode; /* 0:word, 2:byte */
char tx_pkt_cnt;
char device_wait_reset;
UWORD queue_pkt_len;
UCHAR reg0; /* registers saved */
UCHAR nic_type; /* NIC type */
UCHAR op_mode; /* PHY operation mode */
UCHAR mcastFilter[8]; /* multicast filter */
UCHAR dummyBytes[3]; /* dummyBytes, for 32-bit align */
UCHAR txBuf[ETHERMTU + EH_SIZE + 6 + 64 ];
} END_DEVICE;
/*
* This will only work if there is only a single unit, for multiple
* unit device drivers these should be integrated into the END_DEVICE
* structure.
*/
M_CL_CONFIG dm9000MclBlkConfig = /* network mbuf configuration table */
{
/*
no. mBlks no. clBlks memArea memSize
----------- ---------- ------- -------
*/
256, 128, NULL, 0
};
CL_DESC dm9000ClDescTbl [] = /* network cluster pool configuration table */
{
/*
clusterSize num memArea memSize
----------- ---- ------- -------
*/
{END_BUFSIZ, 0, NULL, 0}
};
int dm9000ClDescTblNumEnt = (NELEMENTS(dm9000ClDescTbl));
NET_POOL dm9000CmpNetPool;
/* Definitions for the flags field */
#define DM9000_PROMISCUOUS 0x01
#define DM9000_POLLING 0x02
/* Status register bits, returned by dm9000StatusRead() */
#define DM9000_RINT 0x01 /* Rx interrupt pending */
#define DM9000_TINT 0x02 /* Tx interrupt pending */
#define DM9000_VALID_INT 0x03 /* Any valid interrupt pending */
#define DM9000_RXON 0x04 /* Rx on (enabled) */
#define DM9000_TFULL 0x08 /* tx full */
#define DM9000_RXRDY 0x10 /* data rdy */
#define DM9000_MIN_FBUF (1536) /* min first buffer size */
/* DEBUG MACROS */
#ifdef DEBUG
#endif /* ENDDEBUG */
#undef DRV_DEBUG
#define DRV_DEBUG
#define INT_LOCK()
#define INT_UNLOCK(x)
int g_RecvNumError=0;
int g_RecvNum=0;
int g_IntrNum=0;
#ifdef DRV_DEBUG
#define DRV_DEBUG_OFF 0x0000
#define DRV_DEBUG_NO 0x0000
#define DRV_DEBUG_RX 0x0001
#define DRV_DEBUG_TX 0x0002
#define DRV_DEBUG_INT 0x0004
#define DRV_DEBUG_POLL 0x0008
#define DRV_DEBUG_POLL_RX 0x0010
#define DRV_DEBUG_POLL_TX 0x0020
#define DRV_DEBUG_LOAD 0x0040
#define DRV_DEBUG_IOCTL 0x0080
#define DRV_DEBUG_IO 0x0100
#define DRV_DEBUG_STATUS 0x0200
#define DRV_DEBUG_POLL_REDIR 0x0400
#define DRV_DEBUG_LOG_NVRAM 0x0800
#define DRV_PK 0x1000
int dm9000Debug = 0;
int dm9000TxInts = 0;
static char dbg_array[]={0x0d,0x0a,'\0'};
extern void whz_puts( char * );
extern void whz_puthex( unsigned long int );
#define DRV_LOG(FLG, X0, X1, X2, X3, X4, X5, X6) \
{ \
if (dm9000Debug & FLG) \
if (_func_logMsg != NULL) \
_func_logMsg (X0, X1, X2, X3, X4, X5, X6); \
}
#define DRV_SP( FLG, X0 )\
{\
if( dm9000Debug & FLG )\
{\
printf(X0);\
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