?? m500auc.lst
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710 2 }
711 1 return status;
712 1 }
713
714 ///////////////////////////////////////////////////////////////////////
715 // M I F A R E R E M O T E A N T E N N A
716 // Configuration of slave module
717 ///////////////////////////////////////////////////////////////////////
718 char M500PcdMfInOutSlaveConfig(void)
719 {
720 1 char idata status = MI_OK;
721 1
722 1 FlushFIFO(); // empty FIFO
723 1 ResetInfo(MInfo);
724 1 MSndBuffer[0] = 0x10; // addr low byte
725 1 MSndBuffer[1] = 0x00; // addr high byte
726 1
727 1 MSndBuffer[2] = 0x00; // Page
728 1 MSndBuffer[3] = 0x7B; // RegTxControl modsource 11,InvTx2,Tx2RFEn,TX1RFEn
729 1 MSndBuffer[4] = 0x3F; // RegCwConductance
730 1 MSndBuffer[5] = 0x3F; // RFU13
731 1 MSndBuffer[6] = 0x19; // RFU14
732 1 MSndBuffer[7] = 0x13; // RegModWidth
733 1 MSndBuffer[8] = 0x00; // RFU16
734 1 MSndBuffer[9] = 0x00; // RFU17
735 1
736 1 MSndBuffer[10] = 0x00; // Page
C51 COMPILER V8.05a M500AUC 03/18/2008 10:38:22 PAGE 13
737 1 MSndBuffer[11] = 0x73; // RegRxControl1
738 1 MSndBuffer[12] = 0x08; // RegDecoderControl
739 1 MSndBuffer[13] = 0x6c; // RegBitPhase
740 1 MSndBuffer[14] = 0xFF; // RegRxThreshold
741 1 MSndBuffer[15] = 0x00; // RFU1D
742 1 MSndBuffer[16] = 0x00; // RegRxControl2
743 1 MSndBuffer[17] = 0x00; // RegClockQControl
744 1
745 1 MSndBuffer[18] = 0x00; // Page
746 1 MSndBuffer[19] = 0x06; // RegRxWait
747 1 MSndBuffer[20] = 0x03; // RegChannelRedundancy
748 1 MSndBuffer[21] = 0x63; // RegCRCPresetLSB
749 1 MSndBuffer[22] = 0x63; // RegCRCPresetMSB
750 1 MSndBuffer[23] = 0x0; // RFU25
751 1 MSndBuffer[24] = 0x04; // RegMfOutSelect enable mfout = manchester HT
752 1 MSndBuffer[25] = 0x00; // RFU27
753 1
754 1 // PAGE 5 FIFO, Timer and IRQ-Pin Configuration
755 1 MSndBuffer[26] = 0x00; // Page
756 1 MSndBuffer[27] = 0x08; // RegFIFOLevel
757 1 MSndBuffer[28] = 0x07; // RegTimerClock
758 1 MSndBuffer[29] = 0x06; // RegTimerControl
759 1 MSndBuffer[30] = 0x0A; // RegTimerReload
760 1 MSndBuffer[31] = 0x02; // RegIRqPinConfig
761 1 MSndBuffer[32] = 0x00; // RFU
762 1 MSndBuffer[33] = 0x00; // RFU
763 1 MInfo.nBytesToSend = 34;
764 1
765 1 status = M500PcdCmd(PCD_WRITEE2,
766 1 MSndBuffer,
767 1 MRcvBuffer,
768 1 &MInfo); // write e2
769 1 return status;
770 1 }
771
772 ///////////////////////////////////////////////////////////////////////
773 // M I F A R E R E M O T E A N T E N N A
774 // Configuration of master module
775 ///////////////////////////////////////////////////////////////////////
776 char M500PcdMfInOutMasterConfig(void)
777 {
778 1 WriteIO(RegRxControl2,0x42);
779 1 WriteIO(RegTxControl,0x10);
780 1 WriteIO(RegBitPhase,0x11);
781 1
782 1 return MI_OK;
783 1 }
784
785 ///////////////////////////////////////////////////////////////////////
786 // M A S T E R K E Y L O A D
787 ///////////////////////////////////////////////////////////////////////
788 char M500PcdLoadMk(unsigned char auth_mode, // KEYA or KEYB
789 unsigned char key_addr, // 0 <= key_addr <= 15
790 unsigned char *mk) // 6 bytes uncoded master key
791 {
792 1 unsigned char idata offset = (auth_mode == PICC_AUTHENT1A) ? 0 : 6;
793 1
794 1 memcpy(MKeys[key_addr] + offset,mk,6);
795 1 return MI_OK;
796 1 }
797
798 ///////////////////////////////////////////////////////////////////////
C51 COMPILER V8.05a M500AUC 03/18/2008 10:38:22 PAGE 14
799 // E E P R O M M A S T E R K E Y L O A D
800 ///////////////////////////////////////////////////////////////////////
801 char M500PcdLoadKeyE2(unsigned char key_type,
802 unsigned char sector,
803 unsigned char *uncoded_keys)
804 {
805 1 char idata status = MI_OK;
806 1 // eeprom address calculation
807 1 // 0x80 ... offset
808 1 // key_sector ... sector
809 1 // 0x18 ... 2 * 12 = 24 = 0x18
810 1 unsigned short idata e2addr = 0x80 + sector * 0x18;
811 1 unsigned char idata *e2addrbuf = (unsigned char*)&e2addr;
812 1 unsigned char idata keycoded[12];
813 1
814 1 if (key_type == PICC_AUTHENT1B)
815 1 e2addr += 12; // key B offset
816 1
817 1 FlushFIFO(); // empty FIFO
818 1 ResetInfo(MInfo);
819 1
820 1 M500HostCodeKey(uncoded_keys,keycoded);
821 1 memcpy(MSndBuffer,e2addrbuf,2); // write low and high byte of address
822 1 MSndBuffer[2] = MSndBuffer[0]; // Move the LSB of the 2-bytes
823 1 MSndBuffer[0] = MSndBuffer[1]; // address to the first byte
824 1 MSndBuffer[1] = MSndBuffer[2];
825 1 memcpy(&MSndBuffer[2],keycoded,12); // write 12 bytes of coded keys
826 1 MInfo.nBytesToSend = 14;
827 1
828 1 // write load command
829 1 status = M500PcdCmd(PCD_WRITEE2,
830 1 MSndBuffer,
831 1 MRcvBuffer,
832 1 &MInfo);
833 1
834 1 return status;
835 1 }
836
837 ///////////////////////////////////////////////////////////////////////
838 // E E P R O M R E A D
839 ///////////////////////////////////////////////////////////////////////
840 char PcdReadE2(unsigned short startaddr,
841 unsigned char length,
842 unsigned char* _data)
843 {
844 1 char status = MI_OK;
845 1
846 1 // ************* Cmd Sequence **********************************
847 1 ResetInfo(MInfo);
848 1 MSndBuffer[0] = startaddr & 0xFF;
849 1 MSndBuffer[1] = (startaddr >> 8) & 0xFF;
850 1 MSndBuffer[2] = length;
851 1 MInfo.nBytesToSend = 3;
852 1 status = M500PcdCmd(PCD_READE2,
853 1 MSndBuffer,
854 1 MRcvBuffer,
855 1 &MInfo);
856 1 if (status == MI_OK)
857 1 {
858 2 memcpy(_data,MRcvBuffer,length);
859 2 }
860 1 else // Response Processing
C51 COMPILER V8.05a M500AUC 03/18/2008 10:38:22 PAGE 15
861 1 {
862 2 _data[0] = 0;
863 2 }
864 1 return status ;
865 1 }
866
867 ///////////////////////////////////////////////////////////////////////
868 // E E P R O M W R I T E
869 ///////////////////////////////////////////////////////////////////////
870 char PcdWriteE2(unsigned short startaddr,
871 unsigned char length,
872 unsigned char* _data)
873 {
874 1 char status = MI_OK;
875 1
876 1 // ************* Cmd Sequence **********************************
877 1 ResetInfo(MInfo);
878 1 MSndBuffer[0] = startaddr & 0xFF;
879 1 MSndBuffer[1] = (startaddr >> 8) & 0xFF;
880 1 memcpy(MSndBuffer + 2,_data,length);
881 1
882 1 MInfo.nBytesToSend = length + 2;
883 1
884 1 status = M500PcdCmd(PCD_WRITEE2,
885 1 MSndBuffer,
886 1 MRcvBuffer,
887 1 &MInfo); // write e2
888 1 return status;
889 1 }
890
891 ///////////////////////////////////////////////////////////////////////
892 // C O N F I G M F O U T S E L E C T
893 ///////////////////////////////////////////////////////////////////////
894 char M500PcdMfOutSelect(unsigned char type)
895 {
896 1 WriteIO(RegMfOutSelect,type&0x7);
897 1 return MI_OK;
898 1 }
899
900 ///////////////////////////////////////////////////////////////////////
901 // W R I T E R E G I S T E R
902 ///////////////////////////////////////////////////////////////////////
903 char M500PcdWriteRegister(unsigned char Reg, unsigned char value)
904 {
905 1 WriteIO(Reg,value);
906 1 return MI_OK;
907 1 }
908
909 ///////////////////////////////////////////////////////////////////////
910 // R E A D R E G I S T E R
911 ///////////////////////////////////////////////////////////////////////
912 char M500PcdReadRegister(unsigned char Reg)
913 {
914 1 char value;
915 1
916 1 value = ReadIO(Reg);
917 1 return (value);
918 1 }
919
920 ///////////////////////////////////////////////////////////////////////
921 // M I F A R E R E Q U E S T
922 ///////////////////////////////////////////////////////////////////////
C51 COMPILER V8.05a M500AUC 03/18/2008 10:38:22 PAGE 16
923 char M500PiccRequest(unsigned char req_code, // request code ALL = 0x52
924 // or IDLE = 0x26
925 unsigned char *atq) // answer to request
926 {
927 1 return M500PiccCommonRequest(req_code,atq);
928 1 }
929
930 ///////////////////////////////////////////////////////////////////////
931 // M I F A R E C O M M O N R E Q U E S T
932 ///////////////////////////////////////////////////////////////////////
933 char M500PiccCommonRequest(unsigned char req_code,
934 unsigned char *atq)
935 {
936 1 char idata status = MI_OK;
937 1
938 1 //************* initialize ******************************
939 1 WriteIO(RegChannelRedundancy,0x03); // RxCRC and TxCRC disable, parity enable
940 1 ClearBitMask(RegControl,0x08); // disable crypto 1 unit
941 1 WriteIO(RegBitFraming,0x07); // set TxLastBits to 7
942 1 SetBitMask(RegTxControl,0x03); // Tx2RF-En, Tx1RF-En enable
943 1
944 1 ResetInfo(MInfo);
945 1 MSndBuffer[0] = req_code;
946 1 MInfo.nBytesToSend = 1;
947 1 status = M500PcdCmd(PCD_TRANSCEIVE,
948 1 MSndBuffer,
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