?? io_map.h
字號(hào):
} Overlap_STR;
struct {
word grpBIT :16;
} MergedBits;
} TC5STR;
extern volatile TC5STR _TC5 @(REG_BASE + 0x0000005A);
#define TC5 _TC5.Word
#define TC5_BIT _TC5.MergedBits.grpBIT
/*** TC6 - Timer Input Capture/Output Compare Register 6; 0x0000005C ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** TC6Hi - Timer Input Capture/Output Compare Register 6 High; 0x0000005C ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* Timer Input Capture/Output Compare Register 6 Bit 8 */
byte BIT9 :1; /* Timer Input Capture/Output Compare Register 6 Bit 9 */
byte BIT10 :1; /* Timer Input Capture/Output Compare Register 6 Bit 10 */
byte BIT11 :1; /* Timer Input Capture/Output Compare Register 6 Bit 11 */
byte BIT12 :1; /* Timer Input Capture/Output Compare Register 6 Bit 12 */
byte BIT13 :1; /* Timer Input Capture/Output Compare Register 6 Bit 13 */
byte BIT14 :1; /* Timer Input Capture/Output Compare Register 6 Bit 14 */
byte BIT15 :1; /* Timer Input Capture/Output Compare Register 6 Bit 15 */
} Bits;
struct {
byte grpBIT_8 :8;
} MergedBits;
} TC6HiSTR;
#define TC6Hi _TC6.Overlap_STR.TC6HiSTR.Byte
#define TC6Hi_BIT8 _TC6.Overlap_STR.TC6HiSTR.Bits.BIT8
#define TC6Hi_BIT9 _TC6.Overlap_STR.TC6HiSTR.Bits.BIT9
#define TC6Hi_BIT10 _TC6.Overlap_STR.TC6HiSTR.Bits.BIT10
#define TC6Hi_BIT11 _TC6.Overlap_STR.TC6HiSTR.Bits.BIT11
#define TC6Hi_BIT12 _TC6.Overlap_STR.TC6HiSTR.Bits.BIT12
#define TC6Hi_BIT13 _TC6.Overlap_STR.TC6HiSTR.Bits.BIT13
#define TC6Hi_BIT14 _TC6.Overlap_STR.TC6HiSTR.Bits.BIT14
#define TC6Hi_BIT15 _TC6.Overlap_STR.TC6HiSTR.Bits.BIT15
#define TC6Hi_BIT_8 _TC6.Overlap_STR.TC6HiSTR.MergedBits.grpBIT_8
#define TC6Hi_BIT TC6Hi_BIT_8
/*** TC6Lo - Timer Input Capture/Output Compare Register 6 Low; 0x0000005D ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Timer Input Capture/Output Compare Register 6 Bit 0 */
byte BIT1 :1; /* Timer Input Capture/Output Compare Register 6 Bit 1 */
byte BIT2 :1; /* Timer Input Capture/Output Compare Register 6 Bit 2 */
byte BIT3 :1; /* Timer Input Capture/Output Compare Register 6 Bit 3 */
byte BIT4 :1; /* Timer Input Capture/Output Compare Register 6 Bit 4 */
byte BIT5 :1; /* Timer Input Capture/Output Compare Register 6 Bit 5 */
byte BIT6 :1; /* Timer Input Capture/Output Compare Register 6 Bit 6 */
byte BIT7 :1; /* Timer Input Capture/Output Compare Register 6 Bit 7 */
} Bits;
struct {
byte grpBIT :8;
} MergedBits;
} TC6LoSTR;
#define TC6Lo _TC6.Overlap_STR.TC6LoSTR.Byte
#define TC6Lo_BIT0 _TC6.Overlap_STR.TC6LoSTR.Bits.BIT0
#define TC6Lo_BIT1 _TC6.Overlap_STR.TC6LoSTR.Bits.BIT1
#define TC6Lo_BIT2 _TC6.Overlap_STR.TC6LoSTR.Bits.BIT2
#define TC6Lo_BIT3 _TC6.Overlap_STR.TC6LoSTR.Bits.BIT3
#define TC6Lo_BIT4 _TC6.Overlap_STR.TC6LoSTR.Bits.BIT4
#define TC6Lo_BIT5 _TC6.Overlap_STR.TC6LoSTR.Bits.BIT5
#define TC6Lo_BIT6 _TC6.Overlap_STR.TC6LoSTR.Bits.BIT6
#define TC6Lo_BIT7 _TC6.Overlap_STR.TC6LoSTR.Bits.BIT7
#define TC6Lo_BIT _TC6.Overlap_STR.TC6LoSTR.MergedBits.grpBIT
} Overlap_STR;
struct {
word grpBIT :16;
} MergedBits;
} TC6STR;
extern volatile TC6STR _TC6 @(REG_BASE + 0x0000005C);
#define TC6 _TC6.Word
#define TC6_BIT _TC6.MergedBits.grpBIT
/*** TC7 - Timer Input Capture/Output Compare Register 7; 0x0000005E ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** TC7Hi - Timer Input Capture/Output Compare Register 7 High; 0x0000005E ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* Timer Input Capture/Output Compare Register 7 Bit 8 */
byte BIT9 :1; /* Timer Input Capture/Output Compare Register 7 Bit 9 */
byte BIT10 :1; /* Timer Input Capture/Output Compare Register 7 Bit 10 */
byte BIT11 :1; /* Timer Input Capture/Output Compare Register 7 Bit 11 */
byte BIT12 :1; /* Timer Input Capture/Output Compare Register 7 Bit 12 */
byte BIT13 :1; /* Timer Input Capture/Output Compare Register 7 Bit 13 */
byte BIT14 :1; /* Timer Input Capture/Output Compare Register 7 Bit 14 */
byte BIT15 :1; /* Timer Input Capture/Output Compare Register 7 Bit 15 */
} Bits;
struct {
byte grpBIT_8 :8;
} MergedBits;
} TC7HiSTR;
#define TC7Hi _TC7.Overlap_STR.TC7HiSTR.Byte
#define TC7Hi_BIT8 _TC7.Overlap_STR.TC7HiSTR.Bits.BIT8
#define TC7Hi_BIT9 _TC7.Overlap_STR.TC7HiSTR.Bits.BIT9
#define TC7Hi_BIT10 _TC7.Overlap_STR.TC7HiSTR.Bits.BIT10
#define TC7Hi_BIT11 _TC7.Overlap_STR.TC7HiSTR.Bits.BIT11
#define TC7Hi_BIT12 _TC7.Overlap_STR.TC7HiSTR.Bits.BIT12
#define TC7Hi_BIT13 _TC7.Overlap_STR.TC7HiSTR.Bits.BIT13
#define TC7Hi_BIT14 _TC7.Overlap_STR.TC7HiSTR.Bits.BIT14
#define TC7Hi_BIT15 _TC7.Overlap_STR.TC7HiSTR.Bits.BIT15
#define TC7Hi_BIT_8 _TC7.Overlap_STR.TC7HiSTR.MergedBits.grpBIT_8
#define TC7Hi_BIT TC7Hi_BIT_8
/*** TC7Lo - Timer Input Capture/Output Compare Register 7 Low; 0x0000005F ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Timer Input Capture/Output Compare Register 7 Bit 0 */
byte BIT1 :1; /* Timer Input Capture/Output Compare Register 7 Bit 1 */
byte BIT2 :1; /* Timer Input Capture/Output Compare Register 7 Bit 2 */
byte BIT3 :1; /* Timer Input Capture/Output Compare Register 7 Bit 3 */
byte BIT4 :1; /* Timer Input Capture/Output Compare Register 7 Bit 4 */
byte BIT5 :1; /* Timer Input Capture/Output Compare Register 7 Bit 5 */
byte BIT6 :1; /* Timer Input Capture/Output Compare Register 7 Bit 6 */
byte BIT7 :1; /* Timer Input Capture/Output Compare Register 7 Bit 7 */
} Bits;
struct {
byte grpBIT :8;
} MergedBits;
} TC7LoSTR;
#define TC7Lo _TC7.Overlap_STR.TC7LoSTR.Byte
#define TC7Lo_BIT0 _TC7.Overlap_STR.TC7LoSTR.Bits.BIT0
#define TC7Lo_BIT1 _TC7.Overlap_STR.TC7LoSTR.Bits.BIT1
#define TC7Lo_BIT2 _TC7.Overlap_STR.TC7LoSTR.Bits.BIT2
#define TC7Lo_BIT3 _TC7.Overlap_STR.TC7LoSTR.Bits.BIT3
#define TC7Lo_BIT4 _TC7.Overlap_STR.TC7LoSTR.Bits.BIT4
#define TC7Lo_BIT5 _TC7.Overlap_STR.TC7LoSTR.Bits.BIT5
#define TC7Lo_BIT6 _TC7.Overlap_STR.TC7LoSTR.Bits.BIT6
#define TC7Lo_BIT7 _TC7.Overlap_STR.TC7LoSTR.Bits.BIT7
#define TC7Lo_BIT _TC7.Overlap_STR.TC7LoSTR.MergedBits.grpBIT
} Overlap_STR;
struct {
word grpBIT :16;
} MergedBits;
} TC7STR;
extern volatile TC7STR _TC7 @(REG_BASE + 0x0000005E);
#define TC7 _TC7.Word
#define TC7_BIT _TC7.MergedBits.grpBIT
/*** PACNT - Pulse Accumulators Count Register; 0x00000062 ***/
typedef union {
word Word;
struct {
word grpBIT :16;
} MergedBits;
} PACNTSTR;
extern volatile PACNTSTR _PACNT @(REG_BASE + 0x00000062);
#define PACNT _PACNT.Word
#define PACNT_BIT _PACNT.MergedBits.grpBIT
/*** ATDCTL23 - ATD Control Register 23; 0x00000082 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** ATDCTL2 - ATD Control Register 2; 0x00000082 ***/
union {
byte Byte;
struct {
byte ASCIF :1; /* ATD Sequence Complete Interrupt Flag */
byte ASCIE :1; /* ATD Sequence Complete Interrupt Enable */
byte ETRIGE :1; /* External Trigger Mode enable */
byte ETRIGP :1; /* External Trigger Polarity */
byte ETRIGLE :1; /* External Trigger Level/Edge control */
byte AWAI :1; /* ATD Wait Mode */
byte AFFC :1; /* ATD Fast Conversion Complete Flag Clear */
byte ADPU :1; /* ATD Disable / Power Down */
} Bits;
} ATDCTL2STR;
#define ATDCTL2 _ATDCTL23.Overlap_STR.ATDCTL2STR.Byte
#define ATDCTL2_ASCIF _ATDCTL23.Overlap_STR.ATDCTL2STR.Bits.ASCIF
#define ATDCTL2_ASCIE _ATDCTL23.Overlap_STR.ATDCTL2STR.Bits.ASCIE
#define ATDCTL2_ETRIGE _ATDCTL23.Overlap_STR.ATDCTL2STR.Bits.ETRIGE
#define ATDCTL2_ETRIGP _ATDCTL23.Overlap_STR.ATDCTL2STR.Bits.ETRIGP
#define ATDCTL2_ETRIGLE _ATDCTL23.Overlap_STR.ATDCTL2STR.Bits.ETRIGLE
#define ATDCTL2_AWAI _ATDCTL23.Overlap_STR.ATDCTL2STR.Bits.AWAI
#define ATDCTL2_AFFC _ATDCTL23.Overlap_STR.ATDCTL2STR.Bits.AFFC
#define ATDCTL2_ADPU _ATDCTL23.Overlap_STR.ATDCTL2STR.Bits.ADPU
/*** ATDCTL3 - ATD Control Register 3; 0x00000083 ***/
union {
byte Byte;
struct {
byte FRZ0 :1; /* Background Debug Freeze Enable */
byte FRZ1 :1; /* Background Debug Freeze Enable */
byte FIFO :1; /* Result Register FIFO Mode */
byte S1C :1; /* Conversion Sequence Length 1 */
byte S2C :1; /* Conversion Sequence Length 2 */
byte S4C :1; /* Conversion Sequence Length 4 */
byte S8C :1; /* Conversion Sequence Length 8 */
byte :1;
} Bits;
struct {
byte grpFRZ :2;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} ATDCTL3STR;
#define ATDCTL3 _ATDCTL23.Overlap_STR.ATDCTL3STR.Byte
#define ATDCTL3_FRZ0 _ATDCTL23.Overlap_STR.ATDCTL3STR.Bits.FRZ0
#define ATDCTL3_FRZ1 _ATDCTL23.Overlap_STR.ATDCTL3STR.Bits.FRZ1
#define ATDCTL3_FIFO _ATDCTL23.Overlap_STR.ATDCTL3STR.Bits.FIFO
#define ATDCTL3_S1C _ATDCTL23.Overlap_STR.ATDCTL3STR.Bits.S1C
#define ATDCTL3_S2C _ATDCTL23.Overlap_STR.ATDCTL3STR.Bits.S2C
#define ATDCTL3_S4C _ATDCTL23.Overlap_STR.ATDCTL3STR.Bits.S4C
#define ATDCTL3_S8C _ATDCTL23.Overlap_STR.ATDCTL3STR.Bits.S8C
#define ATDCTL3_FRZ _ATDCTL23.Overlap_STR.ATDCTL3STR.MergedBits.grpFRZ
} Overlap_STR;
struct {
word FRZ0 :1; /* Background Debug Freeze Enable */
word FRZ1 :1; /* Background Debug Freeze Enable */
word FIFO :1; /* Result Register FIFO Mode */
word S1C :1; /* Conversion Sequence Length 1 */
word S2C :1; /* Conversion Sequence Length 2 */
word S4C :1; /* Conversion Sequence Length 4 */
word S8C :1; /* Conversion Sequence Length 8 */
word :1;
word ASCIF :1; /* ATD Sequence Complete Interrupt Flag */
word ASCIE :1; /* ATD Sequence Complete Interrupt Enable */
word ETRIGE :1; /* External Trigger Mode enable */
word ETRIGP :1; /* External Trigger Polarity */
word ETRIGLE :1; /* External Trigger Level/Edge control */
word AWAI :1; /* ATD Wait Mode */
word AFFC :1; /* ATD Fast Conversion Complete Flag Clear */
word ADPU :1; /* ATD Disable / Power Down */
} Bits;
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