/*=============================================================*/
/* Name:           C240.H                                      */
/* Project:        C240.LIB                                    */
/* Description:    TMS320C240 memory mapped registers          */ 
/*=============================================================*/

#ifndef __C240_H_
#define __C240_H_


/********************************************************************/
/* Memory Mapped Register                                           */
/********************************************************************/
#define IMR  *(volatile unsigned int*) 0x0004
#define IFR  *(volatile unsigned int*) 0x0006


/********************************************************************/
/* Watchodg and Real time Interrupt Control Registers               */
/********************************************************************/
#define RTICNTR *(volatile unsigned int*) 0x7021
#define WDCNTR  *(volatile unsigned int*) 0x7023
#define WDKEY   *(volatile unsigned int*) 0x7025
#define RTICR   *(volatile unsigned int*) 0x7027
#define WDCR    *(volatile unsigned int*) 0x7029

/********************************************************************/
/* PLL Clock Registers                                              */
/********************************************************************/
#define CKCR0   *(volatile unsigned int*) 0x702B
#define CKCR1   *(volatile unsigned int*) 0x702D

/********************************************************************/
/* Output Logic							    */
/********************************************************************/
#define OCRA    *(volatile unsigned int*) 0x7090
#define OCRB    *(volatile unsigned int*) 0x7092
#define PADATDIR *(volatile unsigned int*) 0x7098
#define PBDATDIR *(volatile unsigned int*) 0x709A
#define PCDATDIR *(volatile unsigned int*) 0x709C

/********************************************************************/
/*     Definitions for SCI Module                                   */
/********************************************************************/
#define SCICCR  *(unsigned int*) 0x7050   /* SCI communications control register    */
#define SCICTL1 *(unsigned int*) 0x7051   /* SCI control register                   */
#define SCIHBAUD *(unsigned int*)0x7052   /* Baud rate select MSB                   */
#define SCILBAUD *(unsigned int*)0x7053   /* Baud rate select LSB                   */
#define SCICTL2  *(unsigned int*)0x7054   /* Transmitter int. control and status reg*/
#define SCIRXST  *(unsigned int*)0x7055   /* Receiver int. control and status reg   */
#define SCIRXEMU *(unsigned int*)0x7056   /* Receiver data buffer                   */
#define SCIRXBUF *(unsigned int*)0x7057   /* Transmit data buffer                   */
#define SCITXBUF *(unsigned int*)0x7059   /* Transmit data buffer                   */
#define SCIPC2   *(unsigned int*)0x705E   /* Port control register #2               */
#define SCIPRI   *(unsigned int*)0x705F   /* Interrupt priority control register    */



/********************************************************************/
/*     Definitions for ADC Module                                   */
/* structures are computed uncorrectly by the C Compiler v6.60 !    */ 
/* therefore following approach has to be used                      */
/********************************************************************/
#define ADCTRL1  *(volatile unsigned int*) 0x7032   /* ADC Control register 1 */
#define ADCTRL2  *(volatile unsigned int*) 0x7034   /* ADC Control register 2 */
#define ADCFIFO1 *(volatile unsigned int*) 0x7036   /* ADC1  result FIFO */
#define ADCFIFO2 *(volatile unsigned int*) 0x7038   /* ADC2 result FIFO */


/********************************************************************/
/*      Definitions for EV Module                                   */
/* structures are computed uncorrectly by the C Compiler v6.60 !    */ 
/********************************************************************/
#define GPTCON  *(volatile unsigned int*) 0x7400   
#define T1CNT   *(volatile unsigned int*) 0x7401   
#define T1CMPR  *(volatile unsigned int*) 0x7402   
#define T1PR    *(volatile unsigned int*) 0x7403   
#define T1CON   *(volatile unsigned int*) 0x7404   
#define T2CNT   *(volatile unsigned int*) 0x7405   
#define T2CMPR  *(volatile unsigned int*) 0x7406   
#define T2PR    *(volatile unsigned int*) 0x7407   
#define T2CON   *(volatile unsigned int*) 0x7408   
#define T3CNT   *(volatile unsigned int*) 0x7409   
#define T3CMPR  *(volatile unsigned int*) 0x740A
#define T3PR    *(volatile unsigned int*) 0x740B   
#define T3CON   *(volatile unsigned int*) 0x740C
                  
#define COMCON  *(volatile unsigned int*) 0x7411
#define ACTR    *(volatile unsigned int*) 0x7413
#define SACTR   *(volatile unsigned int*) 0x7414
#define DBTCON  *(volatile unsigned int*) 0x7415
#define CMPR1   *(volatile unsigned int*) 0x7417
#define CMPR2   *(volatile unsigned int*) 0x7418
#define CMPR3   *(volatile unsigned int*) 0x7419
#define SCMPR1  *(volatile unsigned int*) 0x741A
#define SCMPR2  *(volatile unsigned int*) 0x741B
#define SCMPR3  *(volatile unsigned int*) 0x741C
                  
#define CAPCON   *(volatile unsigned int*) 0x7420
#define CAPFIFO  *(volatile unsigned int*) 0x7422
#define CAP1FIFO *(volatile unsigned int*) 0x7423
#define CAP2FIFO *(volatile unsigned int*) 0x7424
#define CAP3FIFO *(volatile unsigned int*) 0x7425
#define CAP4FIFO *(volatile unsigned int*) 0x7426
                   
#define EVIMRA  *(volatile unsigned int*) 0x742C
#define EVIMRB  *(volatile unsigned int*) 0x742D
#define EVIMRC  *(volatile unsigned int*) 0x742E
#define EVIFRA  *(volatile unsigned int*) 0x742F
#define EVIFRB  *(volatile unsigned int*) 0x7430
#define EVIFRC  *(volatile unsigned int*) 0x7431
#define EVIVRA  *(volatile unsigned int*) 0x7432
#define EVIVRB  *(volatile unsigned int*) 0x7433
#define EVIVRC  *(volatile unsigned int*) 0x7434

#endif