Recommended properties:    - linux,network-index : This is the intended "index" of this      network device.  This is used by the bootwrapper to interpret      MAC addresses passed by the firmware when no information other      than indices is available to associate an address with a device.    - phy-connection-type : a string naming the controller/PHY interface type,      i.e., "mii" (default), "rmii", "gmii", "rgmii", "rgmii-id", "sgmii",      "tbi", or "rtbi".  This property is only really needed if the connection      is of type "rgmii-id", as all other connection types are detected by      hardware.  Example:	ethernet@24000 {		#size-cells = <0>;		device_type = "network";		model = "TSEC";		compatible = "gianfar";		reg = <24000 1000>;		mac-address = [ 00 E0 0C 00 73 00 ];		interrupts = <d 3 e 3 12 3>;		interrupt-parent = <40000>;		phy-handle = <2452000>	};   c) PHY nodes   Required properties:    - device_type : Should be "ethernet-phy"    - interrupts : <a b> where a is the interrupt number and b is a      field that represents an encoding of the sense and level      information for the interrupt.  This should be encoded based on      the information in section 2) depending on the type of interrupt      controller you have.    - interrupt-parent : the phandle for the interrupt controller that      services interrupts for this device.    - reg : The ID number for the phy, usually a small integer    - linux,phandle :  phandle for this node; likely referenced by an      ethernet controller node.   Example:	ethernet-phy@0 {		linux,phandle = <2452000>		interrupt-parent = <40000>;		interrupts = <35 1>;		reg = <0>;		device_type = "ethernet-phy";	};   d) Interrupt controllers   Some SOC devices contain interrupt controllers that are different   from the standard Open PIC specification.  The SOC device nodes for   these types of controllers should be specified just like a standard   OpenPIC controller.  Sense and level information should be encoded   as specified in section 2) of this chapter for each device that   specifies an interrupt.   Example :	pic@40000 {		linux,phandle = <40000>;		clock-frequency = <0>;		interrupt-controller;		#address-cells = <0>;		reg = <40000 40000>;		built-in;		compatible = "chrp,open-pic";		device_type = "open-pic";		big-endian;	};   e) I2C   Required properties :    - device_type : Should be "i2c"    - reg : Offset and length of the register set for the device   Recommended properties :    - compatible : Should be "fsl-i2c" for parts compatible with      Freescale I2C specifications.    - interrupts : <a b> where a is the interrupt number and b is a      field that represents an encoding of the sense and level      information for the interrupt.  This should be encoded based on      the information in section 2) depending on the type of interrupt      controller you have.    - interrupt-parent : the phandle for the interrupt controller that      services interrupts for this device.    - dfsrr : boolean; if defined, indicates that this I2C device has      a digital filter sampling rate register    - fsl5200-clocking : boolean; if defined, indicated that this device      uses the FSL 5200 clocking mechanism.   Example :	i2c@3000 {		interrupt-parent = <40000>;		interrupts = <1b 3>;		reg = <3000 18>;		device_type = "i2c";		compatible  = "fsl-i2c";		dfsrr;	};   f) Freescale SOC USB controllers   The device node for a USB controller that is part of a Freescale   SOC is as described in the document "Open Firmware Recommended   Practice : Universal Serial Bus" with the following modifications   and additions :     Required properties :    - compatible : Should be "fsl-usb2-mph" for multi port host USB      controllers, or "fsl-usb2-dr" for dual role USB controllers    - phy_type : For multi port host USB controllers, should be one of      "ulpi", or "serial". For dual role USB controllers, should be      one of "ulpi", "utmi", "utmi_wide", or "serial".    - reg : Offset and length of the register set for the device    - port0 : boolean; if defined, indicates port0 is connected for      fsl-usb2-mph compatible controllers.  Either this property or      "port1" (or both) must be defined for "fsl-usb2-mph" compatible       controllers.    - port1 : boolean; if defined, indicates port1 is connected for      fsl-usb2-mph compatible controllers.  Either this property or      "port0" (or both) must be defined for "fsl-usb2-mph" compatible       controllers.    - dr_mode : indicates the working mode for "fsl-usb2-dr" compatible      controllers.  Can be "host", "peripheral", or "otg".  Default to      "host" if not defined for backward compatibility.   Recommended properties :    - interrupts : <a b> where a is the interrupt number and b is a      field that represents an encoding of the sense and level      information for the interrupt.  This should be encoded based on      the information in section 2) depending on the type of interrupt      controller you have.    - interrupt-parent : the phandle for the interrupt controller that      services interrupts for this device.   Example multi port host USB controller device node :	usb@22000 {	        device_type = "usb";		compatible = "fsl-usb2-mph";		reg = <22000 1000>;		#address-cells = <1>;		#size-cells = <0>;		interrupt-parent = <700>;		interrupts = <27 1>;		phy_type = "ulpi";		port0;		port1;	};   Example dual role USB controller device node :	usb@23000 {		device_type = "usb";		compatible = "fsl-usb2-dr";		reg = <23000 1000>;		#address-cells = <1>;		#size-cells = <0>;		interrupt-parent = <700>;		interrupts = <26 1>;		dr_mode = "otg";		phy = "ulpi";	};   g) Freescale SOC SEC Security Engines   Required properties:    - device_type : Should be "crypto"    - model : Model of the device.  Should be "SEC1" or "SEC2"    - compatible : Should be "talitos"    - reg : Offset and length of the register set for the device    - interrupts : <a b> where a is the interrupt number and b is a      field that represents an encoding of the sense and level      information for the interrupt.  This should be encoded based on      the information in section 2) depending on the type of interrupt      controller you have.    - interrupt-parent : the phandle for the interrupt controller that      services interrupts for this device.    - num-channels : An integer representing the number of channels      available.    - channel-fifo-len : An integer representing the number of      descriptor pointers each channel fetch fifo can hold.    - exec-units-mask : The bitmask representing what execution units      (EUs) are available. It's a single 32-bit cell. EU information      should be encoded following the SEC's Descriptor Header Dword      EU_SEL0 field documentation, i.e. as follows:        bit 0 = reserved - should be 0        bit 1 = set if SEC has the ARC4 EU (AFEU)        bit 2 = set if SEC has the DES/3DES EU (DEU)        bit 3 = set if SEC has the message digest EU (MDEU)        bit 4 = set if SEC has the random number generator EU (RNG)        bit 5 = set if SEC has the public key EU (PKEU)        bit 6 = set if SEC has the AES EU (AESU)        bit 7 = set if SEC has the Kasumi EU (KEU)      bits 8 through 31 are reserved for future SEC EUs.    - descriptor-types-mask : The bitmask representing what descriptors      are available. It's a single 32-bit cell. Descriptor type      information should be encoded following the SEC's Descriptor      Header Dword DESC_TYPE field documentation, i.e. as follows:        bit 0  = set if SEC supports the aesu_ctr_nonsnoop desc. type        bit 1  = set if SEC supports the ipsec_esp descriptor type        bit 2  = set if SEC supports the common_nonsnoop desc. type        bit 3  = set if SEC supports the 802.11i AES ccmp desc. type        bit 4  = set if SEC supports the hmac_snoop_no_afeu desc. type        bit 5  = set if SEC supports the srtp descriptor type        bit 6  = set if SEC supports the non_hmac_snoop_no_afeu desc.type        bit 7  = set if SEC supports the pkeu_assemble descriptor type        bit 8  = set if SEC supports the aesu_key_expand_output desc.type        bit 9  = set if SEC supports the pkeu_ptmul descriptor type        bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type        bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type      ..and so on and so forth.   Example:       /* MPC8548E */       crypto@30000 {               device_type = "crypto";               model = "SEC2";               compatible = "talitos";               reg = <30000 10000>;               interrupts = <1d 3>;               interrupt-parent = <40000>;               num-channels = <4>;               channel-fifo-len = <18>;               exec-units-mask = <000000fe>;               descriptor-types-mask = <012b0ebf>;       };   h) Board Control and Status (BCSR)   Required properties:    - device_type : Should be "board-control"    - reg : Offset and length of the register set for the device    Example:	bcsr@f8000000 {		device_type = "board-control";		reg = <f8000000 8000>;	};   i) Freescale QUICC Engine module (QE)   This represents qe module that is installed on PowerQUICC II Pro.   NOTE:  This is an interim binding; it should be updated to fit   in with the CPM binding later in this document.   Basically, it is a bus of devices, that could act more or less   as a complete entity (UCC, USB etc ). All of them should be siblings on   the "root" qe node, using the common properties from there.   The description below applies to the qe of MPC8360 and   more nodes and properties would be extended in the future.   i) Root QE device   Required properties:   - device_type : should be "qe";   - model : precise model of the QE, Can be "QE", "CPM", or "CPM2"   - reg : offset and length of the device registers.   - bus-frequency : the clock frequency for QUICC Engine.   Recommended properties   - brg-frequency : the internal clock source frequency for baud-rate     generators in Hz.   Example:	qe@e0100000 {		#address-cells = <1>;		#size-cells = <1>;		#interrupt-cells = <2>;		device_type = "qe";		model = "QE";		ranges = <0 e0100000 00100000>;		reg = <e0100000 480>;		brg-frequency = <0>;		bus-frequency = <179A7B00>;	}   ii) SPI (Serial Peripheral Interface)   Required properties:   - device_type : should be "spi".   - compatible : should be "fsl_spi".   - mode : the SPI operation mode, it can be "cpu" or "cpu-qe".   - reg : Offset and length of the register set for the device   - interrupts : <a b> where a is the interrupt number and b is a     field that represents an encoding of the sense and level     information for the interrupt.  This should be encod