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AMI-BIOS CHECK-POINT, (C)1991 American Megatrends Inc.,All Rights Reserved
1346 Oakbrook Dr. #120. GA-30093. Phone:(404)-263-8181, Fax:(404)-263-9381
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Checkpoint Codes for AMI BIOS (Release date 4/9/90 and after)

POSTcode       TEST-DESCRIPTION

  01           NMI disabled and 286 register test about to start.
  
  02           286 register test passed.
  
  03           ROM BIOS checksum (32K at F800:0) passed.
  
  04           Keyboard controller test with and without mouse passed.
  
  05           Chipset initialization over, DMA and Interrupt controller 
               disabled.
               
  06           Video disabled and system timer test begin.
  
  07           CH-2 of 8254 initialization half way.
  
  08           CH-2 of timer initialization over.
  
  09           CH-1 of timer initialization over.
  
  0A           CH-0 of timer initialization over.
  
  0B           Refresh started.
  
  0C           System timer started.
  
  0D           Refresh link toggling passed.
  
  10           Refresh on and about to start 64K base memory test.
  
  11           Address line test passed.
  
  12           64K base memory test passed.
  
  15           Interrupt vectors initialized.
  
  17           Monochrome mode set.
  
  18           Color mode set.
  
  19           About to look for optional video ROM at segment C000 
               and give control to the optional video ROM if present.
               
  1A           Return from optional video ROM.
  
  1B           Shadow RAM enable/disable completed.
  
  1C           Display memory read/write test for main display type  
               as set in the CMOS setup program over.
               
  1D           Display memory read/write test for alternate display 
               type complete if main display memory read/write test 
               returns error.
               
  1E           Global equipment byte set for proper display type.
  
  1F           Video mode set call for mono/color begins.
  
  20           Video mode set completed.
  
  21           ROM type 27256 verified.
  
  23           Power on message displayed.
  
  30           Virtual mode memory test about to begin.
  
  31           Virtual mode memory test started.
  
  32           Processor executing in virtual mode.
  
  33 - 34      Memory address line test in progress.

  35           Memory below 1MB calculated.
  
  36           Memory above 1MB calculated.
  
  37           Memory test about to start.
  
  38           Memory below 1MB initialized.
  
  39           Memory above 1MB initialized.
  
  3A           Memory size display initiated. This will be updated when
               the BIOS goes through the memory test.
               
  3B           About to start below 1MB memory test.
  
  3C           Memory test below 1MB completed and about to start
               above 1MB test.
               
  3D           Memory test above 1MB completed.
  
  3E           About to go to real mode.
  
  3F           Shutdown successful and processor in real mode.
  
  40           CACHE memory on and about to disable A20 address line.
  
  41           A20 address line disable successful.
  
  42           486 internal cache turned on.
  
  43           About to start DMA controller test.
  
  50           DMA page register test complete.
  
  51           DMA unit-1 base register test about to start.
  
  52           DMA unit-1 base register test complete.
  
  53           DMA unit-2 base register test complete.
  
  54           About to check F/F latch for unit-1 and unit-2.
  
  55           F/F latch for both units checked.
  
  56           DMA unit 1 and 2 programming over and about to initialize 
               8259interrupt controller.
               
  57           8259 initialization over.
  
  70           About to start keyboard test.
  
  71           Keyboard controller BAT test over.
  
  72           Keyboard interface test over, mouse interface test started.
  
  73           Global data initialization for keyboard/mouse over.
  
  74           Display 'SETUP' prompt and about to start floppy setup.
  
  75           Floppy setup over.
  
  76           Hard disk setup about to start.
  
  77           Hard disk setup over.
  
  79           About to initialize timer data area.
  
  7A           Timer data initialized and about to verify CMOS battery power.
  
  7B           CMOS battery verification over.
  
  7D           About to analyze POST results.
  
  7E           CMOS memory size updated.
  
  7F           Look for <DEL> key and get into CMOS setup if found.
  
  80           About to give control to optional ROM in segment C800 to DE00.
  
  81           Optional ROM control over.
  
  82           Check for printer ports and put the addresses in global 
               data area.
               
  83           Check for RS232 ports and put the addresses in global 
               data area.
               
  84           Coprocessor detection over.
  
  85           About to display soft error messages.
  
  86           About to give control to system ROM at segment E000.
  
  00           System ROM control at E000 over now give control to 
               INT 19h boot loader.