/*******************************************************************
    Copyright (c) 2004 BSQUARE Corporation.  All rights reserved.
 ******************************************************************/

#ifndef _I2S_CODEC_H_
#define _I2S_CODEC_H_

//
// Codec Controller registers
// 
//

#define WM8731_LLI	0x0	// Left Line In
#define WM8731_RLI	0x1	// Right Line In
#define WM8731_LHO	0x2	// Left Headphone Output
#define WM8731_RHO	0x3	// Right Headphone Output
#define WM8731_AAPC	0x4	// Analog Audio Path Control
#define WM8731_DAPC	0x5	// Digital Audio Path Control
#define WM8731_PDC	0x6	// Power Down Control
#define WM8731_DAIF	0x7	// Digital Audio Interface Control
#define WM8731_SC	0x8	// Sampling Control
#define WM8731_AC	0x9	// Active Control
#define WM8731_RR	0xF	// Reset Register

//
// Define the individual bits in the indexed control registers.  The full set is not
// defined here, only the ones which are of interest in this driver
//

#define LLI_LINVOL_N(x)		((x)&0x1F)
#define LLI_LINMUTE			0x0080
#define LLI_LRINBOTH			0x0100

#define RLI_RINVOL_N(x)		((x)&0x1F)
#define RLI_RINMUTE			0x0080
#define RLI_RLINBOTH			0x0100

#define LHO_LHPVOL_N(x)		((x)&0x7F)
#define LHO_LZCEN			0x0080
#define LHO_LRHPBOTH		0x0100

#define RHO_RHPVOL_N(x)		((x)&0x7F)
#define RHO_RZCEN			0x0080
#define RHO_RLHPBOTH		0x0100

#define AAPC_MICBOOST		0x0001
#define AAPC_MUTEMIC		0x0002
#define AAPC_INSEL			0x0004
#define AAPC_BYPASS			0x0008
#define AAPC_DACSEL			0x0010
#define AAPC_SIDETONE		0x0020
#define AAPC_SIDEATT_N(x)	(((x)&0x3)<<6)
#define AAPC_SIDEATT_15		AAPC_SIDEATT_N(3)
#define AAPC_SIDEATT_12		AAPC_SIDEATT_N(1)
#define AAPC_SIDEATT_19		AAPC_SIDEATT_N(1)
#define AAPC_SIDEATT_6		AAPC_SIDEATT_N(0)

#define DAPC_ADCHPD			0x0001
#define DAPC_DEEMP_N(x)		(((x)&0x3)<<1)
#define DAPC_DEEMP_48		DAPC_DEEMP_N(3)
#define DAPC_DEEMP_44		DAPC_DEEMP_N(2)
#define DAPC_DEEMP_32		DAPC_DEEMP_N(1)
#define DAPC_DEEMP_OFF		DAPC_DEEMP_N(0)
#define DAPC_DACMU			0x0008
#define DAPC_HPOR			0x0010

#define PDC_LINEINPD		0x0001
#define PDC_MICPD			0x0002
#define PDC_ADCPD			0x0004
#define PDC_DACPD			0x0008
#define PDC_OUTPD			0x0010
#define PDC_OSCPD			0x0020
#define PDC_CLKOUTPD		0x0040
#define PDC_POWEROFF		0x0080

#define DAIF_FORMAT_N(x)	(((x)&0x3)<<0)
#define DAIF_FORMAT_DSP		DAIF_FORMAT_N(3)
#define DAIF_FORMAT_I2S		DAIF_FORMAT_N(2)
#define DAIF_FORMAT_LJUST	DAIF_FORMAT_N(1)
#define DAIF_FORMAT_RJUST	DAIF_FORMAT_N(0)
#define DAIF_IWL_N(x)		(((x)&0x3)<<2)
#define DAIF_IWL_32			DAIF_IWL_N(3)
#define DAIF_IWL_24			DAIF_IWL_N(2)
#define DAIF_IWL_20			DAIF_IWL_N(1)
#define DAIF_IWL_16			DAIF_IWL_N(0)
#define DAIF_LRP			0x0010
#define DAIF_LRSWAP			0x0020
#define DAIF_MS				0x0040
#define DAIF_BCLKINV		0x0080

#define SC_USB				0x0001
#define SC_BOSR				0x0002
#define SC_SR_N(x)			(((x)&0xF)<<2)
#define SC_CLKIDIV2			0x0040
#define SC_CLKODIV2			0x0080

#define AC_ACTIVE			0x0001

#define RR_RESET			0x0000

extern BOOLEAN CodecSetVolume(IN HANDLE hSMBus,IN ULONG Volume);
extern ULONG CodecGetVolume(IN HANDLE hSMBus);
extern BOOLEAN InitializeCodec(IN OUT PWAVE_DEVICE_INSTANCE);
extern BOOL InitializeDMARegisters(PWAVE_DEVICE_INSTANCE );
#endif _I2S_CODEC_H_