?? quartus ii -
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 148 04/26/2005 SJ Full Version " "Info: Version 5.0 Build 148 04/26/2005 SJ Full Version" { } { } 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu Aug 29 08:48:41 2013 " "Info: Processing started: Thu Aug 29 08:48:41 2013" { } { } 0} } { } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off lbstry -c lbstry " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off lbstry -c lbstry" { } { } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "lbstry.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file lbstry.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 lbstry " "Info: Found entity 1: lbstry" { } { { "lbstry.bdf" "" { Schematic "C:/Users/lbs/Desktop/quartus進行數字鐘編程/lbstry.bdf" { } } } } 0} } { } 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "lbstry " "Info: Elaborating entity \"lbstry\" for the top level hierarchy" { } { } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/quartus50/libraries/others/maxplus2/74161.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus50/libraries/others/maxplus2/74161.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 74161 " "Info: Found entity 1: 74161" { } { { "74161.tdf" "" { Text "d:/altera/quartus50/libraries/others/maxplus2/74161.tdf" 13 1 0 } } } 0} } { } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "74161 74161:inst " "Info: Elaborating entity \"74161\" for hierarchy \"74161:inst\"" { } { { "lbstry.bdf" "inst" { Schematic "C:/Users/lbs/Desktop/quartus進行數字鐘編程/lbstry.bdf" { { 72 360 480 256 "inst" "" } } } } } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 f74161 " "Info: Found entity 1: f74161" { } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { } } } } 0} } { } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "f74161 74161:inst\|f74161:sub " "Info: Elaborating entity \"f74161\" for hierarchy \"74161:inst\|f74161:sub\"" { } { { "74161.tdf" "sub" { Text "d:/altera/quartus50/libraries/others/maxplus2/74161.tdf" 33 3 0 } } } 0}
{ "Info" "IFTM_CARRY_SINGLE_TO_DOUBLE" "4 " "Info: Converted 4 single input CARRY primitives to CARRY_SUM primitives" { } { } 0}
{ "Warning" "WFTM_IGNORED_UNIMPLEMENTABLE_CARRY" "12 " "Warning: Ignored 12 CARRY_SUM primitives" { { "Warning" "WFTM_CARRY_MERGE_FANOUT_HDR" "12 " "Warning: Ignored 12 CARRY_SUM primitive(s) -- cannot place fan-out logic in single logic cell" { { "Warning" "WFTM_CARRY_MERGE_FANOUT" "74161:inst\|f74161:sub\|85~0 " "Warning: Can't place logic fed by CARRY_SUM primitive \"74161:inst\|f74161:sub\|85~0\" into a single logic cell" { { "Warning" "WFTM_NODE_NAME" "LUT 74161:inst\|f74161:sub\|94 " "Warning: Node \"74161:inst\|f74161:sub\|94\" of type LUT" { } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 664 320 384 704 "94" "" } } } } } 0} { "Warning" "WFTM_NODE_NAME" "LUT 74161:inst\|f74161:sub\|97 " "Warning: Node \"74161:inst\|f74161:sub\|97\" of type LUT" { } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 560 320 384 600 "97" "" } } } } } 0} } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 464 432 480 496 "85" "" } } } } } 0} { "Warning" "WFTM_CARRY_MERGE_FANOUT" "74161:inst\|f74161:sub\|81~0 " "Warning: Can't place logic fed by CARRY_SUM primitive \"74161:inst\|f74161:sub\|81~0\" into a single logic cell" { { "Warning" "WFTM_NODE_NAME" "LUT 74161:inst\|f74161:sub\|84 " "Warning: Node \"74161:inst\|f74161:sub\|84\" of type LUT" { } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 456 320 384 496 "84" "" } } } } } 0} { "Warning" "WFTM_NODE_NAME" "LUT 74161:inst\|f74161:sub\|90 " "Warning: Node \"74161:inst\|f74161:sub\|90\" of type LUT" { } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 352 320 384 392 "90" "" } } } } } 0} } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 256 432 480 288 "81" "" } } } } } 0} { "Warning" "WFTM_CARRY_MERGE_FANOUT" "74161:inst\|f74161:sub\|82~0 " "Warning: Can't place logic fed by CARRY_SUM primitive \"74161:inst\|f74161:sub\|82~0\" into a single logic cell" { { "Warning" "WFTM_NODE_NAME" "LUT 74161:inst\|f74161:sub\|80 " "Warning: Node \"74161:inst\|f74161:sub\|80\" of type LUT" { } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 248 320 384 288 "80" "" } } } } } 0} { "Warning" "WFTM_NODE_NAME" "LUT 74161:inst\|f74161:sub\|78 " "Warning: Node \"74161:inst\|f74161:sub\|78\" of type LUT" { } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 144 320 384 184 "78" "" } } } } } 0} } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 40 432 480 72 "82" "" } } } } } 0} { "Warning" "WFTM_CARRY_MERGE_FANOUT" "74161:inst1\|f74161:sub\|85~0 " "Warning: Can't place logic fed by CARRY_SUM primitive \"74161:inst1\|f74161:sub\|85~0\" into a single logic cell" { { "Warning" "WFTM_NODE_NAME" "LUT 74161:inst1\|f74161:sub\|94 " "Warning: Node \"74161:inst1\|f74161:sub\|94\" of type LUT" { } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 664 320 384 704 "94" "" } } } } } 0} { "Warning" "WFTM_NODE_NAME" "LUT 74161:inst1\|f74161:sub\|97~3 " "Warning: Node \"74161:inst1\|f74161:sub\|97~3\" of type LUT" { } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 560 320 384 600 "97" "" } } } } } 0} } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 464 432 480 496 "85" "" } } } } } 0} { "Warning" "WFTM_CARRY_MERGE_FANOUT" "74161:inst1\|f74161:sub\|81~0 " "Warning: Can't place logic fed by CARRY_SUM primitive \"74161:inst1\|f74161:sub\|81~0\" into a single logic cell" { { "Warning" "WFTM_NODE_NAME" "LUT 74161:inst1\|f74161:sub\|84 " "Warning: Node \"74161:inst1\|f74161:sub\|84\" of type LUT" { } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 456 320 384 496 "84" "" } } } } } 0} { "Warning" "WFTM_NODE_NAME" "LUT 74161:inst1\|f74161:sub\|90~3 " "Warning: Node \"74161:inst1\|f74161:sub\|90~3\" of type LUT" { } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 352 320 384 392 "90" "" } } } } } 0} } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 256 432 480 288 "81" "" } } } } } 0} { "Warning" "WFTM_CARRY_MERGE_FANOUT" "74161:inst1\|f74161:sub\|82~0 " "Warning: Can't place logic fed by CARRY_SUM primitive \"74161:inst1\|f74161:sub\|82~0\" into a single logic cell" { { "Warning" "WFTM_NODE_NAME" "LUT 74161:inst1\|f74161:sub\|80 " "Warning: Node \"74161:inst1\|f74161:sub\|80\" of type LUT" { } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 248 320 384 288 "80" "" } } } } } 0} { "Warning" "WFTM_NODE_NAME" "LUT 74161:inst1\|f74161:sub\|78~3 " "Warning: Node \"74161:inst1\|f74161:sub\|78~3\" of type LUT" { } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 144 320 384 184 "78" "" } } } } } 0} } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 40 432 480 72 "82" "" } } } } } 0} { "Warning" "WFTM_CARRY_MERGE_FANOUT" "74161:inst2\|f74161:sub\|85~0 " "Warning: Can't place logic fed by CARRY_SUM primitive \"74161:inst2\|f74161:sub\|85~0\" into a single logic cell" { { "Warning" "WFTM_NODE_NAME" "LUT 74161:inst2\|f74161:sub\|94 " "Warning: Node \"74161:inst2\|f74161:sub\|94\" of type LUT" { } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 664 320 384 704 "94" "" } } } } } 0} { "Warning" "WFTM_NODE_NAME" "LUT 74161:inst2\|f74161:sub\|97~3 " "Warning: Node \"74161:inst2\|f74161:sub\|97~3\" of type LUT" { } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 560 320 384 600 "97" "" } } } } } 0} } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 464 432 480 496 "85" "" } } } } } 0} { "Warning" "WFTM_CARRY_MERGE_FANOUT" "74161:inst2\|f74161:sub\|81~0 " "Warning: Can't place logic fed by CARRY_SUM primitive \"74161:inst2\|f74161:sub\|81~0\" into a single logic cell" { { "Warning" "WFTM_NODE_NAME" "LUT 74161:inst2\|f74161:sub\|84 " "Warning: Node \"74161:inst2\|f74161:sub\|84\" of type LUT" { } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 456 320 384 496 "84" "" } } } } } 0} { "Warning" "WFTM_NODE_NAME" "LUT 74161:inst2\|f74161:sub\|90~3 " "Warning: Node \"74161:inst2\|f74161:sub\|90~3\" of type LUT" { } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 352 320 384 392 "90" "" } } } } } 0} } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 256 432 480 288 "81" "" } } } } } 0} { "Warning" "WFTM_CARRY_MERGE_FANOUT" "74161:inst2\|f74161:sub\|82~0 " "Warning: Can't place logic fed by CARRY_SUM primitive \"74161:inst2\|f74161:sub\|82~0\" into a single logic cell" { { "Warning" "WFTM_NODE_NAME" "LUT 74161:inst2\|f74161:sub\|80 " "Warning: Node \"74161:inst2\|f74161:sub\|80\" of type LUT" { } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 248 320 384 288 "80" "" } } } } } 0} { "Warning" "WFTM_NODE_NAME" "LUT 74161:inst2\|f74161:sub\|78~3 " "Warning: Node \"74161:inst2\|f74161:sub\|78~3\" of type LUT" { } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 144 320 384 184 "78" "" } } } } } 0} } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 40 432 480 72 "82" "" } } } } } 0} { "Warning" "WFTM_CARRY_MERGE_FANOUT" "74161:inst3\|f74161:sub\|85~0 " "Warning: Can't place logic fed by CARRY_SUM primitive \"74161:inst3\|f74161:sub\|85~0\" into a single logic cell" { { "Warning" "WFTM_NODE_NAME" "LUT 74161:inst3\|f74161:sub\|94 " "Warning: Node \"74161:inst3\|f74161:sub\|94\" of type LUT" { } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 664 320 384 704 "94" "" } } } } } 0} { "Warning" "WFTM_NODE_NAME" "LUT 74161:inst3\|f74161:sub\|97~3 " "Warning: Node \"74161:inst3\|f74161:sub\|97~3\" of type LUT" { } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 560 320 384 600 "97" "" } } } } } 0} } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 464 432 480 496 "85" "" } } } } } 0} { "Warning" "WFTM_CARRY_MERGE_FANOUT" "74161:inst3\|f74161:sub\|81~0 " "Warning: Can't place logic fed by CARRY_SUM primitive \"74161:inst3\|f74161:sub\|81~0\" into a single logic cell" { { "Warning" "WFTM_NODE_NAME" "LUT 74161:inst3\|f74161:sub\|84 " "Warning: Node \"74161:inst3\|f74161:sub\|84\" of type LUT" { } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 456 320 384 496 "84" "" } } } } } 0} { "Warning" "WFTM_NODE_NAME" "LUT 74161:inst3\|f74161:sub\|90~3 " "Warning: Node \"74161:inst3\|f74161:sub\|90~3\" of type LUT" { } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 352 320 384 392 "90" "" } } } } } 0} } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 256 432 480 288 "81" "" } } } } } 0} { "Warning" "WFTM_CARRY_MERGE_FANOUT" "74161:inst3\|f74161:sub\|82~0 " "Warning: Can't place logic fed by CARRY_SUM primitive \"74161:inst3\|f74161:sub\|82~0\" into a single logic cell" { { "Warning" "WFTM_NODE_NAME" "LUT 74161:inst3\|f74161:sub\|80 " "Warning: Node \"74161:inst3\|f74161:sub\|80\" of type LUT" { } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 248 320 384 288 "80" "" } } } } } 0} { "Warning" "WFTM_NODE_NAME" "LUT 74161:inst3\|f74161:sub\|78~3 " "Warning: Node \"74161:inst3\|f74161:sub\|78~3\" of type LUT" { } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 144 320 384 184 "78" "" } } } } } 0} } { { "f74161.bdf" "" { Schematic "d:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { 40 432 480 72 "82" "" } } } } } 0} } { } 0} } { } 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "64 " "Info: Implemented 64 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "2 " "Info: Implemented 2 input pins" { } { } 0} { "Info" "ISCL_SCL_TM_OPINS" "16 " "Info: Implemented 16 output pins" { } { } 0} { "Info" "ISCL_SCL_TM_LCELLS" "46 " "Info: Implemented 46 logic cells" { } { } 0} } { } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 38 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 38 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Thu Aug 29 08:48:42 2013 " "Info: Processing ended: Thu Aug 29 08:48:42 2013" { } { } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" { } { } 0} } { } 0}
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