<?xml version="1.0" encoding="UTF-8"?>
<spirit:design xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.4" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:xilinx="http://www.xilinx.com" >
   <spirit:vendor>xilinx.com</spirit:vendor>
   <spirit:library>project</spirit:library>
   <spirit:name>coregen</spirit:name>
   <spirit:version>1.0</spirit:version>
   <spirit:componentInstances>
      <spirit:componentInstance>
         <spirit:instanceName>mul_sweep</spirit:instanceName>
         <spirit:displayName></spirit:displayName>
         <spirit:description></spirit:description>
         <spirit:componentRef spirit:vendor="xilinx.com" spirit:library="ip" spirit:name="mult_gen" spirit:version="11.2" />
         <spirit:configurableElementValues>
            <spirit:configurableElementValue spirit:referenceId="parameter_portbtype">Signed</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="parameter_clockenable">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="parameter_multtype">Parallel_Multiplier</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="parameter_ccmimp">Distributed_Memory</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="parameter_constvalue">129</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="parameter_roundpoint">0</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="parameter_outputwidthhigh">47</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="parameter_use_custom_output_width">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="parameter_pipestages">3</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="parameter_userounding">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="parameter_zerodetect">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="parameter_optgoal">Speed</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="parameter_portawidth">24</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="parameter_multiplier_construction">Use_LUTs</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="parameter_outputwidthlow">0</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="parameter_sclrcepriority">SCLR_Overrides_CE</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="parameter_portatype">Unsigned</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="parameter_portbwidth">24</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="parameter_syncclear">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="parameter_internaluser">0</spirit:configurableElementValue>
         </spirit:configurableElementValues>
         <spirit:vendorExtensions>
            <xilinx:instanceProperties>
             <xilinx:projectOptions>
               <xilinx:projectName>coregen</xilinx:projectName>
               <xilinx:outputDirectory>./</xilinx:outputDirectory>
               <xilinx:workingDirectory>./tmp/</xilinx:workingDirectory>
               <xilinx:subWorkingDirectory>./tmp/_cg</xilinx:subWorkingDirectory>
             </xilinx:projectOptions>
             <xilinx:part>
               <xilinx:device>xc5vsx95t</xilinx:device>
               <xilinx:deviceFamily>virtex5</xilinx:deviceFamily>
               <xilinx:package>ff1136</xilinx:package>
               <xilinx:speedGrade>-1</xilinx:speedGrade>
             </xilinx:part>
             <xilinx:flowOptions>
               <xilinx:busFormat>BusFormatAngleBracketNotRipped</xilinx:busFormat>
               <xilinx:designEntry>VHDL</xilinx:designEntry>
               <xilinx:asySymbol>true</xilinx:asySymbol>
               <xilinx:flowVendor>Foundation_ISE</xilinx:flowVendor>
               <xilinx:addPads>false</xilinx:addPads>
               <xilinx:removeRPMs>false</xilinx:removeRPMs>
               <xilinx:createNDF>false</xilinx:createNDF>
               <xilinx:implementationFileType>Ngc</xilinx:implementationFileType>
               <xilinx:formalVerification>false</xilinx:formalVerification>
             </xilinx:flowOptions>
             <xilinx:simulationOptions>
               <xilinx:simulationModel>Behavioral</xilinx:simulationModel>
               <xilinx:simulationLanguage>VHDL_and_Verilog</xilinx:simulationLanguage>
               <xilinx:foundationSym>false</xilinx:foundationSym>
             </xilinx:simulationOptions>
           </xilinx:instanceProperties>
         </spirit:vendorExtensions>
      </spirit:componentInstance>
   </spirit:componentInstances>
   <spirit:description></spirit:description>
   <spirit:vendorExtensions>
      <xilinx:instanceProperties>
       <xilinx:projectOptions>
         <xilinx:projectName>coregen</xilinx:projectName>
         <xilinx:outputDirectory>./</xilinx:outputDirectory>
         <xilinx:workingDirectory>./tmp/</xilinx:workingDirectory>
         <xilinx:subWorkingDirectory>./tmp/_cg</xilinx:subWorkingDirectory>
       </xilinx:projectOptions>
       <xilinx:part>
         <xilinx:device>xc5vlx20t</xilinx:device>
         <xilinx:deviceFamily>virtex5</xilinx:deviceFamily>
         <xilinx:package>ff323</xilinx:package>
         <xilinx:speedGrade>-2</xilinx:speedGrade>
       </xilinx:part>
       <xilinx:flowOptions>
         <xilinx:busFormat>BusFormatAngleBracketNotRipped</xilinx:busFormat>
         <xilinx:designEntry>VHDL</xilinx:designEntry>
         <xilinx:asySymbol>true</xilinx:asySymbol>
         <xilinx:flowVendor>Other</xilinx:flowVendor>
         <xilinx:addPads>false</xilinx:addPads>
         <xilinx:removeRPMs>false</xilinx:removeRPMs>
         <xilinx:createNDF>false</xilinx:createNDF>
         <xilinx:implementationFileType>Ngc</xilinx:implementationFileType>
         <xilinx:formalVerification>false</xilinx:formalVerification>
       </xilinx:flowOptions>
       <xilinx:simulationOptions>
         <xilinx:simulationModel>Behavioral</xilinx:simulationModel>
         <xilinx:simulationLanguage>VHDL</xilinx:simulationLanguage>
         <xilinx:foundationSym>false</xilinx:foundationSym>
       </xilinx:simulationOptions>
     </xilinx:instanceProperties>
   </spirit:vendorExtensions>
</spirit:design>