MEMORY
{
	PAGE 0:
 		ROM  : origin=0080h,  length=1000h 
  	PAGE 1:
   		RAM  : origin=1200h,    length=1000h   /* Data Memory    */
   		RAM2 : origin=2500h,    length=1000h   /* Program Memory */
      	VECS : origin=0ff80h ,  length=0080h  /* Reset Vector   */
}
 
/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */

SECTIONS
{
    .text    :> ROM     PAGE 0             /* CODE */ 
    						               /* Interrupt vector table */
   .switch   :> RAM     PAGE 1             /* SWITCH TABLE INFO */
   .const    :> RAM     PAGE 1             /* CONSTANT DATA */
   .cinit    :> RAM2    PAGE 1             /* INITIALIZATION TABLES */
   .data     :> RAM     PAGE 1             /* INITIALIZED DATA */
   .bss      :> RAM     PAGE 1             /* GLOBAL & STATIC VARS */
   .stack    :> RAM     PAGE 1             /* PRIMARY SYSTEM STACK */
}