/* For the given symbolerate, determine the VCA and VGA programming bits */	for (i = 0; i < sizeof(cx24123_AGC_vals) / sizeof(cx24123_AGC_vals[0]); i++)	{		if ((cx24123_AGC_vals[i].symbolrate_low <= p->u.qpsk.symbol_rate) &&				(cx24123_AGC_vals[i].symbolrate_high >= p->u.qpsk.symbol_rate) ) {			state->VCAarg = cx24123_AGC_vals[i].VCAprogdata;			state->VGAarg = cx24123_AGC_vals[i].VGAprogdata;		}	}	/* For the given frequency, determine the bandselect programming bits */	for (i = 0; i < sizeof(cx24123_bandselect_vals) / sizeof(cx24123_bandselect_vals[0]); i++)	{		if ((cx24123_bandselect_vals[i].freq_low <= p->frequency) &&				(cx24123_bandselect_vals[i].freq_high >= p->frequency) ) {			state->bandselectarg = cx24123_bandselect_vals[i].progdata;			vco_div = cx24123_bandselect_vals[i].VCOdivider;		}	}	/* Determine the N/A dividers for the requested lband freq (in kHz). */	/* Note: 10111 (kHz) is the Crystal Freq and divider of 10. */	ndiv = ( ((p->frequency * vco_div) / (10111 / 10) / 2) / 32) & 0x1ff;	adiv = ( ((p->frequency * vco_div) / (10111 / 10) / 2) % 32) & 0x1f;	if (adiv == 0)		adiv++;	/* determine the correct pll frequency values. */	/* Command 11, refdiv 11, cpump polarity 1, cpump current 3mA 10. */	state->pllarg = (3 << 19) | (3 << 17) | (1 << 16) | (2 << 14);	state->pllarg |= (ndiv << 5) | adiv;	return 0;}/* * Tuner data is 21 bits long, must be left-aligned in data. * Tuner cx24109 is written through a dedicated 3wire interface on the demod chip. */static int cx24123_pll_writereg(struct dvb_frontend* fe, struct dvb_frontend_parameters *p, u32 data){	struct cx24123_state *state = fe->demodulator_priv;	unsigned long timeout;	/* align the 21 bytes into to bit23 boundary */	data = data << 3;	/* Reset the demod pll word length to 0x15 bits */	cx24123_writereg(state, 0x21, 0x15);	/* write the msb 8 bits, wait for the send to be completed */	timeout = jiffies + msecs_to_jiffies(40);	cx24123_writereg(state, 0x22, (data >> 16) & 0xff);	while ((cx24123_readreg(state, 0x20) & 0x40) == 0) {		if (time_after(jiffies, timeout)) {			printk("%s:  demodulator is not responding, possibly hung, aborting.\n", __FUNCTION__);			return -EREMOTEIO;		}		msleep(10);	}	/* send another 8 bytes, wait for the send to be completed */	timeout = jiffies + msecs_to_jiffies(40);	cx24123_writereg(state, 0x22, (data>>8) & 0xff );	while ((cx24123_readreg(state, 0x20) & 0x40) == 0) {		if (time_after(jiffies, timeout)) {			printk("%s:  demodulator is not responding, possibly hung, aborting.\n", __FUNCTION__);			return -EREMOTEIO;		}		msleep(10);	}	/* send the lower 5 bits of this byte, padded with 3 LBB, wait for the send to be completed */	timeout = jiffies + msecs_to_jiffies(40);	cx24123_writereg(state, 0x22, (data) & 0xff );	while ((cx24123_readreg(state, 0x20) & 0x80)) {		if (time_after(jiffies, timeout)) {			printk("%s:  demodulator is not responding, possibly hung, aborting.\n", __FUNCTION__);			return -EREMOTEIO;		}		msleep(10);	}	/* Trigger the demod to configure the tuner */	cx24123_writereg(state, 0x20, cx24123_readreg(state, 0x20) | 2);	cx24123_writereg(state, 0x20, cx24123_readreg(state, 0x20) & 0xfd);	return 0;}static int cx24123_pll_tune(struct dvb_frontend* fe, struct dvb_frontend_parameters *p){	struct cx24123_state *state = fe->demodulator_priv;	if (cx24123_pll_calculate(fe, p) != 0) {		printk("%s: cx24123_pll_calcutate failed\n",__FUNCTION__);		return -EINVAL;	}	/* Write the new VCO/VGA */	cx24123_pll_writereg(fe, p, state->VCAarg);	cx24123_pll_writereg(fe, p, state->VGAarg);	/* Write the new bandselect and pll args */	cx24123_pll_writereg(fe, p, state->bandselectarg);	cx24123_pll_writereg(fe, p, state->pllarg);	return 0;}static int cx24123_initfe(struct dvb_frontend* fe){	struct cx24123_state *state = fe->demodulator_priv;	int i;	/* Configure the demod to a good set of defaults */	for (i = 0; i < sizeof(cx24123_regdata) / sizeof(cx24123_regdata[0]); i++)		cx24123_writereg(state, cx24123_regdata[i].reg, cx24123_regdata[i].data);	if (state->config->pll_init)		state->config->pll_init(fe);	/* Configure the LNB for 14V */	if (state->config->use_isl6421)		cx24123_writelnbreg(state, 0x0, 0x2a);	return 0;}static int cx24123_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage){	struct cx24123_state *state = fe->demodulator_priv;	u8 val;	switch (state->config->use_isl6421) {	case 1:		val = cx24123_readlnbreg(state, 0x0);		switch (voltage) {		case SEC_VOLTAGE_13:			return cx24123_writelnbreg(state, 0x0, val & 0x32); /* V 13v */		case SEC_VOLTAGE_18:			return cx24123_writelnbreg(state, 0x0, val | 0x04); /* H 18v */		case SEC_VOLTAGE_OFF:			return cx24123_writelnbreg(state, 0x0, val & 0x30);		default:			return -EINVAL;		};	case 0:		val = cx24123_readreg(state, 0x29);		switch (voltage) {		case SEC_VOLTAGE_13:			dprintk("%s: setting voltage 13V\n", __FUNCTION__);			if (state->config->enable_lnb_voltage)				state->config->enable_lnb_voltage(fe, 1);			return cx24123_writereg(state, 0x29, val | 0x80);		case SEC_VOLTAGE_18:			dprintk("%s: setting voltage 18V\n", __FUNCTION__);			if (state->config->enable_lnb_voltage)				state->config->enable_lnb_voltage(fe, 1);			return cx24123_writereg(state, 0x29, val & 0x7f);		case SEC_VOLTAGE_OFF:			dprintk("%s: setting voltage off\n", __FUNCTION__);			if (state->config->enable_lnb_voltage)				state->config->enable_lnb_voltage(fe, 0);			return 0;		default:			return -EINVAL;		};	}	return 0;}static int cx24123_send_diseqc_msg(struct dvb_frontend* fe,				   struct dvb_diseqc_master_cmd *cmd){	/* fixme: Implement diseqc */	printk("%s: No support yet\n",__FUNCTION__);	return -ENOTSUPP;}static int cx24123_read_status(struct dvb_frontend* fe, fe_status_t* status){	struct cx24123_state *state = fe->demodulator_priv;	int sync = cx24123_readreg(state, 0x14);	int lock = cx24123_readreg(state, 0x20);	*status = 0;	if (lock & 0x01)		*status |= FE_HAS_CARRIER | FE_HAS_SIGNAL;	if (sync & 0x04)		*status |= FE_HAS_VITERBI;	if (sync & 0x08)		*status |= FE_HAS_CARRIER;	if (sync & 0x80)		*status |= FE_HAS_SYNC | FE_HAS_LOCK;	return 0;}/* * Configured to return the measurement of errors in blocks, because no UCBLOCKS value * is available, so this value doubles up to satisfy both measurements */static int cx24123_read_ber(struct dvb_frontend* fe, u32* ber){	struct cx24123_state *state = fe->demodulator_priv;	state->lastber =		((cx24123_readreg(state, 0x1c) & 0x3f) << 16) |		(cx24123_readreg(state, 0x1d) << 8 |		cx24123_readreg(state, 0x1e));	/* Do the signal quality processing here, it's derived from the BER. */	/* Scale the BER from a 24bit to a SNR 16 bit where higher = better */	if (state->lastber < 5000)		state->snr = 655*100;	else if ( (state->lastber >=   5000) && (state->lastber <  55000) )		state->snr = 655*90;	else if ( (state->lastber >=  55000) && (state->lastber < 150000) )		state->snr = 655*80;	else if ( (state->lastber >= 150000) && (state->lastber < 250000) )		state->snr = 655*70;	else if ( (state->lastber >= 250000) && (state->lastber < 450000) )		state->snr = 655*65;	else		state->snr = 0;	*ber = state->lastber;	return 0;}static int cx24123_read_signal_strength(struct dvb_frontend* fe, u16* signal_strength){	struct cx24123_state *state = fe->demodulator_priv;	*signal_strength = cx24123_readreg(state, 0x3b) << 8; /* larger = better */	return 0;}static int cx24123_read_snr(struct dvb_frontend* fe, u16* snr){	struct cx24123_state *state = fe->demodulator_priv;	*snr = state->snr;	return 0;}static int cx24123_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks){	struct cx24123_state *state = fe->demodulator_priv;	*ucblocks = state->lastber;	return 0;}static int cx24123_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p){	struct cx24123_state *state = fe->demodulator_priv;	if (state->config->set_ts_params)		state->config->set_ts_params(fe, 0);	state->currentfreq=p->frequency;	state->currentsymbolrate = p->u.qpsk.symbol_rate;	cx24123_set_inversion(state, p->inversion);	cx24123_set_fec(state, p->u.qpsk.fec_inner);	cx24123_set_symbolrate(state, p->u.qpsk.symbol_rate);	cx24123_pll_tune(fe, p);	/* Enable automatic aquisition and reset cycle */	cx24123_writereg(state, 0x03, (cx24123_readreg(state, 0x03) | 0x07));	cx24123_writereg(state, 0x00, 0x10);	cx24123_writereg(state, 0x00, 0);	return 0;}static int cx24123_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p){	struct cx24123_state *state = fe->demodulator_priv;	if (cx24123_get_inversion(state, &p->inversion) != 0) {		printk("%s: Failed to get inversion status\n",__FUNCTION__);		return -EREMOTEIO;	}	if (cx24123_get_fec(state, &p->u.qpsk.fec_inner) != 0) {		printk("%s: Failed to get fec status\n",__FUNCTION__);		return -EREMOTEIO;	}	p->frequency = state->currentfreq;	p->u.qpsk.symbol_rate = state->currentsymbolrate;	return 0;}static int cx24123_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone){	struct cx24123_state *state = fe->demodulator_priv;	u8 val;	switch (state->config->use_isl6421) {	case 1:		val = cx24123_readlnbreg(state, 0x0);		switch (tone) {		case SEC_TONE_ON:			return cx24123_writelnbreg(state, 0x0, val | 0x10);		case SEC_TONE_OFF:			return cx24123_writelnbreg(state, 0x0, val & 0x2f);		default:			printk("%s: CASE reached default with tone=%d\n", __FUNCTION__, tone);			return -EINVAL;		}	case 0:		val = cx24123_readreg(state, 0x29);		switch (tone) {		case SEC_TONE_ON:			dprintk("%s: setting tone on\n", __FUNCTION__);			return cx24123_writereg(state, 0x29, val | 0x10);		case SEC_TONE_OFF:			dprintk("%s: setting tone off\n",__FUNCTION__);			return cx24123_writereg(state, 0x29, val & 0xef);		default:			printk("%s: CASE reached default with tone=%d\n", __FUNCTION__, tone);			return -EINVAL;		}	}	return 0;}static void cx24123_release(struct dvb_frontend* fe){	struct cx24123_state* state = fe->demodulator_priv;	dprintk("%s\n",__FUNCTION__);	kfree(state);}static struct dvb_frontend_ops cx24123_ops;struct dvb_frontend* cx24123_attach(const struct cx24123_config* config,				    struct i2c_adapter* i2c){	struct cx24123_state* state = NULL;	int ret;	dprintk("%s\n",__FUNCTION__);	/* allocate memory for the internal state */	state = kmalloc(sizeof(struct cx24123_state), GFP_KERNEL);	if (state == NULL) {		printk("Unable to kmalloc\n");		goto error;	}	/* setup the state */	state->config = config;	state->i2c = i2c;	memcpy(&state->ops, &cx24123_ops, sizeof(struct dvb_frontend_ops));	state->lastber = 0;	state->snr = 0;	state->lnbreg = 0;	state->VCAarg = 0;	state->VGAarg = 0;	state->bandselectarg = 0;	state->pllarg = 0;	state->currentfreq = 0;	state->currentsymbolrate = 0;	/* check if the demod is there */	ret = cx24123_readreg(state, 0x00);	if ((ret != 0xd1) && (ret != 0xe1)) {		printk("Version != d1 or e1\n");		goto error;	}	/* create dvb_frontend */	state->frontend.ops = &state->ops;	state->frontend.demodulator_priv = state;	return &state->frontend;error:	kfree(state);	return NULL;}static struct dvb_frontend_ops cx24123_ops = {	.info = {		.name = "Conexant CX24123/CX24109",		.type = FE_QPSK,		.frequency_min = 950000,		.frequency_max = 2150000,		.frequency_stepsize = 1011, /* kHz for QPSK frontends */		.frequency_tolerance = 29500,		.symbol_rate_min = 1000000,		.symbol_rate_max = 45000000,		.caps = FE_CAN_INVERSION_AUTO |			FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |			FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |			FE_CAN_QPSK | FE_CAN_RECOVER	},	.release = cx24123_release,	.init = cx24123_initfe,	.set_frontend = cx24123_set_frontend,	.get_frontend = cx24123_get_frontend,	.read_status = cx24123_read_status,	.read_ber = cx24123_read_ber,	.read_signal_strength = cx24123_read_signal_strength,	.read_snr = cx24123_read_snr,	.read_ucblocks = cx24123_read_ucblocks,	.diseqc_send_master_cmd = cx24123_send_diseqc_msg,	.set_tone = cx24123_set_tone,	.set_voltage = cx24123_set_voltage,};module_param(debug, int, 0644);MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");MODULE_DESCRIPTION("DVB Frontend module for Conexant cx24123/cx24109 hardware");MODULE_AUTHOR("Steven Toth");MODULE_LICENSE("GPL");EXPORT_SYMBOL(cx24123_attach);