LIST	P=69P822
ROMSIZE=2*1024

/////////////////////////////////////////
//	system register 
inten		equ	00h
intrq		equ	01h
tc0m		equ	02h
tc1m		equ	03h
t0l		equ	04h
t0h		equ	05h
t1l		equ	06h
t1h		equ	07h
pa		equ	08h
pb		equ	09h
iep		equ	0ah
irqp		equ	0bh
//reserve	equ	0ch
//reserve	equ	0dh
tbr		equ	0eh
inx		equ	0fh
dpl		equ	10h
dpm		equ	11h
dph		equ	12h
//resevre	equ	13h
pacfg		equ	14h
p5cfg		equ	15h
p67cfg		equ	16h
//resevre	equ	17h
pam		equ	18h
pbm		equ	19h
adctim		equ	1ah
adcno		equ	1bh	//adc channel number
adcdl		equ	1ch
adcdh		equ	1dh
wdtc		equ	1eh
//resevre	equ	1fh

INTEN		EQU	00H
INTRQ		EQU	01H
TC0M		EQU	02H
TC1M		EQU	03H
T0L		EQU	04H
T0H		EQU	05H
T1L		EQU	06H
T1H		EQU	07H
PA		EQU	08H
PB		EQU	09H
IEP		EQU	0AH
IRQP		EQU	0BH
//RESERVE	EQU	0CH
//RESERVE	EQU	0DH
TBR		EQU	0EH
INX		EQU	0FH
DPL		EQU	10H
DPM		EQU	11H
DPH		EQU	12H
//RESEVRE	EQU	13H
PACFG		EQU	14H
P5CFG		EQU	15H
P67CFG		EQU	16H
//RESEVRE	EQU	17H
PAM		EQU	18H
PBM		EQU	19H
ADCTIM		EQU	1AH
ADCNO		EQU	1BH
ADCDL		EQU	1CH
ADCDH		EQU	1DH
WDTC		EQU	1EH
//RESEVRE	EQU	1FH

/////////////////////////////////////////
//	variable	definition
//////////////////////////////
temp		equ	28h		;the temp
aBuf		equ	29h		;save the acc 
t1ms		equ	2ah		;1ms counter
t10ms		equ	2bh		;10ms counter
t100ms		equ	2ch		;100ms counter
t1s		equ	2dh		;1 second counter
t10s		equ	2eh		;10 second counter
t1m		equ	2fh		;1 minuter counter
t10m		equ	30h		;10 minuter counter
t1H		equ	31h		;1 hour counter
t10h		equ	32h		;10 hour counter
fTimer		equ	33h		;the flag of the timer
	//ft05ms		equ	33h.0
	//ft20ms	equ	33h.1
	//ft100ms	equ	33h.2
	//ft1S		equ	33h.3
fDirect		equ	34h		//the direction of car move
	//fDirGo	equ	34h.0	;car go ahead
	//fDirBak	equ	34h.1	;car go back
	//fDirLft	equ	34h.2	;car left
	//fDirRgt	equ	34h.3	;car right
fSys		equ	35h
	//fSndEna	equ	35h.0
	//fAdcTurn	equ	35h.1
sndDlrH		equ	36h		//send left or right data 
sndDlrL		equ	37h	
sndDgbH		equ	38h		//send go or back right data
sndDgbL		equ	39h
lorH		equ	3ah		//adc data left or right
lorM		equ	3bh
lorL		equ	3ch
gobH		equ	3dh		//adc data go or back 
gobM		equ	3eh
gobL		equ	3fh
cntAdc		equ	40h		//counter of adc
cntTemp		equ	41h
temp1		equ	42h
temp2		equ	43h
temp3		equ	44h
sndTim		equ	45h
sndTem1		equ	46h
sndTem2		equ	47h
sndTem3		equ	48h
sndTem4		equ	49h
sndVrf		equ	4ah

////////////////////////////////////////////////
//	macro set
///////////////////////////////
/////////////////////////////////////////////
//	flag operation set 
fT1msSet	macro
	orim	fTimer,		0001b
	endm
fT1msClr	macro
	andim	fTimer,		1110b
	endm
fT10msSet	macro
	orim	fTimer,		0010b
	endm
fT10msClr	macro
	andim	fTimer,		1101b
	endm
fT100msSet	macro
	orim	fTimer,		0100b
	endm
fT100msClr	macro
	andim	fTimer,		1011b
	endm
fT1sSet		macro
	orim	fTimer,		1000b
	endm
fT1sClr		macro
	andim	fTimer,		0111b
	endm
////
fDirGoSet		macro
	orim	fDirect,	0001b
	andim	fDirect,	1101b
	endm
fDirGoClr		macro
	andim	fDirect,	1110b
	endm
fDirBakSet	macro
	ldi	fDirect,	0010b
	andim	fDirect,	1110b
	endm
fDirBakClr		macro
	andim	fDirect,	1101b
	endm
fDirLftSet		macro
	orim	fDirect,	0100b
	andim	fDirect,	0111b
	endm
fDirLftClr		macro
	andim	fDirect,	1011b
	endm
fDirRgtSet		macro
	orim	fDirect,	1000b
	andim	fDirect,	1011b
	endm
fDirRgtClr	macro
	andim	fDirect,	0111b
	endm
////
fSndEnaSet	macro
	orim	fSys,		0001b
	endm
fSndEnaClr	macro
	andim	fSys,		1110b
	endm
////////////////////////////////////////////////
//	system register define macro set
INTSET		macro
	ldi	inten,		0000b
	ldi	intrq,		0000b
	ldi	irqp,		0000b
	ldi	iep,		0000b
	endm
	
PORTSET		macro
	ldi	pacfg,		0000b
	ldi	p5cfg,		0000b
	ldi	p67cfg,		1110b
	ldi	pam,		1100b
	ldi	pa,		1000b
	ldi	pbm,		0000b
	ldi	pb,		0000b	
	endm
	
ADCSET		macro
	ldi	adcno,		1000b
	ldi	adctim,		0110b
	endm
	
TIME0SET	macro
	ldi	tc0m,		0101b
	ldi	t0l,		06h
	ldi	t0h,		00h
	endm
	
TIME1SET	macro
	ldi	tc1m,		0000b
	endm
	
WdtRstSet	macro
	ldi	wdtc,		0010b
	endm	
////////////////////////////////////////////////
//	system operation macro
chnLorSet	macro
	ldi	adcno,		1000b
	ldi	adctim,		1110b
	endm
chnGobSet	macro	
	ldi	adcno,		1001b
	ldi	adctim,		1110b
	endm	
rfEnaSet	macro
	andim	pa,		0111b
	endm
rfEnaClr	macro
	orim	pa,		1000b
	endm
	
sndHigOut		macro
	orim	pa,		0100b
	endm
sndLowOut		macro	
	andim	pa,		1011b
	endm
	
////////////////////////////////////////////
//	mcu define
/////////////////////////////////////
//	pa0	equ	left or right
//	pa1	equ	go or back
//	pa2	equ	send data
//	pa3	equ	send enable	 0:on 1:off

/////////////////////////////////
//	code 	area
	org 	0000h
	jmp	reset
	nop
	jmp	intT0
	nop
	nop
	
intT0:
	sta	aBuf,	0
	sbim	t1ms,	1
	bc	intT0End
	ldi	t1ms,	9
	fT10msSet
	sbim	t10ms,	1
	bc	intT0End
	ldi	t10ms,	9
	fT100msSet
	sbim	t100ms,	1
	bc	intT0End
	ldi	t100ms,	9
	fT1sSet
	adim	t1s,	1
intT0End:
	ldi	intrq,	0
	ldi	inten,	0100b
	lda	aBuf
	rtni
	
//////////////////////////////////////
//	reset process
///////////////////////////////////
reset:
	ldi	inten,		0000b
	call	ClrRam
	call	SysInit
	call	SysTest
	ldi	inten,		0100b
main:
	lda	fTimer,		0	//check per 10ms 
	ba2	$+2			//for debug,ba2	$+2
	jmp	$-2
	fT100msClr
	WdtRstSet
	call	AdcChg
	call	AdcPro
	call	DataPro
	call	RfPro
	jmp	main	
///////////////////////////////////
//	clear the ram 
/////////////////////////
ClrRam:
	ldi	dpl,	0fh
	ldi	dpm,	07h
	ldi	dph,	00h
clrRam1:
	sbi	dpl,	08h
	ldi	temp,	02h
	sbc	dpm
	ldi	temp,	00h
	sbc	dph
	bnc	clrRamEnd
	ldi	inx,	00
	sbim	dpl,	01h
	bc	clrRam1
	sbim	dpm,	01h
	bc	clrRam1
	sbim	dph,	01h
	bc	clrRam1
clrRamEnd:
	rtni

///////////////////////////////////
//	system initial
////////////////////////
SysInit:
portInit:
	PORTSET
adcInit:
	ADCSET
timeInit:
	TIME0SET	
	TIME1SET
intInit:
	INTSET
sysRun:
	ldi	inten,		0100b
	orim	tc0m,		1000b
	ldi	fSys,		0010b
	ldi	cntAdc,		0000b
sysInitEnd:
	rtni
///////////////////////////////////
//	test the system
/////////////////////
SysTest:
	
sysTestEnd:
	rtni	

/////////////////////////////////
//	ad change process 
///////////////////////////////
AdcChg:	
lrAdChg:			//left or right ad change 
	ldi	lorL,		0	//initial for ad change
	ldi	lorM,		0	//get 4times ad change value
	ldi	lorH,		0
	ldi	cntTemp,	3
lrAdChg1:
	chnLorSet
lrAdChg2:
	lda	adctim,		0
	ba3	$-1
lrAdChgGet:
	lda	adcdl,		0
	addm	lorL,		0
	lda	adcdh,		0
	adcm	lorM,		0
	ldi	temp,		0
	adcm	lorH,		0
	sbim	cntTemp,	1
	bc	lrAdChg1
	
gbAdChg:			//go or back ad change
	ldi	gobL,		0	//initial for ad change
	ldi	gobM,		0	//get 4times ad change value
	ldi	gobH,		0
	ldi	cntTemp,	3
gbAdChg1:
	chnGobSet
gbAdChg2:
	lda	adctim,		0
	ba3	$-1
gbAdChgGet:
	lda	adcdl,		0
	addm	gobL,		0
	lda	adcdh,		0
	adcm	gobM,		0
	ldi	temp,		0
	adcm	gobH,		0
	sbim	cntTemp,	1
	bc	gbAdChg1

adcChgEnd:
	rtni
	
////////////////////////////////////
//	ad change process
/////////////////////////
AdcPro:
adcLrPro:	//get the adc left or right high 6bit value
	lda	lorH,		0
	sta	temp2,		0
	lda	lorM,		0
	sta	temp1,		0
	andim	temp2,		0011b
	
	//lorH~M-34>0?
adcLProYn:
	sbi	temp1,		2
	ldi	temp,		2
	sbc	temp2,		0
	bnc	adcLProN
adcLProY:
	fDirLftSet		//yes,set the left direction flag
	sbim	temp1,		2
	ldi	temp,		2
	sbcm	temp2,		0
	lda	temp1,		0	//send lorH~L-34--->sndDlrH~L
	sta	sndDlrL,	0
	lda	temp2,		0
	sta	sndDlrH,	0
	jmp	adcLrProEnd
adcLProN:
	fDirLftClr	
	
	//30-lorH~L>0?,
adcRProYn:
	sbi	temp1,		0eh
	ldi	temp,		01h
	sbc	temp2,		0
	bc	adcRProN
adcRProY:	
	fDirRgtSet	//set tht right direction flag
	ldi	temp,		0eh
	lda	temp1,		0
	subm	temp,		0
	sta	temp1,		0
	ldi	temp,		01h
	lda	temp2,		0
	sbcm	temp,		0
	sta	temp2,		0
	jmp	adcLrProEnd
adcRProN:		//no,clear sndDlrH~L
	ldi	temp1,		0
	ldi	temp2,		0
adcLrProEnd:
	lda	temp1,		0
	sta	sndDlrL,	0
	lda	temp2,		0
	sta	sndDlrH,	0
	lda	fDirect,	0
	ba2	adcLftFlgSet
	ba3	adcRgtFlgSet
	jmp	adcGbPro
adcLftFlgSet:
	orim	sndDlrH,	0100b
	jmp	adcGbPro
adcRgtFlgSet:
	orim	sndDlrH,	0010b
	jmp	adcGbPro
	
/////////////////////
//
adcGbPro:	//get the adc go or back high 6bit value
	lda	gobH,		0
	sta	temp2,		0
	lda	gobM,		0
	sta	temp1,		0
	andim	temp2,		0011b
	
	//gobH~M-34>0?
adcGProYn:
	sbi	temp1,		2
	ldi	temp,		2
	sbc	temp2,		0
	bnc	adcGProN
adcGProY:
	fDirGoSet		//yes,set the go direction flag
	sbim	temp1,		2
	ldi	temp,		2
	sbcm	temp2,		0
	lda	temp1,		0	//send gobH~L-34--->sndDGbH~L
	sta	sndDgbL,	0
	lda	temp2,		0
	sta	sndDgbH,	0
	jmp	adcGbProEnd
adcGProN:
	fDirGoClr	
	
	//30-gobH~L>0?,
adcBProYn:
	sbi	temp1,		0eh
	ldi	temp,		01h
	sbc	temp2,		0
	bc	adcBProN
adcBProY:	
	fDirBakSet	//set tht right direction flag
	ldi	temp,		0eh
	lda	temp1,		0
	subm	temp,		0
	sta	temp1,		0
	ldi	temp,		01h
	lda	temp2,		0
	sbcm	temp,		0
	sta	temp2,		0
	jmp	adcGbProEnd
adcBProN:		//no,clear sndDGbH~L
	ldi	temp1,		0
	ldi	temp2,		0
adcGbProEnd:
	lda	temp1,		0	//get the send go or back data
	sta	sndDgbL,	0
	lda	temp2,		0
	sta	sndDgbH,	0
	lda	fDirect,	0
	ba0	adcGoFlgSet
	ba1	adcBakFlgSet
	jmp	adcProEnd
adcGoFlgSet:
	orim	sndDgbH,	0100b
	jmp	adcProEnd
adcBakFlgSet:
	orim	sndDgbH,	0010b
	jmp	adcProEnd	

adcProEnd:
	rtni	
////////////////////////////////////
//	data process
/////////////////////////////
DataPro:

datDlrPro:		//odd pro
	lda	sndDlrL,	0
	sta	temp1,		0
	lda	sndDlrH,	0
	sta	temp2,		0
	call	OddPro
	lda	temp1,		0
	sta	sndDlrL,	0
	lda	temp2,		0
	sta	sndDlrH,	0
	
datDgbPro:
	lda	sndDgbL,	0
	sta	temp1,		0
	lda	sndDgbH,	0
	sta	temp2,		0
	call	OddPro
	lda	temp1,		0
	sta	sndDgbL,	0
	lda	temp2,		0
	sta	sndDgbH,	0
	
datVrfPro:
	lda	sndDlrL,	0
	eor	sndDlrH,	0
	eor	sndDgbL,	0
	eor	sndDgbH,	0
	sta	sndVrf,		0
		
dataProEnd:
	rtni
	
////////////////////////////////////
//	rf process
///////////////////////////
RfPro:
//send rf data initial
// enable rf send	
	rfEnaSet
//	ldi	sndTim,		2	//wake up the receiver before send data 
rfSndSta:
	lda	sndDlrL,	0
	sta	sndTem1,	0
rfStaSnd:
	call	Snd4BitPro
		
	ldi	sndTim,		5
// send the head
rfHeadSnd:
	call	SndHedPro
	
// send the data1
rfDataSnd:
	lda	sndDlrL,	0
	sta	sndTem1,	0
rfData1Snd:
 	call	Snd4BitPro
// send the data2
	lda	sndDlrH,	0
	sta	sndTem1,	0
rfData2Snd:
 	call	Snd4BitPro
// send the data3	
	lda	sndDgbL,	0
	sta	sndTem1,	0
rfData3Snd:
 	call	Snd4BitPro
// send the data4	
	lda	sndDgbH,	0
	sta	sndTem1,	0
rfData4Snd:
 	call	Snd4BitPro
//send	the  virefy data
	lda	sndVrf,		0
	sta	sndTem1,	0
	call	Snd4BitPro
		
// send the end
rfEndSnd:
	call	SndEndPro
	
// send 3 times?
rfSndEndYn:
	sbim	sndTim,	1	//no,continue send
	bc	rfHeadSnd
	
rfProEnd:			//yes,exit
	rfEnaClr
	rtni

////////////////////////////////////
//	send data 1 process
///////////////////////////	
Snd1Pro:
	sndLowOut
	call	Dly200us
	sndHigOut
	call	Dly200us
	
snd1ProEnd:
	rtni
////////////////////////////////////
//	send data 0 process
///////////////////////////
Snd0Pro:
	sndLowOut
	call	Dly100us
	sndHigOut
	call	Dly100us
snd0ProEnd:
	rtni

/////////////////////////////////////
//	send head process
///////////////////////////
SndHedPro:
	sndLowOut
	call	Dly300us
	sndHigOut
	call	Dly300us
	sndLowOut
	call	Dly300us
	sndHigOut
	call	Dly300us
	sndLowOut
	call	Dly300us
	sndHigOut
	call	Dly300us
	sndLowOut
	call	Dly300us
	sndHigOut
	call	Dly300us
	sndLowOut
	call	Dly300us
	sndHigOut
	call	Dly300us

sndHedProEnd:
	rtni
////////////////////////////////////////
//	send the 4bit data process subroutine
//////////////////////////////
Snd4BitPro:
	ldi	cntTemp,	3
snd4BitYn:
	lda	sndTem1,	0
	shr	
	sta	sndTem1,	0
	bnc	snd4Bit0
snd4Bit1:
	call	Snd1Pro
	jmp	snd4BitEndYn
snd4Bit0:
	call	Snd0Pro
	jmp	snd4BitEndYn
snd4BitEndYn:
	sbim	cntTemp,	1
	bc	snd4BitYn	
snd4BitProEnd:
	rtni	
////////////////////////////////////
//	send end process subroutine
//////////////////////////	
SndEndPro:
	sndLowOut
	call	Dly300us
	sndHigOut
	call	Dly300us
	sndLowOut
	call	Dly300us
	sndHigOut
	call	Dly300us
	
SndEndProEnd:
	rtni
		
////////////////////////////////////
//
////////////////////////////
OddPro:
	lda	temp1,	0
	sta	temp,	0
	ldi	temp3,	0
oddProLow:
	lda	temp,	0
	shr	
	sta	temp,	0
	bc	oddProLow1
	ba0	oddProLow
	ba1	oddProLow
	ba2	oddProLow
	ba3	oddProLow
	jmp	oddProLowSetYn
	
oddProLow1:
	eorim	temp3,	1
	jmp	oddProLow
oddProLowSetYn:
//	lda	temp3,	0
//	baz	oddProLowClr
oddProLowSet:
//	orim	temp1,	1000b
//	jmp	oddProHigIni
oddProLowClr:
//	andim	temp1,	0111b
//
oddProHigIni:
	lda	temp2,	0
	sta	temp,	0
oddProHig:
	lda	temp,	0
	shr	
	sta	temp,	0
	bc	oddProHig1
	ba0	oddProHig
	ba1	oddProHig
	ba2	oddProHig
	ba3	oddProHig
	jmp	oddProHigEnd
oddProHig1:
	eorim	temp3,	1
	jmp	oddProHig

oddProHigEnd:
	lda	temp3,	0
	bnz	oddProHigClr
oddProHigSet:
	orim	temp2,	1000b
	jmp	oddProEnd
oddProHigClr:
	andim	temp2,	0111b

oddProEnd:
	rtni
	
////////////////////////////////////
//	delay subroutine
////////////////////////
Dly300us:
	ldi	temp1,	8
	ldi	temp,	06h
	sbim	temp,	1
	bc	$-1
	sbim	temp1,	1
	bc	$-3
Dly300usEnd:
	rtni	
	
Dly200us:
	ldi	temp1,	05h
	ldi	temp,	07h
	sbim	temp,	1
	bc	$-1
	sbim	temp1,	1
	bc	$-3
Dly200usEnd:
	rtni
Dly100us:
	ldi	temp1,	02h
	ldi	temp,	08h
	sbim	temp,	1
	bc	$-1
	sbim	temp1,	1
	bc	$-3
Dly100usEnd:
	rtni
	
///////////////////////////////////
//
////////////////////////
RightShift:
	lda	temp,	0
	shr	
	sta	temp,	0
	lda	temp1,	0
	shr	
	sta	temp1,	0
	bnc	$+2
	orim	temp,		1000b
	lda	temp2,	0
	shr	
	sta	temp2,	0
	bnc	$+2
	orim	temp1,		1000b
shrEnd:
	rtni	
	end