/*
*********************************************************************************************************
* File     : Fw.C
* Contents :
*
* $Date    : 09/18/06    Kimi    v0.1
* $Date    : 10/18/06    Kimi    v0.2
* $Date    : 11/02/06    Kimi    v1.0
*
* Copyright (c) 2006 Fameg, Inc. All rights reserved
*********************************************************************************************************
*/

#include "fw.h"

//----------------------------------------------------------------------------
// Description:
//
//----------------------------------------------------------------------------
void  SpiInit (void)
{
    SW_RST          = 0x08;                            // SPI SW Reset

    BPPUCTL         = 0x08;                            // SPI Disable pull-up
// LSBF = 0, MSB first
// CPHA = 0,
// CPOL = 0,
// MSTR = 0, Slave mode
// SSOE = 0,
// BRS = 100b, SCLK divided by 64
    SPI_CTL         = 0x80;

// IO Configuration
    SYSIO_CFG       = SYSIO_CFG | bmSPI_EN;            // Enable SPI IO

// Interrupt Configuration
    IE4             = 1;                               // Enable SPI,SDMI,I2C,DMA,TDES,WDT Interrupt
    SPI_ST          = SPI_ST | bmSPIIE;                // SPI Empty/Full Interrupt Enable
    CHIPINTE        = CHIPINTE | bmSPIIE;             // SPI Interrupt Event Enable
}

//----------------------------------------------------------------------------
// Description:
//
//----------------------------------------------------------------------------
void  McuInit (void)
{
    CKCON       = 0x01;
/*
    CKCON       = 0x01;
*/
    SYS_CFG     = 0x4B;                                // 60MHz, Output XFIFO_CLK, PM_AVBLE
    WDTRST      = 0x2D;                                // Stop WDT
    MEMCON      = 0x04;                                // 4K xdata
}

//----------------------------------------------------------------------------
// Description:
//
//----------------------------------------------------------------------------
void  Timer0Init (void)
{
/*
    TH0         = 0x9E;                                // 0x9E58, CPU 30MHz, 10ms
    TL0         = 0x58;
*/
    TH0         = 0x3C;                                // 0x3CB0, CPU 60MHz, 10ms
    TL0         = 0xB0;
    TMOD        = 0x21;
    TCON        = 0x50;
    IP          = 0x02;
    IE          = 0x82;                                // EA = 1
}

//----------------------------------------------------------------------------
// Description:
//   Task Dispatcher hooks function
//----------------------------------------------------------------------------
void  TdInit (void)
{
    McuInit();

    Timer0Init();

    UsbInit();

    SmInit();
}

//----------------------------------------------------------------------------
// Description:
//   USB Initialization
//----------------------------------------------------------------------------
void  UsbInit (void)
{
    SW_RST          = 0x07;                            // USB, SFI, APLIF SW Reset
// initialize endpoint
    EPFIFOCFG       = 0x00;                            // 0x00: 512 Single; 0x55: 512 Ping-Pong

    EPACTRL         = 0x1A;                            // EPA OUT
    EPBCTRL         = 0x2E;                            // EPB IN
    EPACS           = 0x01;                            // Enable EPA RX
    EPBCS           = 0x00;                            // Disable EPB TX

    EPCFIFOCS       = 0xF0;
// End initialize endpoint

// initialize sfi register
    SYSIO_CFG       = 0x02;                            // pins for PLIF mode

    SFI_EPCFG       = 0x00;                            // Manual, 8-bit, Parallel mode, not swap
// End initialize sfi register

// initialize plif register
    APLIFDM_CTL     = 0x08;                            // Half-Duplex mode, State Output
/*
    APLIFREADYCFG   = 0x80;                            // INTRDY = 1
*/
    APLIFIOCFG      = 0x00;                            // TRICTL = 0, CTL[5:0] is CMOS, Tri-state Data Bus when IDLE
    APLIFIDLECTL    = 0xf1;                            // APLIF_CTL Output State in the Idle State

    P3CFG           = 0xFE;                            // Enable APLIFADR[7:0]/[15:8]
                                                       // P3_0 low because of FS7805 bug

    memcpy(WAVEDATA0, WaveData, 128);                  // Copy wave data
// End initialize plif register

    SpiInit();
}