?? fw.c
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/*
*********************************************************************************************************
* File: fw.C
* Contents:
*
* $Date: 04/06/06 Kimi v0.1
* 01/05/07 kevin v0.2
* 01/08/07 kevin v0.3
*
* Copyright (c) 2007 Fameg, Inc. All rights reserved
*********************************************************************************************************
*/
#include "fs7805.h"
#include "fs7805regs.h"
#include "Include.h"
#include "string.h"
/*
*********************************************************************************************************
* VARIABLE PROTOTYPES
*********************************************************************************************************
*/
/*
*********************************************************************************************************
* FUNCTION PROTOTYPES
*********************************************************************************************************
*/
const INT8U xdata WaveData[128] =
{
// Wave 0
/* LenBr */ 0x0a, 0x02, 0x12, 0x3f, 0x00, 0x00, 0x00, 0x00,
/* Opcode*/ 0x02, 0x02, 0x02, 0x07, 0x00, 0x00, 0x00, 0x00,
/* LFun */ 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x00, 0x00,
/* Output*/ 0xfe, 0xfe, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
// Wave 1
/* LenBr */ 0x04, 0x04, 0x05, 0x3f, 0x00, 0x00, 0x00, 0x00,
/* Opcode*/ 0x00, 0x00, 0x06, 0x01, 0x00, 0x00, 0x00, 0x00,
/* LFun */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* Output*/ 0xfd, 0xfd, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
// Wave 2 udma write
/* LenBr */ 0x08, 0x01, 0x06, 0x1C, 0x25, 0x01, 0x02, 0x07,
/* Opcode*/ 0x01, 0x00, 0x02, 0x03, 0x01, 0x02, 0x26, 0x00,
/* LFun */ 0x09, 0x09, 0x12, 0xe9, 0x09, 0x2d, 0x36, 0x3F,
/* Output*/ 0xFF, 0xFB, 0xFA, 0xFA, 0xd8, 0xFB, 0xFB, 0xFF,
// Wave 3 udma read 13 E9:tc or arq 13 09 :arq 1A 2d: tc 1A CE :ff and arq
/* LenBr */ 0x08, 0x01, 0x1A, 0x01, 0x01, 0x02, 0x01, 0x07,
/* Opcode*/ 0x01, 0x00, 0x01, 0x00, 0x00, 0x26, 0x26, 0x00,
/* LFun */ 0x09, 0x00, 0xCE, 0x00, 0x2D, 0x00, 0x00, 0x3F,
/* Output*/ 0xFF, 0xFB, 0xF8, 0xFA, 0xFB, 0xFB, 0xFF, 0xFF,
};
/*
*********************************************************************************************************
* TDINIT
*
* Description: Task Dispatcher hooks function
*
* Arguments : none
*
* Returns : none
*********************************************************************************************************
*/
void TdInit (void)
{
McuInit();
AbortAplif();
Timer0Init();
UsbInit();
EA = TRUE; // Enable All interrupt
}
void McuInit()
{
CKCON = 0x01;
SYS_CFG = 0x4B; // 60MHz, Output XFIFO_CLK, PM_AVBLE
WDTRST = 0x2D; // Stop WDT
MEMCON = 0x04; // 4K xdata
}
void Timer0Init()
{
TH0 = 0x3C; // 0x3CB0, CPU 60MHz, 10ms
TL0 = 0xB0;
TMOD = 0x21;
TCON = 0x50;
IP = 0x02;
IE = 0x82; // EA = 1
}
xdata UINT16 DelayTimer = 0;
/*
*********************************************************************************************************
* USBINIT
*
* Description: USB Initialization
*
* Arguments : none
*
* Returns : none
*********************************************************************************************************
*/
void UsbInit (void)
{
SW_RST = 0x07; // USB, SFI, APLIF SW Reset
// initialize endpoint
EPFIFOCFG = 0x11; // fifo a 512 pingpong fifo c 512 pingpong
EPACTRL = 0x1A; // EPA OUT
EPCCTRL = 0x2E; // EPC IN
EPACS = 0x01; // Enable EPA RX
EPCCS = 0x00; // Disable EPC TX
//EPCFIFOCS = 0xF0;
// End initialize endpoint
EP0RXCS = 0x01; // Enable EP0 RX
// initialize sfi register
SYSIO_CFG = 0x92; // pins for PLIF mode
SFI_EPCFG = 0x01; // Manual, 16-bit, Parallel mode, not swap
SFI_EPINTE = 0x05; // enable sfi interrupt
// End initialize sfi register
// initialize plif register
APLIFDM_CTL = 0x08; // Half-Duplex mode, State Output
/*
APLIFREADYCFG = 0x80; // INTRDY = 1
*/
APLIFIOCFG = 0x00; // TRICTL = 0, CTL[5:0] is CMOS, Tri-state Data Bus when IDLE
APLIFIDLECTL = 0xff; // APLIF_CTL Output State in the Idle State
SFI_EPCINLENL = 0x00;
SFI_EPCDINLENH = 0x02;
//EPAPLIFSTOP = 0x00;
APLIFWAVESEL = 0x1B; // APLIF Waveform Selector
memcpy(WAVEDATA0, WaveData, 128); // Copy wave data
P3CFG = 0xFE; // Enable APLIFADR[7:0]/[15:8]
P3OE = 0xFE; // Address Output
P0CFG = 0xFF; // Enable APLIFADR[15:8]/[7:0]
P0OE = 0xFF; // Address Output
//APLIFARH = 0x00; // Address Low
//APLIFARL = 0x00; // Address High
// End initialize plif register
FLOWSTBEDGE = 0x03;
FLOWSTBHPERIOD = 0x02;
APLIFHOLDTIME = 0x01; // FLOWSTBHPERIOD=2
//APLIFHOLDTIME = 0x02; // FLOWSTBHPERIOD>=3
APLIFREADYCFG = 0x50; // use tc as the end
//fifo flag as the end
//EPAPLIFSTOP = 0x03;
EPAPLIFFLGSEL = 0x12; //select empty flag for the EP stop
setFeatures(0x03,0x45);
}
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