/****************************************************************/
/*                                                              */
/*           ST9+ Software Toolchain V6 Tutorial                */
/*                                                              */
/****************************************************************/

MEMORY
{
  ROM_CODE_1  :	ORIGIN = 0x00000, LENGTH = 8K
  ROM_CODE_2  :	ORIGIN = 0x10000, LENGTH = 4K
  ROM_RODATA  :	ORIGIN = 0x8000,  LENGTH = 4K,	MMU = IDPR0
  RAM1	      : ORIGIN = 0x20000, LENGTH = 1K,  MMU = IDPR3
  RAM2        : ORIGIN = 0x28000, LENGTH = 4K,	MMU = IDPR1
  REGFILE (t) : ORIGIN = 0x0,	  LENGTH = 208	/* Groups 0 to 0x0C */
}

SECTIONS {

   _stack_size = DEFINED(_stack_size) ? _stack_size : 0x100;

  .init   :
  {
    *(.init) }						> ROM_CODE_1

  .fini   :
  {
    *(.fini) }						> ROM_CODE_1

  .text   :
  {
    *(.text) }						> ROM_CODE_1

  .secinfo   :
  {
    CREATE_SECINFO_TABLE }				> ROM_CODE_1

  .rodata   :
  {
    *(.rodata) }					> ROM_RODATA

  .data   : AT (LOADADDR(.secinfo) + SIZEOF (.secinfo))
  {
    *(.data) }						> RAM1

  .bss   :
  {
    *(.bss) *(COMMON) }					> RAM1

  .stack   :
  {
    _stack_start = DEFINED( _stack_start) ? _stack_start : . ;
    . = . + _stack_size ;
    _stack_end = _stack_start + _stack_size ; }		> RAM1

  .globaldata : AT (LOADADDR(.data) + SIZEOF (.data))
  {
    *(.globaldata) }					> RAM2
 
  .reg16_data :	AT (LOADADDR(.globaldata) + SIZEOF (.globaldata))
  {
 	*(.reg16_data)}					> REGFILE

  .reg16_bss :
  {
    *(.reg16_bss)}					> REGFILE

   .reg8_data :	AT (LOADADDR(.reg16_data) + SIZEOF (.reg16_data))
  {
    *(.reg8_data) }					> REGFILE

  .reg8_bss :
  {
    *(.reg8_bss)}					> REGFILE
}