--lpm_compare CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" DEVICE_FAMILY="MAX II" LPM_REPRESENTATION="UNSIGNED" LPM_WIDTH=8 ONE_INPUT_IS_CONSTANT="YES" ageb dataa datab CARRY_CHAIN="MANUAL" CARRY_CHAIN_LENGTH=48
--VERSION_BEGIN 7.2 cbx_cycloneii 2007:06:13:15:47:32:SJ cbx_lpm_add_sub 2007:08:06:16:01:34:SJ cbx_lpm_compare 2007:06:21:15:54:06:SJ cbx_mgl 2007:08:03:15:48:12:SJ cbx_stratix 2007:05:02:16:27:14:SJ cbx_stratixii 2007:06:28:17:26:26:SJ  VERSION_END


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--  Your use of Altera Corporation's design tools, logic functions 
--  and other software and tools, and its AMPP partner logic 
--  functions, and any output files from any of the foregoing 
--  (including device programming or simulation files), and any 
--  associated documentation or information are expressly subject 
--  to the terms and conditions of the Altera Program License 
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--  without limitation, that your use is for the sole purpose of 
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--synthesis_resources = lut 13 
SUBDESIGN cmpr_kti
( 
	ageb	:	output;
	dataa[7..0]	:	input;
	datab[7..0]	:	input;
) 
VARIABLE
	aeb_int	:	WIRE;
	agb_int	:	WIRE;
BEGIN 
	IF (dataa[] == datab[]) THEN
		aeb_int = VCC;
	ELSE
		aeb_int = GND;
	END IF;
	IF (dataa[] > datab[]) THEN
		agb_int = VCC;
	ELSE
		agb_int = GND;
	END IF;
	ageb = agb_int # aeb_int;
END;
--VALID FILE