?? csl_emifhal.h
字號:
#define _EMIF_SDCTL_TRCD_MASK 0x00F00000u #define _EMIF_SDCTL_TRCD_SHIFT 0x00000014u #define EMIF_SDCTL_TRCD_DEFAULT 0x00000004u #define EMIF_SDCTL_TRCD_OF(x) _VALUEOF(x)#else #define _EMIF_SDCTL_TRCD_MASK 0x00F00000u #define _EMIF_SDCTL_TRCD_SHIFT 0x00000014u #define EMIF_SDCTL_TRCD_DEFAULT 0x00000008u #define EMIF_SDCTL_TRCD_OF(x) _VALUEOF(x)#endif #define _EMIF_SDCTL_TRP_MASK 0x000F0000u #define _EMIF_SDCTL_TRP_SHIFT 0x00000010u #define EMIF_SDCTL_TRP_DEFAULT 0x00000008u #define EMIF_SDCTL_TRP_OF(x) _VALUEOF(x) #define _EMIF_SDCTL_TRC_MASK 0x0000F000u #define _EMIF_SDCTL_TRC_SHIFT 0x0000000Cu #define EMIF_SDCTL_TRC_DEFAULT 0x0000000Fu #define EMIF_SDCTL_TRC_OF(x) _VALUEOF(x) #define EMIF_SDCTL_OF(x) _VALUEOF(x)#if (C11_SUPPORT) #define EMIF_SDCTL_DEFAULT (Uint32)( \ _PER_FDEFAULT(EMIF,SDCTL,SDBSZ)\ |_PER_FDEFAULT(EMIF,SDCTL,SDRSZ)\ |_PER_FDEFAULT(EMIF,SDCTL,SDCSZ)\ |_PER_FDEFAULT(EMIF,SDCTL,RFEN)\ |_PER_FDEFAULT(EMIF,SDCTL,INIT)\ |_PER_FDEFAULT(EMIF,SDCTL,TRCD)\ |_PER_FDEFAULT(EMIF,SDCTL,TRP)\ |_PER_FDEFAULT(EMIF,SDCTL,TRC)\ ) #define EMIF_SDCTL_RMK(sdbsz,sdrsz,sdcsz,rfen,init,trcd,trp,trc) (Uint32)(\ _PER_FMK(EMIF,SDCTL,SDBSZ,sdbsz)\ |_PER_FMK(EMIF,SDCTL,SDRSZ,sdrsz)\ |_PER_FMK(EMIF,SDCTL,SDCSZ,sdcsz)\ |_PER_FMK(EMIF,SDCTL,RFEN,rfen)\ |_PER_FMK(EMIF,SDCTL,INIT,init)\ |_PER_FMK(EMIF,SDCTL,TRCD,trcd)\ |_PER_FMK(EMIF,SDCTL,TRP,trp)\ |_PER_FMK(EMIF,SDCTL,TRC,trc)\ )#endif#if !(C11_SUPPORT) #define EMIF_SDCTL_DEFAULT (Uint32)( \ _PER_FDEFAULT(EMIF,SDCTL,SDWID)\ |_PER_FDEFAULT(EMIF,SDCTL,RFEN)\ |_PER_FDEFAULT(EMIF,SDCTL,INIT)\ |_PER_FDEFAULT(EMIF,SDCTL,TRCD)\ |_PER_FDEFAULT(EMIF,SDCTL,TRP)\ |_PER_FDEFAULT(EMIF,SDCTL,TRC)\ ) #define EMIF_SDCTL_RMK(sdwid,rfen,init,trcd,trp,trc) (Uint32)(\ _PER_FMK(EMIF,SDCTL,SDWID,sdwid)\ |_PER_FMK(EMIF,SDCTL,RFEN,rfen)\ |_PER_FMK(EMIF,SDCTL,INIT,init)\ |_PER_FMK(EMIF,SDCTL,TRCD,trcd)\ |_PER_FMK(EMIF,SDCTL,TRP,trp)\ |_PER_FMK(EMIF,SDCTL,TRC,trc)\ )#endif #define _EMIF_SDCTL_FGET(FIELD)\ _PER_FGET(_EMIF_SDCTL_ADDR,EMIF,SDCTL,##FIELD) #define _EMIF_SDCTL_FSET(FIELD,field)\ _PER_FSET(_EMIF_SDCTL_ADDR,EMIF,SDCTL,##FIELD,field) #define _EMIF_SDCTL_FSETS(FIELD,SYM)\ _PER_FSETS(_EMIF_SDCTL_ADDR,EMIF,SDCTL,##FIELD,##SYM)/******************************************************************************\* _____________________* | |* | S D T I M |* |___________________|** SDTIM - SDRAM timing register** FIELDS (msb -> lsb)* (rw) XRFR (1)* (r) CNTR* (rw) PERIOD** (1) - Field only exists for C11_SUPPORT*\******************************************************************************/ #define _EMIF_SDTIM_OFFSET 7 #define _EMIF_SDTIM_ADDR 0x0180001Cu#if (C11_SUPPORT) #define _EMIF_SDTIM_XRFR_MASK 0x03000000u #define _EMIF_SDTIM_XRFR_SHIFT 0x00000018u #define EMIF_SDTIM_XRFR_DEFAULT 0x00000000u #define EMIF_SDTIM_XRFR_OF(x) _VALUEOF(x)#endif#if (C11_SUPPORT) #define _EMIF_SDTIM_CNTR_MASK 0x00FFF000u #define _EMIF_SDTIM_CNTR_SHIFT 0x0000000Cu #define EMIF_SDTIM_CNTR_DEFAULT 0x000005DCu #define EMIF_SDTIM_CNTR_OF(x) _VALUEOF(x)#else #define _EMIF_SDTIM_CNTR_MASK 0x00FFF000u #define _EMIF_SDTIM_CNTR_SHIFT 0x0000000Cu #define EMIF_SDTIM_CNTR_DEFAULT 0x00000040u #define EMIF_SDTIM_CNTR_OF(x) _VALUEOF(x)#endif #if (C11_SUPPORT) #define _EMIF_SDTIM_PERIOD_MASK 0x00000FFFu #define _EMIF_SDTIM_PERIOD_SHIFT 0x00000000u #define EMIF_SDTIM_PERIOD_DEFAULT 0x000005DCu #define EMIF_SDTIM_PERIOD_OF(x) _VALUEOF(x)#else #define _EMIF_SDTIM_PERIOD_MASK 0x00000FFFu #define _EMIF_SDTIM_PERIOD_SHIFT 0x00000000u #define EMIF_SDTIM_PERIOD_DEFAULT 0x00000040u #define EMIF_SDTIM_PERIOD_OF(x) _VALUEOF(x)#endif #define EMIF_SDTIM_OF(x) _VALUEOF(x)#if (C11_SUPPORT) #define EMIF_SDTIM_DEFAULT (Uint32)( \ _PER_FDEFAULT(EMIF,SDTIM,XRFR)\ |_PER_FDEFAULT(EMIF,SDTIM,CNTR)\ |_PER_FDEFAULT(EMIF,SDTIM,PERIOD)\ ) #define EMIF_SDTIM_RMK(xrfr,period) (Uint32)(\ _PER_FMK(EMIF,SDTIM,XRFR,xrfr)\ |_PER_FMK(EMIF,SDTIM,PERIOD,period)\ )#endif#if !(C11_SUPPORT) #define EMIF_SDTIM_DEFAULT (Uint32)( \ _PER_FDEFAULT(EMIF,SDTIM,CNTR)\ |_PER_FDEFAULT(EMIF,SDTIM,PERIOD)\ ) #define EMIF_SDTIM_RMK(period) (Uint32)(\ _PER_FMK(EMIF,SDTIM,PERIOD,period)\ )#endif #define _EMIF_SDTIM_FGET(FIELD)\ _PER_FGET(_EMIF_SDTIM_ADDR,EMIF,SDTIM,##FIELD) #define _EMIF_SDTIM_FSET(FIELD,field)\ _PER_FSET(_EMIF_SDTIM_ADDR,EMIF,SDTIM,##FIELD,field) #define _EMIF_SDTIM_FSETS(FIELD,SYM)\ _PER_FSETS(_EMIF_SDTIM_ADDR,EMIF,SDTIM,##FIELD,##SYM)/******************************************************************************\* _____________________* | |* | S D E X T |* |___________________|** SDEXT - SDRAM extension register (1)** (1) - only supported on 6211,6711,6713,DA610,6711C,6712C** FIELDS (msb -> lsb)* (rw) WR2RD* (rw) WR2DEAC* (rw) WR2WR* (rw) R2WDQM* (rw) RD2WR* (rw) RD2DEAC* (rw) RD2RD* (rw) THZP* (rw) TWR* (rw) TRRD* (rw) TRAS* (rw) TCL*\******************************************************************************/#if (C11_SUPPORT) #define _EMIF_SDEXT_OFFSET 8 #define _EMIF_SDEXT_ADDR 0x01800020u #define _EMIF_SDEXT_WR2RD_MASK 0x00100000u #define _EMIF_SDEXT_WR2RD_SHIFT 0x00000014u #define EMIF_SDEXT_WR2RD_DEFAULT 0x00000001u #define EMIF_SDEXT_WR2RD_OF(x) _VALUEOF(x) #define _EMIF_SDEXT_WR2DEAC_MASK 0x000C0000u #define _EMIF_SDEXT_WR2DEAC_SHIFT 0x00000012u #define EMIF_SDEXT_WR2DEAC_DEFAULT 0x00000001u #define EMIF_SDEXT_WR2DEAC_OF(x) _VALUEOF(x) #define _EMIF_SDEXT_WR2WR_MASK 0x00020000u #define _EMIF_SDEXT_WR2WR_SHIFT 0x00000011u #define EMIF_SDEXT_WR2WR_DEFAULT 0x00000001u #define EMIF_SDEXT_WR2WR_OF(x) _VALUEOF(x) #define _EMIF_SDEXT_R2WDQM_MASK 0x00018000u #define _EMIF_SDEXT_R2WDQM_SHIFT 0x0000000Fu #define EMIF_SDEXT_R2WDQM_DEFAULT 0x00000003u #define EMIF_SDEXT_R2WDQM_OF(x) _VALUEOF(x) #define _EMIF_SDEXT_RD2WR_MASK 0x00007000u #define _EMIF_SDEXT_RD2WR_SHIFT 0x0000000Cu #define EMIF_SDEXT_RD2WR_DEFAULT 0x00000005u #define EMIF_SDEXT_RD2WR_OF(x) _VALUEOF(x) #define _EMIF_SDEXT_RD2DEAC_MASK 0x00000C00u #define _EMIF_SDEXT_RD2DEAC_SHIFT 0x0000000Au #define EMIF_SDEXT_RD2DEAC_DEFAULT 0x00000003u #define EMIF_SDEXT_RD2DEAC_OF(x) _VALUEOF(x) #define _EMIF_SDEXT_RD2RD_MASK 0x00000200u #define _EMIF_SDEXT_RD2RD_SHIFT 0x00000009u #define EMIF_SDEXT_RD2RD_DEFAULT 0x00000001u #define EMIF_SDEXT_RD2RD_OF(x) _VALUEOF(x) #define _EMIF_SDEXT_THZP_MASK 0x00000180u #define _EMIF_SDEXT_THZP_SHIFT 0x00000007u #define EMIF_SDEXT_THZP_DEFAULT 0x00000002u #define EMIF_SDEXT_THZP_OF(x) _VALUEOF(x) #define _EMIF_SDEXT_TWR_MASK 0x00000060u #define _EMIF_SDEXT_TWR_SHIFT 0x00000005u #define EMIF_SDEXT_TWR_DEFAULT 0x00000001u #define EMIF_SDEXT_TWR_OF(x) _VALUEOF(x) #define _EMIF_SDEXT_TRRD_MASK 0x00000010u #define _EMIF_SDEXT_TRRD_SHIFT 0x00000004u #define EMIF_SDEXT_TRRD_DEFAULT 0x00000001u #define EMIF_SDEXT_TRRD_OF(x) _VALUEOF(x) #define _EMIF_SDEXT_TRAS_MASK 0x0000000Eu #define _EMIF_SDEXT_TRAS_SHIFT 0x00000001u #define EMIF_SDEXT_TRAS_DEFAULT 0x00000007u #define EMIF_SDEXT_TRAS_OF(x) _VALUEOF(x) #define _EMIF_SDEXT_TCL_MASK 0x00000001u #define _EMIF_SDEXT_TCL_SHIFT 0x00000000u #define EMIF_SDEXT_TCL_DEFAULT 0x00000001u #define EMIF_SDEXT_TCL_OF(x) _VALUEOF(x) #define EMIF_SDEXT_OF(x) _VALUEOF(x) #define EMIF_SDEXT_DEFAULT (Uint32)( \ _PER_FDEFAULT(EMIF,SDEXT,WR2RD)\ |_PER_FDEFAULT(EMIF,SDEXT,WR2DEAC)\ |_PER_FDEFAULT(EMIF,SDEXT,WR2WR)\ |_PER_FDEFAULT(EMIF,SDEXT,R2WDQM)\ |_PER_FDEFAULT(EMIF,SDEXT,RD2WR)\ |_PER_FDEFAULT(EMIF,SDEXT,RD2DEAC)\ |_PER_FDEFAULT(EMIF,SDEXT,RD2RD)\ |_PER_FDEFAULT(EMIF,SDEXT,THZP)\ |_PER_FDEFAULT(EMIF,SDEXT,TWR)\ |_PER_FDEFAULT(EMIF,SDEXT,TRRD)\ |_PER_FDEFAULT(EMIF,SDEXT,TRAS)\ |_PER_FDEFAULT(EMIF,SDEXT,TCL)\ ) #define EMIF_SDEXT_RMK(wr2rd,wr2deac,wr2wr,r2wdqm,rd2wr,rd2deac,\ rd2rd,thzp,twr,trrd,tras,tcl) (Uint32)( \ _PER_FMK(EMIF,SDEXT,WR2RD,wr2rd)\ |_PER_FMK(EMIF,SDEXT,WR2DEAC,wr2deac)\ |_PER_FMK(EMIF,SDEXT,WR2WR,wr2wr)\ |_PER_FMK(EMIF,SDEXT,R2WDQM,r2wdqm)\ |_PER_FMK(EMIF,SDEXT,RD2WR,rd2wr)\ |_PER_FMK(EMIF,SDEXT,RD2DEAC,rd2deac)\ |_PER_FMK(EMIF,SDEXT,RD2RD,rd2rd)\ |_PER_FMK(EMIF,SDEXT,THZP,thzp)\ |_PER_FMK(EMIF,SDEXT,TWR,twr)\ |_PER_FMK(EMIF,SDEXT,TRRD,trrd)\ |_PER_FMK(EMIF,SDEXT,TRAS,tras)\ |_PER_FMK(EMIF,SDEXT,TCL,tcl)\ ) #define _EMIF_SDEXT_FGET(FIELD)\ _PER_FGET(_EMIF_SDEXT_ADDR,EMIF,SDEXT,##FIELD) #define _EMIF_SDEXT_FSET(FIELD,field)\ _PER_FSET(_EMIF_SDEXT_ADDR,EMIF,SDEXT,##FIELD,field) #define _EMIF_SDEXT_FSETS(FIELD,SYM)\ _PER_FSETS(_EMIF_SDEXT_ADDR,EMIF,SDEXT,##FIELD,##SYM)#endif/*----------------------------------------------------------------------------*/#endif /* EMIF_SUPPORT */#endif /* _CSL_EMIFHAL_H_ *//******************************************************************************\* End of csl_emifhal.h\******************************************************************************/?? 快捷鍵說明
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