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?? cc1100_test.lst

?? chipcom公司CC1100無線模塊底層驅動程序
?? LST
?? 第 1 頁 / 共 5 頁
字號:
    048B F479      BNE	0x049B
(0223) 			f = FormatItem(f + 1, vaArg(argP, int));
    048C 01CA      MOVW	R24,R20
    048D 9602      ADIW	R24,2
    048E 01AC      MOVW	R20,R24
    048F 01FC      MOVW	R30,R24
    0490 9732      SBIW	R30,2
    0491 8120      LDD	R18,Z+0
    0492 8131      LDD	R19,Z+1
    0493 810A      LDD	R16,Y+2
    0494 811B      LDD	R17,Y+3
    0495 5F0F      SUBI	R16,0xFF
    0496 4F1F      SBCI	R17,0xFF
    0497 DEE0      RCALL	_FormatItem
    0498 831B      STD	Y+3,R17
    0499 830A      STD	Y+2,R16
    049A C006      RJMP	0x04A1
(0224) 		else
(0225) 			putchar(*f++);
    049B 81EA      LDD	R30,Y+2
    049C 81FB      LDD	R31,Y+3
    049D 9101      LD	R16,Z+
    049E 83FB      STD	Y+3,R31
    049F 83EA      STD	Y+2,R30
    04A0 DD8E      RCALL	_putchar
    04A1 81EA      LDD	R30,Y+2
    04A2 81FB      LDD	R31,Y+3
    04A3 8020      LDD	R2,Z+0
    04A4 2022      TST	R2
    04A5 F709      BNE	0x0487
(0226) 	}
(0227) 	vaEnd(argP);
    04A6 D38B      RCALL	pop_gset1
    04A7 9624      ADIW	R28,4
    04A8 9508      RET
_IntPCINT2:
    04A9 922A      ST	R2,-Y
    04AA 938A      ST	R24,-Y
    04AB B62F      IN	R2,0x3F
    04AC 922A      ST	R2,-Y
FILE: D:\WIRELE~1\CC1020~1\SoftWare\SoftWare\board.c
(0001) /****************************************************/
(0002) /* Application note                                 */
(0003) /* Reference design : CC1100 RF Test Board          */
(0004) /* File:         board.c                            */
(0005) /* Revision:  1.0                                   */
(0006) /* Description:                                     */
(0007) /* Microcontroller:ATmega48/48V                     */
(0008) /* Author:  Zcg, Field Applications Engineer, SunRay*/
(0009) /****************************************************/
(0010)  
(0011) #include "iom88v.h"
(0012) #include "macros.h" 
(0013) #include "main.h"
(0014) #include "CC1100.h"
(0015) #include "board.h"
(0016) #include "simpleio.h"
(0017) 
(0018) INT8U Test_RFTx_Buf[MAX_DATA_TEST];		//測試數據緩沖區
(0019) 
(0020) INT8U UartReceive_Buf[MAX_UT_BUFF];     //射頻發送(串口接收)緩存
(0021) INT8U RFReceive_Buf[MAX_RF_BUFF];       //射頻接收(串口發送)緩存
(0022) 
(0023) INT8U RFSend_Start;
(0024) INT8U RFSendCnt;        //射頻發送計數器,記錄要發送的字節個數
(0025) INT8U RFReceiveCnt;     //串口接收計數器
(0026) 
(0027) INT8U RFReceiveLen;     //串口發送字節長度
(0028) 
(0029) INT8U RFSendFlg;        //當串口接收完一包數據,置該標志
(0030) INT8U RFReceiveFlg;     //當射頻接收完一包數據,置該標志
(0031) 
(0032) 
(0033) INT8U RXOTFlg;          //串口接收數據超時標志
(0034) INT8U RXOTCnt;          //串口接收數據超時計數器
(0035) 
(0036) INT8U Baud_Set_Num;		//跳線開關波特率
(0037) INT8U Chno_Set_Num;		//跳線開關信道值
(0038) 
(0039) INT8U  Beep_Flag;		//蜂鳴器開啟標志
(0040) INT16U Beep_Time;		//蜂鳴器開啟時間
(0041) 
(0042) const SYS_SETTINGS Sys_Set[8] =
(0043) {
(0044) 	{T_T0_18MS,0x40,0x03,0xC4,0x86,0x10,600},//000 600
(0045) 	{T_T0_10MS,0x9F,0x01,0xF5,0x83,0x15,1200},//001 1200
(0046) 	{T_T0_8MS ,0xCF,0x00,0xC6,0x83,0x15,2400},//010 2400
(0047) 	{T_T0_4MS ,0x67,0x00,0xC7,0x83,0x40,4800},//011 4800
(0048) 	{T_T0_2MS ,0x33,0x00,0xC8,0x83,0x34,9600},//100 9600
(0049) 	{T_T0_2MS ,0x19,0x00,0xC9,0x83,0x34,19200},//101 19200
(0050) 	{T_T0_2MS ,0x0C,0x00,0xCA,0x83,0x34,38400},//110 38400
(0051) 	{T_T0_2MS ,0x08,0x00,0xCB,0x83,0x45,57600},//111 57600
(0052) };
(0053) 
(0054) 
(0055) 
(0056) INT8U paTable[8] = {0x8D,0x8D,0x8D,0x8D,0x8D,0x8D,0x8D,0x8D};
(0057) #if 0
(0058) INT8U rfSettings[39] = {
(0059) 	0x06,   //*0x0B IOCFG2    GDO2 output pin configuration.
(0060)     0x2E,   //*0x2E IOCFG1    GDO1 output pin configuration.
(0061)     0x2E,   //*0x0C IOCFG0   GDO0 output pin configuration. Refer to SmartRF?Studio User Manual for detailed pseudo register explanation.
(0062)     0x07, 	// FIFOTHR  RX FIFO and TX FIFO thresholds
(0063) 	0xD3, 	// SYNC1  Sync word, high byte
(0064) 	0x91, 	// SYNC0  Sync word, low byte
(0065)     0xFF,   // PKTLEN    Packet length.
(0066)     0x24,   //*0x00 PKTCTRL1  Packet automation control.
(0067)     0x45,   //*0x12 PKTCTRL0  Packet automation control.
(0068)     0x00,   // ADDR      Device address.
(0069)     0x00,   // CHANNR    Channel number.
(0070)     0x0C,   //*0x06 FSCTRL1   Frequency synthesizer control.
(0071)     0x00,   // FSCTRL0   Frequency synthesizer control.
(0072)     0x10,   // FREQ2     Frequency control word, high byte.
(0073)     0xA7,   // FREQ1     Frequency control word, middle byte.
(0074)     0x62,   // FREQ0     Frequency control word, low byte.
(0075)     0xF5,   //* MDMCFG4   Modem configuration.
(0076)     0x83,   //* MDMCFG3   Modem configuration.
(0077)     0x03,   //*0x00 MDMCFG2   Modem configuration.
(0078)     0x22,   // MDMCFG1   Modem configuration.
(0079)     0xF8,   // MDMCFG0   Modem configuration.
(0080)     0x15,   // DEVIATN   Modem deviation setting (when FSK modulation is enabled).
(0081) 	0x0E,   //*0x07 MCSM2     Main Radio Control State Machine configuration.
(0082) 	0x30,   // MCSM1     Main Radio Control State Machine configuration.
(0083)     0x18,   // MCSM0     Main Radio Control State Machine configuration.
(0084)     0x15,   //*0x16 FOCCFG    Frequency Offset Compensation Configuration.
(0085)     0x6C,   // BSCFG     Bit synchronization Configuration.
(0086)     0x03,   // AGCCTRL2  AGC control.
(0087)     0x40,   // AGCCTRL1  AGC control.
(0088)     0x91,   // AGCCTRL0  AGC control.
(0089) 	0x87,   // WOREVT1  0x1E  //定義EVENT0時間
(0090) 	0x6B,   // WOREVT0  0x1F  //...
(0091) 	0xF8,   // WORCTRL  0x20  //關閉RC,定義EVENT1時間
(0092)     0x56,   // FREND1    Front end RX configuration.
(0093)     0x10,   // FREND0    Front end RX configuration.
(0094)     0xA9,   //* FSCAL3    Frequency synthesizer calibration.
(0095)     0x2A,   //* FSCAL2    Frequency synthesizer calibration.
(0096)     0x0D,   //* FSCAL1    Frequency synthesizer calibration.
(0097)     0x11,   //* FSCAL0    Frequency synthesizer calibration.
(0098) };
(0099) #endif
(0100) #define RF_CENTER	429
(0101) #define RF_429
(0102) #if 1
(0103) const RF_SETTINGS rfSettings = {
(0104) 	0x06,   //*0x0B IOCFG2    GDO2 output pin configuration.
(0105)     0x2E,   //*0x2E IOCFG1    GDO1 output pin configuration.
(0106)     0x2E,   //*0x0C IOCFG0   GDO0 output pin configuration. Refer to SmartRF?Studio User Manual for detailed pseudo register explanation.
(0107)     0x07, 	// FIFOTHR  RX FIFO and TX FIFO thresholds
(0108) 	0xD3, 	// SYNC1  Sync word, high byte
(0109) 	0x91, 	// SYNC0  Sync word, low byte
(0110)     0xFF,   // PKTLEN    Packet length.
(0111)     0x04,   //*0x00 PKTCTRL1  Packet automation control.
(0112)     0x45,   //*0x12 PKTCTRL0  Packet automation control.
(0113)     0x00,   // ADDR      Device address.
(0114)     0x00,   // CHANNR    Channel number.
(0115)     0x06,//0x0C,   //*0x06 FSCTRL1   Frequency synthesizer control.
(0116)     0x00,   // FSCTRL0   Frequency synthesizer control.
(0117) #ifdef RF_429
(0118)     0x10,   // FREQ2     Frequency control word, high byte.
(0119)     0x80,   // FREQ1     Frequency control word, middle byte.
(0120)     0x83,   // FREQ0     Frequency control word, low byte.
(0121) #endif
(0122) 
(0123) #ifdef RF_433
(0124)     0x10,   // FREQ2     Frequency control word, high byte.
(0125)     0xA7,   // FREQ1     Frequency control word, middle byte.
(0126)     0x62,   // FREQ0     Frequency control word, low byte.
(0127) #endif
(0128) #ifdef RF_461
(0129)     0x11,   // FREQ2     Frequency control word, high byte.
(0130)     0xBB,   // FREQ1     Frequency control word, middle byte.
(0131)     0x13,   // FREQ0     Frequency control word, low byte.
(0132) #endif
(0133)     0xF5,   // MDMCFG4   Modem configuration.
(0134)     0x83,   // MDMCFG3   Modem configuration.
(0135)     0x03,   //*0x00 MDMCFG2   Modem configuration.
(0136)     0x22,   // MDMCFG1   Modem configuration.
(0137)     0xF8,   // MDMCFG0   Modem configuration.
(0138)     0x15,   // DEVIATN   Modem deviation setting (when FSK modulation is enabled).
(0139) 	0x0E,   //*0x07 MCSM2     Main Radio Control State Machine configuration.
(0140) 	0x30,   // MCSM1     Main Radio Control State Machine configuration.
(0141)     0x18,   // MCSM0     Main Radio Control State Machine configuration.
(0142)     0x16,//0x15,   //*0x16 FOCCFG    Frequency Offset Compensation Configuration.
(0143)     0x6C,   // BSCFG     Bit synchronization Configuration.
(0144)     0x03,   // AGCCTRL2  AGC control.
(0145)     0x40,   // AGCCTRL1  AGC control.
(0146)     0x91,   // AGCCTRL0  AGC control.
(0147) 	0x87,   // WOREVT1  0x1E  //定義EVENT0時間
(0148) 	0x6B,   // WOREVT0  0x1F  //...
(0149) 	0xF8,   // WORCTRL  0x20  //關閉RC,定義EVENT1時間
(0150)     0x56,   // FREND1    Front end RX configuration.
(0151)     0x10,   // FREND0    Front end RX configuration.
(0152)     0xE9,//0xA9,   //*0xE9 FSCAL3    Frequency synthesizer calibration.
(0153)     0x2A,//0x2A,   //*0x2A FSCAL2    Frequency synthesizer calibration.
(0154)     0x00,//0x0D,   //*0x00 FSCAL1    Frequency synthesizer calibration.
(0155)     0x1F,//0x11,   //*0x1F FSCAL0    Frequency synthesizer calibration.
(0156) };
(0157) #endif
(0158) INT8U RFState;          //保存射頻狀態,共兩種狀態:發送、接收狀態
(0159) 
(0160) 
(0161) INT8U CC1100IntHFlg;    //CC1100產生高電平中斷標志
(0162) INT8U CC1100IntLFlg;
(0163) 
(0164) /*
(0165) ************************************************************
(0166) *Description:RF收發中斷處理函數
(0167) *Arguments  :none
(0168) *Returns    :none
(0169) *Notes      :
(0170) ************************************************************
(0171) */
(0172) #pragma interrupt_handler IntPCINT2:iv_PCINT2
(0173) void IntPCINT2 (void)
(0174) {
(0175) 	if (GDO2_STATE != 0x00)
    04AD 9B4A      SBIS	0x09,2
    04AE C007      RJMP	0x04B6
(0176) 	{
(0177) 	    CC1100IntHFlg = TRUE;   //上升沿中斷,等待下降沿中斷
    04AF E081      LDI	R24,1
    04B0 938002A5  STS	CC1100IntHFlg,R24
(0178) 		if(RFSend_Start==TRUE)
    04B2 918002A6  LDS	R24,RFSend_Start
    04B4 3081      CPI	R24,1
    04B5 F401      BNE	0x04B6
(0179) 		{
(0180) 			//TXEN_SET_L;//打開功率放大
(0181) 			//RXEN_SET_L;//打開功率放大
(0182) 		}
(0183) 	}
(0184) 	if ((CC1100IntHFlg == TRUE) && (GDO2_STATE == 0x00))
    04B6 918002A5  LDS	R24,CC1100IntHFlg
    04B8 3081      CPI	R24,1
    04B9 F471      BNE	0x04C8
    04BA 994A      SBIC	0x09,2
    04BB C00C      RJMP	0x04C8
(0185) 	{
(0186) 	    CC1100IntHFlg = FALSE;  //下降沿中斷
    04BC 2422      CLR	R2
    04BD 922002A5  STS	CC1100IntHFlg,R2
(0187) 		CC1100IntLFlg = TRUE;
    04BF E081      LDI	R24,1
    04C0 938002A4  STS	CC1100IntLFlg,R24
(0188) 
(0189) 		if(RFSend_Start==TRUE)
    04C2 918002A6  LDS	R24,RFSend_Start
    04C4 3081      CPI	R24,1
    04C5 F411      BNE	0x04C8
(0190) 		{
(0191) 			//TXEN_SET_H;//關閉功率放大
(0192) 			//RXEN_SET_H;//關閉功率放大
(0193) 			RFSend_Start=FALSE;
    04C6 922002A6  STS	RFSend_Start,R2
(0194) 		}
(0195) 	}
    04C8 9029      LD	R2,Y+
    04C9 BE2F      OUT	0x3F,R2
    04CA 9189      LD	R24,Y+
    04CB 9029      LD	R2,Y+
    04CC 9518      RETI
(0196) }
(0197) /*
(0198) ************************************************************
(0199) *Description:初始化IO端口
(0200) *Arguments  :none
(0201) *Returns    :none
(0202) *Notes      :
(0203) ************************************************************
(0204) */
(0205) void port_init(void)
(0206) {
(0207) 	DDRB =0x00;
_port_init:
    04CD 2422      CLR	R2
    04CE B824      OUT	0x04,R2
(0208) 	PORTB=0x3F;
    04CF E38F      LDI	R24,0x3F
    04D0 B985      OUT	0x05,R24
(0209) 	
(0210) 	DDRD =0x08;//PD3 KEY
    04D1 E088      LDI	R24,0x8
    04D2 B98A      OUT	0x0A,R24
(0211) 	PORTD=0xD0;
    04D3 ED80      LDI	R24,0xD0
    04D4 B98B      OUT	0x0B,R24
(0212) 	
(0213) 	BEEP_INIT();
    04D5 9A55      SBI	0x0A,5
(0214) 	BEEP_OFF();
    04D6 985D      CBI	0x0B,5
    04D7 9508      RET
(0215) 
(0216) 	//TXEN_OUT;
(0217) 	//TXEN_SET_H;
(0218) 	//RXEN_OUT;
(0219) 	//RXEN_SET_H;
(0220) }
(0221) /*
(0222) ************************************************************
(0223) *Description:初始化串口
(0224) *Arguments  :none
(0225) *Returns    :none
(0226) *Notes      :
(0227) ************************************************************
(0228) */
(0229) void uart0_init(void)
(0230) {
(0231) 	UBRR0H = Sys_Set[Baud_Set_Num].ubrr0h_val;
_uart0_init:
    04D8 902001E8  LDS	R2,Baud_Set_Num
    04DA E088      LDI	R24,0x8
    04DB 9D82      MUL	R24,R2
    04DC 01F0      MOVW	R30,R0
    04DD E386      LDI	R24,0x36
    04DE E090      LDI	R25,0
    04DF 0FE8      ADD	R30,R24
    04E0 1FF9      ADC	R31,R25
    04E1 91E4      LPM	R30,0(Z)
    04E2 93E000C5  STS	0xC5,R30
(0232) 	UBRR0L = Sys_Set[Baud_Set_Num].ubrr0l_val;
    04E4 E088      LDI	R24,0x8
    04E5 9D82      MUL	R24,R2
    04E6 01F0      MOVW	R30,R0
    04E7 E385      LDI	R24,0x35
    04E8 E090      LDI	R25,0
    04E9 0FE8      ADD	R30,R24
    04EA 1FF9      ADC	R31,R25
    04EB 91E4      LPM	R30,0(Z)
    04EC 93E000C4  STS	0xC4,R30
(0233) 
(0234) 	UCSR0C = BIT(UCSZ01) | BIT(UCSZ00); //Set frame format: 8data, 1stop bit, asyn mode
    04EE E086      LDI	R24,6
    04EF 938000C2  STS	0xC2,R24
(0235) 	UCSR0B = BIT(RXEN0) | BIT(TXEN0);   //使能串口發送、接收
    04F1 E188      LDI	R24,0x18
    04F2 938000C1  STS	0xC1,R24
(0236) 	EN_RX_INT();
    04F4 918000C1  LDS	R24,0xC1
    04F6 6880      ORI	R24,0x80
    04F7 938000C1  STS	0xC1,R24
    04F9 9508      RET
_uart0_tx_isr:
    04FA 922A      ST	R2,-Y
    04FB 938A      ST	R24,-Y
    04FC 939A      ST	R25,-Y
    04FD 93EA      ST	R30,-Y
    04FE 93FA      ST	R31,-Y
    04FF B62F      IN	R2,0x3F
    0500 922A      ST	R2,-Y
(0237) }
(0238) /*
(0239) ************************************************************
(0240) *Description:串口發送中斷函數
(0241) *Arguments  :none
(0242) *Returns    :none
(0243) *Notes      :
(0244) ************************************************************
(0245) */
(0246) #pragma interrupt_handler uart0_tx_isr:iv_USART0_UDRE
(0247) void uart0_tx_isr (void)
(0248) {
(0249) 	UDR0 = RFReceive_Buf[RFReceiveCnt];
    0501 EF84      LDI	R24,0xF4
    0502 E091      LDI	R25,1
    0503 91E001F2  LDS	R30,RFReceiveCnt
    0505 27FF      CLR	R31
    0506 0FE8      ADD	R30,R24
    0507 1FF9      ADC	R31,R25
    0508 8020      LDD	R2,Z+0
    0509 922000C6  STS	0xC6,R2
(0250) 	RFReceiveCnt++;
    050B 918001F2  LDS	R24,RFReceiveCnt
    050D 5F8F      SUBI	R24,0xFF
    050E 938001F2  STS	RFReceiveCnt,R24
(0251) 	if (RFReceiveCnt == RFReceiveLen)
    0510 902001F1  LDS	R2,RFReceiveLen
    0512 1582      CP	R24,R2
    0513 F429      BNE	0x0519
(0252) 	{
(0253) 	    DIS_TX_INT();  //串口數據發送完畢,關閉發送空中斷
    0514 918000C1  LDS	R24,0xC1
    0516 7D8F      ANDI	R24,0xDF
    0517 938000C1  STS	0xC1,R24
(0254) 	}
    0519 9029      LD	R2,Y+
    051A BE2F      OUT	0x3F,R2
    051B 91F9      LD	R31,Y+
    051C 91E9      LD	R30,Y+
    051D 9199      LD	R25,Y+
    051E 

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亚洲欧美第一页_禁久久精品乱码_粉嫩av一区二区三区免费野_久草精品视频
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