?? fmd.c
字號:
}
NF_CE_H();
// Copmare with the ECC generated from the HW
if(eccBuf[0] != eccRegVal.bECCBuf[0] ||
eccBuf[1] != eccRegVal.bECCBuf[1] ||
eccBuf[2] != eccRegVal.bECCBuf[2] ) {
Uart_Printf("FMD: ECC ERROR - Page #: %d\r\n", startSectorAddr);
// Now try to correct them
if(!ECC_CorrectData(pSectorBuff, eccBuf, eccRegVal.bECCBuf))
{
Uart_Printf("FMD: Unable to correct the ECC error - Page #: %d\r\n", startSectorAddr);
return FALSE;
}
}
return TRUE;
}
//
// IsBlockBad
//
// Check to see if the given block is bad. A block is bad if the 517th byte on
// the first or second page is not 0xff.
//
// blockID: The block address. We need to convert this to page address
//
//
BOOL IsBlockBad(BLOCK_ID blockID)
{
DWORD dwPageID = blockID << 5;
BOOL bRet = FALSE;
BYTE wFlag;
// Enable the chip
NF_CE_L();
// Issue the command
NF_CMD(CMD_READ2);
// Set up address
NF_ADDR(VALIDADDR);
NF_ADDR((dwPageID) & 0xff);
NF_ADDR((dwPageID >> 8) & 0xff);
NF_ADDR((dwPageID >> 16) & 0xff);
// Wait for Ready bit
NF_WAITRB();
// Now get the byte we want
wFlag = (BYTE) NF_DATA_R();
if(wFlag != 0xff) {
bRet = TRUE;
}
// Disable the chip
NF_CE_H();
return bRet;
}
//
// FMD_GetBlockStatus
//
// Returns the status of a block. The status information is stored in the spare area of the first sector for
// the respective block.
//
// A block is BAD if the bBadBlock byte on the first page is not equal to 0xff.
//
DWORD FMD_GetBlockStatus(BLOCK_ID blockID)
{
SECTOR_ADDR sectorAddr = blockID << LOG_2_PAGES_PER_BLOCK;
SectorInfo SI;
DWORD dwResult = 0;
if(!FMD_ReadSector(sectorAddr, NULL, &SI, 1))
{
return BLOCK_STATUS_UNKNOWN;
}
if(!(SI.bOEMReserved & OEM_BLOCK_READONLY))
{
dwResult |= BLOCK_STATUS_READONLY;
}
if(SI.bBadBlock != 0xFF)
{
dwResult |= BLOCK_STATUS_BAD;
}
return dwResult;
}
// ************** FMD_EraseBlock ***********
// Erase the given block,modified by Scyclone
BOOL FMD_EraseBlock(BLOCK_ID blockID)
{
BOOL bRet = TRUE;
DWORD dwPageID = blockID << 5;
#ifdef Debug2410mon
Uart_Printf("Erasing block %d \n", blockID);
#endif
if(blockID < IMAGE_START_BLOCK) // Protect the NBL region
{
bRet = FALSE;
return bRet;
}
// Enable the chip
NF_CE_L();
// Issue command
NF_CMD(CMD_ERASE);
// Set up address
NF_ADDR((dwPageID) & 0xff);
NF_ADDR((dwPageID >> 8) & 0xff);
NF_ADDR((dwPageID >> 16) & 0xff);
// Complete erase operation
NF_CMD(CMD_ERASE2);
// Wait for ready bit
NF_WAITRB();
// Check the status
NF_CMD(CMD_STATUS);
if (NF_DATA_R() & STATUS_ERROR){
Uart_Printf("######## Error Erasing block %d!\n", blockID);
bRet = FALSE;
}
NF_CE_H();
return bRet;
}
// FMD_WriteSector
//
// Write dwNumPages pages to the startSectorAddr
//
BOOL FMD_WriteSector(SECTOR_ADDR startSectorAddr, LPBYTE pSectorBuff, PSectorInfo pSectorInfoBuff,DWORD dwNumSectors)
{
DWORD i;
BOOL bRet = TRUE;
DWORD dwECCVal;
BYTE eccBuf[4];
// RETAILMSG(1, (TEXT("FMD_WriteSector:startSectorAddr = %x, dwNumSectors = %x \r\n"), startSectorAddr, dwNumSectors));
// Sanity check
// BUGBUGBUG: I need to come back to support dwNumSectors > 1
//
if((!pSectorBuff && !pSectorInfoBuff) || dwNumSectors != 1)
{
Uart_Printf("Invalid parameters!\r\n");
return FALSE;
}
NF_Reset();
if(!pSectorBuff) {
// RETAILMSG(1, (TEXT("pSectorBuff = %x \r\n"), pSectorBuff));
// If we are asked just to write the SectorInfo, we will do that separately
bRet = NAND_WriteSectorInfo(startSectorAddr, pSectorInfoBuff);
return bRet; // Do not write the actual sector information...
}
//Uart_Printf("write sector start \r\n");
NF_RSTECC(); // Initialize ECC register
NF_CE_L(); // Enable Chip
NF_CMD(CMD_READ); // Issue command
NF_CMD(CMD_WRITE);
NF_ADDR(0x00); // Setup address
NF_ADDR((startSectorAddr) & 0xff);
NF_ADDR((startSectorAddr >> 8) & 0xff);
NF_ADDR((startSectorAddr >> 16) & 0xff);
// Special case to handle un-aligned buffer pointer.
//
/* 暫時屏蔽
if( ((DWORD) pSectorBuff) & 0x3)
{
// Write the data
for(i=0; i<SECTOR_SIZE; i++)
NF_DATA_W(pSectorBuff[i]);
}
else {
WritePage512(pSectorBuff, pNFDATA);
}
*/
for(i=0; i<SECTOR_SIZE; i++)
NF_DATA_W(pSectorBuff[i]);
// Read out the ECC value generated by HW
dwECCVal = NF_ECC();
// Write the SectorInfo data to the media
// NOTE: This hardware is odd: only a byte can be written at a time and it must reside in the
// upper byte of a USHORT.
if(pSectorInfoBuff)
{
// Write the first reserved field (DWORD)
NF_DATA_W( (pSectorInfoBuff->dwReserved1 >> 24) & 0xff );
NF_DATA_W( (pSectorInfoBuff->dwReserved1 >> 16) & 0xff );
NF_DATA_W( (pSectorInfoBuff->dwReserved1 >> 8 ) & 0xff );
NF_DATA_W( (pSectorInfoBuff->dwReserved1) & 0xff );
// Write OEM reserved flag
NF_DATA_W( (pSectorInfoBuff->bOEMReserved) );
// Write the bad block flag
NF_DATA_W( (pSectorInfoBuff->bBadBlock) );
// Write the second reserved field
NF_DATA_W( (pSectorInfoBuff->wReserved2 >> 8) & 0xff );
NF_DATA_W( (pSectorInfoBuff->wReserved2) & 0xff );
}else
{
// Make sure we advance the Flash's write pointer (even though we aren't writing the SectorInfo data)
for(i=0; i<sizeof(SectorInfo); i++)
NF_DATA_W(0xff);
}
// ECC stuff should be here
eccBuf[0] = (BYTE) ((dwECCVal) & 0xff);
eccBuf[1] = (BYTE) ((dwECCVal >> 8) & 0xff);
eccBuf[2] = (BYTE) ((dwECCVal >> 16) & 0xff);
// Write the ECC value to the flash
for(i=0; i<3; i++) {
NF_DATA_W(eccBuf[i]);
}
// Finish up the write operation
NF_CMD(CMD_WRITE2);
// Wait for RB
NF_WAITRB();
// Check the status
NF_CMD(CMD_STATUS);
if(NF_DATA_R() & STATUS_ERROR) {
Uart_Printf("FMD_WriteSector() ######## Error Programming page %d!\r\n", startSectorAddr);
bRet = FALSE;
}
// Disable the chip
NF_CE_H();
return bRet;
}
/*
* MarkBlockBad
*
* Mark the block as a bad block. We need to write a 00 to the 517th byte
*/
BOOL MarkBlockBad(BLOCK_ID blockID)
{
DWORD dwStartPage = blockID << 5;
BOOL bRet = TRUE;
// Enable chip
NF_CE_L();
// Issue command
// We are dealing with spare area
NF_CMD(CMD_READ2);
NF_CMD(CMD_WRITE);
// Set up address
NF_ADDR(VALIDADDR);
NF_ADDR((dwStartPage) & 0xff);
NF_ADDR((dwStartPage >> 8) & 0xff);
NF_ADDR((dwStartPage >> 16) & 0xff);
NF_DATA_W(BADBLOCKMARK);
// Copmlete the write
NF_CMD(CMD_WRITE2);
// Wait for RB
NF_WAITRB();
// Get the status
NF_CMD(CMD_STATUS);
if(NF_DATA_R() & STATUS_ERROR) {
Uart_Printf("######## Failed to mark the block bad!\n");
bRet = FALSE;
}
// Disable chip select
NF_CE_H();
return bRet;
}
//
// FMD_SetBlockStatus
//
// Sets the status of a block. Only implement for bad blocks for now.
// Returns TRUE if no errors in setting.
//
BOOL FMD_SetBlockStatus(BLOCK_ID blockID, DWORD dwStatus)
{
SECTOR_ADDR sectorAddr = blockID << LOG_2_PAGES_PER_BLOCK;
BYTE bStatus = 0;
if(dwStatus & BLOCK_STATUS_BAD)
{
if(!MarkBlockBad (blockID))
{
return FALSE;
}
}
// We don't currently support setting a block to read-only, so fail if request is
// for read-only and block is not currently read-only.
if(dwStatus & BLOCK_STATUS_READONLY)
{
if(!(FMD_GetBlockStatus(blockID) & BLOCK_STATUS_READONLY))
{
return FALSE;
}
}
return TRUE;
}
//------------------------------- Private Interface (NOT used by the FAL) --------------------------
// FMD_GetOEMReservedByte
//
// Retrieves the OEM reserved byte (for metadata) for the specified physical sector.
//
//
BOOL FMD_GetOEMReservedByte(SECTOR_ADDR physicalSectorAddr, PBYTE pOEMReserved)
{
// Enable chip select
NF_CE_L();
// Issue command
NF_CMD(CMD_READ2);
// Set up address
NF_ADDR(OEMADDR);
NF_ADDR((physicalSectorAddr) & 0xff);
NF_ADDR((physicalSectorAddr >> 8) & 0xff);
NF_ADDR((physicalSectorAddr >> 16) & 0xff);
// Wait for the ready bit
NF_WAITRB();
// Read the data
*pOEMReserved = (BYTE) NF_DATA_R();
// Disable chip select
NF_CE_H();
return TRUE;
}
// FMD_SetOEMReservedByte
//
// Sets the OEM reserved byte (for metadata) for the specified physical sector.
//
BOOL FMD_SetOEMReservedByte(SECTOR_ADDR physicalSectorAddr, BYTE bOEMReserved)
{
BOOL bRet = TRUE;
// Enable chip select
NF_CE_L();
// Issue command
NF_CMD(CMD_READ2);
NF_CMD(CMD_WRITE);
// Set up address
NF_ADDR(OEMADDR);
NF_ADDR((physicalSectorAddr) & 0xff);
NF_ADDR((physicalSectorAddr >> 8) & 0xff);
NF_ADDR((physicalSectorAddr >> 16) & 0xff);
// Write the data
NF_DATA_W(bOEMReserved);
// Complete the write
NF_CMD(CMD_WRITE2);
// Wait for the ready bit
NF_WAITRB();
// Read the status
NF_CMD(CMD_STATUS);
// Check the status
if(NF_DATA_R() & STATUS_ERROR) {
Uart_Printf("######## Failed to set OEM Reserved byte!\n");
bRet = FALSE;
}
// Disable chip select
NF_CE_H();
return bRet;
}
//---------------------------------------- Helper Functions ----------------------------------------
// Interface function for testing purpose.
//
BOOL FMD_ReadSpare(DWORD dwStartPage, LPBYTE pBuff, DWORD dwNumPages)
{
DWORD i, n;
// Enable chip select
NF_CE_L();
// Issue command
NF_CMD(CMD_READ2);
// Set up address
NF_ADDR(0x00);
NF_ADDR((dwStartPage) & 0xff);
NF_ADDR((dwStartPage >> 8) & 0xff);
NF_ADDR((dwStartPage >> 16) & 0xff);
// Wait for Ready bit
NF_WAITRB();
// Now read out the data
for(n=0; n<dwNumPages; n++) {
// Read the spare area
for(i=0; i<16; i++) {
pBuff[n*16+i] = (BYTE) NF_DATA_R();
}
NF_WAITRB();
}
NF_CE_H();
return TRUE;
}
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