?? boot.lis
字號:
0000 ;@Id: boot.tpl#6 @
0000 ;=============================================================================
0000 ; FILENAME: boot.asm
0000 ; VERSION: 3.20
0000 ; DATE: 10 October 2002
0000 ;
0000 ; DESCRIPTION:
0000 ; M8C Boot Code from Reset.
0000 ;
0000 ; Copyright (C) Cypress MicroSystems 2001, 2002. All rights reserved.
0000 ;
0000 ; NOTES:
0000 ; PSoC Designer's Device Editor uses a template file, BOOT.TPL, located in
0000 ; the project's root directory to create BOOT.ASM. Any changes made to
0000 ; BOOT.ASM will be overwritten every time the project is generated; therfore
0000 ; changes should be made to BOOT.TPL not BOOT.ASM. Care must be taken when
0000 ; modifying BOOT.TPL so that replacement strings (such as @PROJECT_NAME)
0000 ; are not accidentally modified.
0000 ;
0000 ; The start of _main is at a fixed location so care must be taken when adding
0000 ; user code for any interrupts within boot.asm. If too much code is added,the
0000 ; end of BOOT.ASM will extend into _main and cause a linker error. The safest
0000 ; way to add code for an interrupt is to LCALL or LJMP to a normal routine
0000 ; located in a seperate file that contains the desired additional interrupt
0000 ; code.
0000 ;=============================================================================
0000
0000 CPU_CLOCK: equ 0h ;CPU clock value
0007 CPU_CLOCK_MASK: equ 7h ;CPU clock mask
0000 CPU_CLOCK_JUST: equ 0h ;CPU clock value justified
0000 SELECT_32K: equ 0h ;32K select value
0080 SELECT_32K_MASK: equ 80h ;32K select mask
0000 SELECT_32K_JUST: equ 0h ;32K select value justified
0000 PLL_MODE: equ 0h ;PLL mode value
0040 PLL_MODE_MASK: equ 40h ;PLL mode mask
0000 PLL_MODE_JUST: equ 0h ;PLL mode value justified
0000 SLEEP_TIMER: equ 0h ;Sleep Timer value
0018 SLEEP_TIMER_MASK: equ 18h ;Sleep Timer mask
0000 SLEEP_TIMER_JUST: equ 0h ;Sleep Timer value justified
0001 SWITCH_MODE_PUMP: equ 1h ;Switch Mode Pump setting
0080 SWITCH_MODE_PUMP_MASK: equ 80h ;Switch Mode Pump mask
0080 SWITCH_MODE_PUMP_JUST: equ 80h ;Switch Mode Pump justified
0007 TRIP_VOLTAGE: equ 7h ;Trip Voltage
0001 SUPPLY_VOLTAGE: equ 1h ;Supply Voltage 1 = 5.0V
0000 ;0 = 3.3V
0000 COMM_RX_PRESENT: equ 0 ;1 = TRUE
0000
0000 CLOCK_DIV_24V1: equ 0h ;24V1 clock divider
00F0 CLOCK_DIV_24V1_MASK: equ f0h ;24V1 clock divider mask
0000 CLOCK_DIV_24V1_JUST: equ 0h ;24V1 clock divider justified
0000 CLOCK_DIV_24V2: equ 0h ;24V2 clock divider
000F CLOCK_DIV_24V2_MASK: equ fh ;24V2 clock divider mask
0000 CLOCK_DIV_24V2_JUST: equ 0h ;24V2 clock divider justified
0000 ANALOG_BUFFER_PWR: equ 0h ;Analog buffer power level
0001 ANALOG_BUFFER_PWR_MASK: equ 1h ;Analog buffer power level mask
0000 ANALOG_BUFFER_PWR_JUST: equ 0h ;Analog buffer power level justified
0005 ANALOG_POWER: equ 5h ;Analog power control
0007 ANALOG_POWER_MASK: equ 7h ;Analog power control mask
0005 ANALOG_POWER_JUST: equ 5h ;Analog power control justified
0000 OP_AMP_BIAS: equ 0h ;Op amp bias level
0040 OP_AMP_BIAS_MASK: equ 40h ;Op amp bias level mask
0000 OP_AMP_BIAS_JUST: equ 0h ;Op amp bias level justified
0000 REF_MUX: equ 0h ;Ref mux setting
0038 REF_MUX_MASK: equ 38h ;Ref mux setting mask
0000 REF_MUX_JUST: equ 0h ;Ref mux setting justified
0000 ;
0000 ; write only registers
0000 ;
0000 ANALOG_IO_CONTROL: equ 0h ;Analog IO Control register (ABF_CR)
0000 PORT_0_BYPASS: equ 0h ;Port 0 bypass register (PRT0GS)
0000 PORT_0_DRIVE_0: equ 0h ;Port 0 drive mode 0 register (PRT0DM0)
0000 PORT_0_DRIVE_1: equ 0h ;Port 0 drive mode 1 register (PRT0DM1)
0000 PORT_0_INTENABLE: equ 0h ;Port 0 interrupt enable register (PRT0IE)
0000 PORT_0_INTCTRL_0: equ 0h ;Port 0 interrupt control 0 register (PRT0IC0)
0000 PORT_0_INTCTRL_1: equ 0h ;Port 0 interrupt control 1 register (PRT0IC1)
0000 PORT_1_BYPASS: equ 0h ;Port 1 bypass register (PRT1GS)
0000 PORT_1_DRIVE_0: equ 0h ;Port 1 drive mode 0 register (PRT1DM0)
0000 PORT_1_DRIVE_1: equ 0h ;Port 1 drive mode 1 register (PRT1DM1)
0000 PORT_1_INTENABLE: equ 0h ;Port 1 interrupt enable register (PRT1IE)
0000 PORT_1_INTCTRL_0: equ 0h ;Port 1 interrupt control 0 register (PRT1IC0)
0000 PORT_1_INTCTRL_1: equ 0h ;Port 1 interrupt control 1 register (PRT1IC1)
0000 PORT_2_BYPASS: equ 0h ;Port 2 bypass register (PRT2GS)
0000 PORT_2_DRIVE_0: equ 0h ;Port 2 drive mode 0 register (PRT2DM0)
0000 PORT_2_DRIVE_1: equ 0h ;Port 2 drive mode 1 register (PRT2DM1)
0000 PORT_2_INTENABLE: equ 0h ;Port 2 interrupt enable register (PRT2IE)
0000 PORT_2_INTCTRL_0: equ 0h ;Port 2 interrupt control 0 register (PRT2IC0)
0000 PORT_2_INTCTRL_1: equ 0h ;Port 2 interrupt control 1 register (PRT2IC1)
0000 PORT_3_BYPASS: equ 0h ;Port 3 bypass register (PRT3GS)
0000 PORT_3_DRIVE_0: equ 0h ;Port 3 drive mode 0 register (PRT3DM0)
0000 PORT_3_DRIVE_1: equ 0h ;Port 3 drive mode 1 register (PRT3DM1)
0000 PORT_3_INTENABLE: equ 0h ;Port 3 interrupt enable register (PRT3IE)
0000 PORT_3_INTCTRL_0: equ 0h ;Port 3 interrupt control 0 register (PRT3IC0)
0000 PORT_3_INTCTRL_1: equ 0h ;Port 3 interrupt control 1 register (PRT3IC1)
0000 PORT_4_BYPASS: equ 0h ;Port 4 bypass register (PRT4GS)
0000 PORT_4_DRIVE_0: equ 0h ;Port 4 drive mode 0 register (PRT4DM0)
0000 PORT_4_DRIVE_1: equ 0h ;Port 4 drive mode 1 register (PRT4DM1)
0000 PORT_4_INTENABLE: equ 0h ;Port 4 interrupt enable register (PRT4IE)
0000 PORT_4_INTCTRL_0: equ 0h ;Port 4 interrupt control 0 register (PRT4IC0)
0000 PORT_4_INTCTRL_1: equ 0h ;Port 4 interrupt control 1 register (PRT4IC1)
0000 PORT_5_BYPASS: equ 0h ;Port 5 bypass register (PRT5GS)
0000 PORT_5_DRIVE_0: equ 0h ;Port 5 drive mode 0 register (PRT5DM0)
0000 PORT_5_DRIVE_1: equ 0h ;Port 5 drive mode 1 register (PRT5DM1)
0000 PORT_5_INTENABLE: equ 0h ;Port 5 interrupt enable register (PRT5IE)
0000 PORT_5_INTCTRL_0: equ 0h ;Port 5 interrupt control 0 register (PRT5IC0)
0000 PORT_5_INTCTRL_1: equ 0h ;Port 5 interrupt control 1 register (PRT5IC1)
0010 FlagXIOMask: equ 10h
0008 FlagSuper: equ 08h
0004 FlagCarry: equ 04h
0002 FlagZero: equ 02h
0001 FlagGlobalIE: equ 01h
0000
0000
0000 ;;===================================
0000 ;; Register Space, Bank 0
0000 ;;===================================
0000
0000 ;------------------------------------------------
0000 ; Port Registers
0000 ; Note: Also see this address range in Bank 1.
0000 ;------------------------------------------------
0000 ; Port 0
0000 PRT0DR: equ 00h ; Port 0 Data Register (RW)
0001 PRT0IE: equ 01h ; Port 0 Interrupt Enable Register (WO)
0002 PRT0GS: equ 02h ; Port 0 Global Select Register (WO)
0000 ; (Reserved) equ 03h
0000 ; Port 1
0004 PRT1DR: equ 04h ; Port 1 Data Register (RW)
0005 PRT1IE: equ 05h ; Port 1 Interrupt Enable Register (WO)
0006 PRT1GS: equ 06h ; Port 1 Global Select Register (WO)
0000 ; (Reserved) equ 07h
0000 ; Port 2
0008 PRT2DR: equ 08h ; Port 2 Data Register (RW)
0009 PRT2IE: equ 09h ; Port 2 Interrupt Enable Register (WO)
000A PRT2GS: equ 0Ah ; Port 2 Global Select Register (WO)
0000 ; (Reserved) equ 0Bh
0000 ; Port 3
000C PRT3DR: equ 0Ch ; Port 3 Data Register (RW)
000D PRT3IE: equ 0Dh ; Port 3 Interrupt Enable Register (WO)
000E PRT3GS: equ 0Eh ; Port 3 Global Select Register (WO)
0000 ; (Reserved) equ 0Fh
0000 ; Port 4
0010 PRT4DR: equ 10h ; Port 4 Data Register (RW)
0011 PRT4IE: equ 11h ; Port 4 Interrupt Enable Register (WO)
0012 PRT4GS: equ 12h ; Port 4 Global Select Register (WO)
0000 ; (Reserved) equ 13h
0000 ; Port 5
0014 PRT5DR: equ 14h ; Port 5 Data Register (RW)
0015 PRT5IE: equ 15h ; Port 5 Interrupt Enable Register (WO)
0016 PRT5GS: equ 16h ; Port 5 Global Select Register (WO)
0000 ; (Reserved) equ 17h
0000
0000 ;------------------------------------------------
0000 ; Digital PSoC(tm) block Registers
0000 ; Note: Also see this address range in Bank 1.
0000 ;------------------------------------------------
0000 ; Digital PSoC block 0, Basic Type A
0020 DBA00DR0: equ 20h ; data register 0 (RO)
0021 DBA00DR1: equ 21h ; data register 1 (WO)
0022 DBA00DR2: equ 22h ; data register 2 (RW)
0023 DBA00CR0: equ 23h ; control & status register 0 (RW)
0000
0000 ; Digital PSoC block 1, Basic Type A
0024 DBA01DR0: equ 24h ; data register 0 (RO)
0025 DBA01DR1: equ 25h ; data register 1 (WO)
0026 DBA01DR2: equ 26h ; data register 2 (RW)
0027 DBA01CR0: equ 27h ; control & status register 0 (RW)
0000
0000 ; Digital PSoC block 2, Basic Type A
0028 DBA02DR0: equ 28h ; data register 0 (RO)
0029 DBA02DR1: equ 29h ; data register 1 (WO)
002A DBA02DR2: equ 2Ah ; data register 2 (RW)
002B DBA02CR0: equ 2Bh ; control & status register 0 (RW)
0000
0000 ; Digital PSoC block 3, Basic Type A
002C DBA03DR0: equ 2Ch ; data register 0 (RO)
002D DBA03DR1: equ 2Dh ; data register 1 (WO)
002E DBA03DR2: equ 2Eh ; data register 2 (RW)
002F DBA03CR0: equ 2Fh ; control & status register 0 (RW)
0000
0000 ; Digital PSoC block 4, Communications Type A
0030 DCA04DR0: equ 30h ; data register 0 (RO)
0031 DCA04DR1: equ 31h ; data register 1 (WO)
0032 DCA04DR2: equ 32h ; data register 2 (RW)
0033 DCA04CR0: equ 33h ; control & status register 0 (RW)
0000
0000 ; Digital PSoC block 5, Communications Type A
0034 DCA05DR0: equ 34h ; data register 0 (RO)
0035 DCA05DR1: equ 35h ; data register 1 (WO)
0036 DCA05DR2: equ 36h ; data register 2 (RW)
0037 DCA05CR0: equ 37h ; control & status register 0 (RW)
0000
0000 ; Digital PSoC block 6, Communications Type A
0038 DCA06DR0: equ 38h ; data register 0 (RO)
0039 DCA06DR1: equ 39h ; data register 1 (WO)
003A DCA06DR2: equ 3Ah ; data register 2 (RW)
003B DCA06CR0: equ 3Bh ; control & status register 0 (RW)
0000
0000 ; Digital PSoC block 7, Communications Type A
003C DCA07DR0: equ 3Ch ; data register 0 (RO)
003D DCA07DR1: equ 3Dh ; data register 1 (WO)
003E DCA07DR2: equ 3Eh ; data register 2 (RW)
003F DCA07CR0: equ 3Fh ; control & status register 0 (RW)
0000
0000
0000 ;-------------------------------------
0000 ; Analog Resource Control Registers
0000 ;-------------------------------------
0060 AMX_IN: equ 60h ; analog input multiplexor control (RW)
0000 ; AMX_IN Bit field masks:
00C0 AMX_IN_ACI3: equ C0h ; column 3 input mux
0030 AMX_IN_ACI2: equ 30h ; column 2 input mux
000C AMX_IN_ACI1: equ 0Ch ; column 1 input mux
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