{#ifndef __LITTLE_ENDIAN# ifdef __BIG_ENDIAN	int i;	u16 *stringcast;#ifdef __mc68000__	if (!MACH_IS_AMIGA && !MACH_IS_MAC && !MACH_IS_Q40 && !MACH_IS_ATARI)		return;#ifdef M68K_IDE_SWAPW	if (M68K_IDE_SWAPW) {	/* fix bus byteorder first */		u_char *p = (u_char *)id;		u_char t;		for (i = 0; i < 512; i += 2) {			t = p[i];			p[i] = p[i+1];			p[i+1] = t;		}	}#endif#endif /* __mc68000__ */	id->config         = __le16_to_cpu(id->config);	id->cyls           = __le16_to_cpu(id->cyls);	id->reserved2      = __le16_to_cpu(id->reserved2);	id->heads          = __le16_to_cpu(id->heads);	id->track_bytes    = __le16_to_cpu(id->track_bytes);	id->sector_bytes   = __le16_to_cpu(id->sector_bytes);	id->sectors        = __le16_to_cpu(id->sectors);	id->vendor0        = __le16_to_cpu(id->vendor0);	id->vendor1        = __le16_to_cpu(id->vendor1);	id->vendor2        = __le16_to_cpu(id->vendor2);	stringcast = (u16 *)&id->serial_no[0];	for (i = 0; i < (20/2); i++)		stringcast[i] = __le16_to_cpu(stringcast[i]);	id->buf_type       = __le16_to_cpu(id->buf_type);	id->buf_size       = __le16_to_cpu(id->buf_size);	id->ecc_bytes      = __le16_to_cpu(id->ecc_bytes);	stringcast = (u16 *)&id->fw_rev[0];	for (i = 0; i < (8/2); i++)		stringcast[i] = __le16_to_cpu(stringcast[i]);	stringcast = (u16 *)&id->model[0];	for (i = 0; i < (40/2); i++)		stringcast[i] = __le16_to_cpu(stringcast[i]);	id->dword_io       = __le16_to_cpu(id->dword_io);	id->reserved50     = __le16_to_cpu(id->reserved50);	id->field_valid    = __le16_to_cpu(id->field_valid);	id->cur_cyls       = __le16_to_cpu(id->cur_cyls);	id->cur_heads      = __le16_to_cpu(id->cur_heads);	id->cur_sectors    = __le16_to_cpu(id->cur_sectors);	id->cur_capacity0  = __le16_to_cpu(id->cur_capacity0);	id->cur_capacity1  = __le16_to_cpu(id->cur_capacity1);	id->lba_capacity   = __le32_to_cpu(id->lba_capacity);	id->dma_1word      = __le16_to_cpu(id->dma_1word);	id->dma_mword      = __le16_to_cpu(id->dma_mword);	id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes);	id->eide_dma_min   = __le16_to_cpu(id->eide_dma_min);	id->eide_dma_time  = __le16_to_cpu(id->eide_dma_time);	id->eide_pio       = __le16_to_cpu(id->eide_pio);	id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy);	for (i = 0; i < 2; ++i)		id->words69_70[i] = __le16_to_cpu(id->words69_70[i]);	for (i = 0; i < 4; ++i)		id->words71_74[i] = __le16_to_cpu(id->words71_74[i]);	id->queue_depth    = __le16_to_cpu(id->queue_depth);	for (i = 0; i < 4; ++i)		id->words76_79[i] = __le16_to_cpu(id->words76_79[i]);	id->major_rev_num  = __le16_to_cpu(id->major_rev_num);	id->minor_rev_num  = __le16_to_cpu(id->minor_rev_num);	id->command_set_1  = __le16_to_cpu(id->command_set_1);	id->command_set_2  = __le16_to_cpu(id->command_set_2);	id->cfsse          = __le16_to_cpu(id->cfsse);	id->cfs_enable_1   = __le16_to_cpu(id->cfs_enable_1);	id->cfs_enable_2   = __le16_to_cpu(id->cfs_enable_2);	id->csf_default    = __le16_to_cpu(id->csf_default);	id->dma_ultra      = __le16_to_cpu(id->dma_ultra);	id->trseuc         = __le16_to_cpu(id->trseuc);	id->trsEuc         = __le16_to_cpu(id->trsEuc);	id->CurAPMvalues   = __le16_to_cpu(id->CurAPMvalues);	id->mprc           = __le16_to_cpu(id->mprc);	id->hw_config      = __le16_to_cpu(id->hw_config);	id->acoustic       = __le16_to_cpu(id->acoustic);	id->msrqs          = __le16_to_cpu(id->msrqs);	id->sxfert         = __le16_to_cpu(id->sxfert);	id->sal            = __le16_to_cpu(id->sal);	id->spg            = __le32_to_cpu(id->spg);	id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2);	for (i = 0; i < 22; i++)		id->words104_125[i]   = __le16_to_cpu(id->words104_125[i]);	id->last_lun       = __le16_to_cpu(id->last_lun);	id->word127        = __le16_to_cpu(id->word127);	id->dlf            = __le16_to_cpu(id->dlf);	id->csfo           = __le16_to_cpu(id->csfo);	for (i = 0; i < 26; i++)		id->words130_155[i] = __le16_to_cpu(id->words130_155[i]);	id->word156        = __le16_to_cpu(id->word156);	for (i = 0; i < 3; i++)		id->words157_159[i] = __le16_to_cpu(id->words157_159[i]);	id->cfa_power      = __le16_to_cpu(id->cfa_power);	for (i = 0; i < 14; i++)		id->words161_175[i] = __le16_to_cpu(id->words161_175[i]);	for (i = 0; i < 31; i++)		id->words176_205[i] = __le16_to_cpu(id->words176_205[i]);	for (i = 0; i < 48; i++)		id->words206_254[i] = __le16_to_cpu(id->words206_254[i]);	id->integrity_word  = __le16_to_cpu(id->integrity_word);# else#  error "Please fix <asm/byteorder.h>"# endif#endif}EXPORT_SYMBOL(ide_fix_driveid);void ide_fixstring (u8 *s, const int bytecount, const int byteswap){	u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */	if (byteswap) {		/* convert from big-endian to host byte order */		for (p = end ; p != s;) {			unsigned short *pp = (unsigned short *) (p -= 2);			*pp = ntohs(*pp);		}	}	/* strip leading blanks */	while (s != end && *s == ' ')		++s;	/* compress internal blanks and strip trailing blanks */	while (s != end && *s) {		if (*s++ != ' ' || (s != end && *s && *s != ' '))			*p++ = *(s-1);	}	/* wipe out trailing garbage */	while (p != end)		*p++ = '\0';}EXPORT_SYMBOL(ide_fixstring);/* * Needed for PCI irq sharing */int drive_is_ready (ide_drive_t *drive){	ide_hwif_t *hwif	= HWIF(drive);	u8 stat			= 0;	if (drive->waiting_for_dma)		return hwif->ide_dma_test_irq(drive);#if 0	/* need to guarantee 400ns since last command was issued */	udelay(1);#endif#ifdef CONFIG_IDEPCI_SHARE_IRQ	/*	 * We do a passive status test under shared PCI interrupts on	 * cards that truly share the ATA side interrupt, but may also share	 * an interrupt with another pci card/device.  We make no assumptions	 * about possible isa-pnp and pci-pnp issues yet.	 */	if (IDE_CONTROL_REG)		stat = hwif->INB(IDE_ALTSTATUS_REG);	else#endif /* CONFIG_IDEPCI_SHARE_IRQ */		/* Note: this may clear a pending IRQ!! */		stat = hwif->INB(IDE_STATUS_REG);	if (stat & BUSY_STAT)		/* drive busy:  definitely not interrupting */		return 0;	/* drive ready: *might* be interrupting */	return 1;}EXPORT_SYMBOL(drive_is_ready);/* * Global for All, and taken from ide-pmac.c. Can be called * with spinlock held & IRQs disabled, so don't schedule ! */int wait_for_ready (ide_drive_t *drive, int timeout){	ide_hwif_t *hwif	= HWIF(drive);	u8 stat			= 0;	while(--timeout) {		stat = hwif->INB(IDE_STATUS_REG);		if (!(stat & BUSY_STAT)) {			if (drive->ready_stat == 0)				break;			else if ((stat & drive->ready_stat)||(stat & ERR_STAT))				break;		}		mdelay(1);	}	if ((stat & ERR_STAT) || timeout <= 0) {		if (stat & ERR_STAT) {			printk(KERN_ERR "%s: wait_for_ready, "				"error status: %x\n", drive->name, stat);		}		return 1;	}	return 0;}EXPORT_SYMBOL(wait_for_ready);/* * This routine busy-waits for the drive status to be not "busy". * It then checks the status for all of the "good" bits and none * of the "bad" bits, and if all is okay it returns 0.  All other * cases return 1 after invoking ide_error() -- caller should just return. * * This routine should get fixed to not hog the cpu during extra long waits.. * That could be done by busy-waiting for the first jiffy or two, and then * setting a timer to wake up at half second intervals thereafter, * until timeout is achieved, before timing out. */int ide_wait_stat (ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout){	ide_hwif_t *hwif = HWIF(drive);	u8 stat;	int i;	unsigned long flags; 	/* bail early if we've exceeded max_failures */	if (drive->max_failures && (drive->failures > drive->max_failures)) {		*startstop = ide_stopped;		return 1;	}	udelay(1);	/* spec allows drive 400ns to assert "BUSY" */	if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {		local_irq_set(flags);		timeout += jiffies;		while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {			if (time_after(jiffies, timeout)) {				local_irq_restore(flags);				*startstop = DRIVER(drive)->error(drive, "status timeout", stat);				return 1;			}		}		local_irq_restore(flags);	}	/*	 * Allow status to settle, then read it again.	 * A few rare drives vastly violate the 400ns spec here,	 * so we'll wait up to 10usec for a "good" status	 * rather than expensively fail things immediately.	 * This fix courtesy of Matthew Faupel & Niccolo Rigacci.	 */	for (i = 0; i < 10; i++) {		udelay(1);		if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), good, bad))			return 0;	}	*startstop = DRIVER(drive)->error(drive, "status error", stat);	return 1;}EXPORT_SYMBOL(ide_wait_stat);/* *  All hosts that use the 80c ribbon must use! *  The name is derived from upper byte of word 93 and the 80c ribbon. */u8 eighty_ninty_three (ide_drive_t *drive){#if 0	if (!HWIF(drive)->udma_four)		return 0;	if (drive->id->major_rev_num) {		int hssbd = 0;		int i;		/*		 * Determime highest Supported SPEC		 */		for (i=1; i<=15; i++)			if (drive->id->major_rev_num & (1<<i))				hssbd++;		switch (hssbd) {			case 7:			case 6:			case 5:		/* ATA-4 and older do not support above Ultra 33 */			default:				return 0;		}	}	return ((u8) (#ifndef CONFIG_IDEDMA_IVB		(drive->id->hw_config & 0x4000) &&#endif /* CONFIG_IDEDMA_IVB */		 (drive->id->hw_config & 0x6000)) ? 1 : 0);#else	return ((u8) ((HWIF(drive)->udma_four) &&#ifndef CONFIG_IDEDMA_IVB			(drive->id->hw_config & 0x4000) &&#endif /* CONFIG_IDEDMA_IVB */			(drive->id->hw_config & 0x6000)) ? 1 : 0);#endif}EXPORT_SYMBOL(eighty_ninty_three);int ide_ata66_check (ide_drive_t *drive, ide_task_t *args){	if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) &&	    (args->tfRegister[IDE_SECTOR_OFFSET] > XFER_UDMA_2) &&	    (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER)) {#ifndef CONFIG_IDEDMA_IVB		if ((drive->id->hw_config & 0x6000) == 0) {#else /* !CONFIG_IDEDMA_IVB */		if (((drive->id->hw_config & 0x2000) == 0) ||		    ((drive->id->hw_config & 0x4000) == 0)) {#endif /* CONFIG_IDEDMA_IVB */			printk("%s: Speed warnings UDMA 3/4/5 is not "				"functional.\n", drive->name);			return 1;		}		if (!HWIF(drive)->udma_four) {			printk("%s: Speed warnings UDMA 3/4/5 is not "				"functional.\n",				HWIF(drive)->name);			return 1;		}	}	return 0;}EXPORT_SYMBOL(ide_ata66_check);/* * Backside of HDIO_DRIVE_CMD call of SETFEATURES_XFER. * 1 : Safe to update drive->id DMA registers. * 0 : OOPs not allowed. */int set_transfer (ide_drive_t *drive, ide_task_t *args){	if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) &&	    (args->tfRegister[IDE_SECTOR_OFFSET] >= XFER_SW_DMA_0) &&	    (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER) &&	    (drive->id->dma_ultra ||	     drive->id->dma_mword ||	     drive->id->dma_1word))		return 1;	return 0;}EXPORT_SYMBOL(set_transfer);u8 ide_auto_reduce_xfer (ide_drive_t *drive){	if (!drive->crc_count)		return drive->current_speed;	drive->crc_count = 0;	switch(drive->current_speed) {		case XFER_UDMA_7:	return XFER_UDMA_6;		case XFER_UDMA_6:	return XFER_UDMA_5;		case XFER_UDMA_5:	return XFER_UDMA_4;		case XFER_UDMA_4:	return XFER_UDMA_3;		case XFER_UDMA_3:	return XFER_UDMA_2;		case XFER_UDMA_2:	return XFER_UDMA_1;		case XFER_UDMA_1:	return XFER_UDMA_0;			/*			 * OOPS we do not goto non Ultra DMA modes			 * without iCRC's available we force			 * the system to PIO and make the user			 * invoke the ATA-1 ATA-2 DMA modes.			 */		case XFER_UDMA_0:		default:		return XFER_PIO_4;	}}EXPORT_SYMBOL(ide_auto_reduce_xfer);/* * Update the  */int ide_driveid_update (ide_drive_t *drive){	ide_hwif_t *hwif	= HWIF(drive);	struct hd_driveid *id;#if 0	id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);	if (!id)		return 0;	taskfile_lib_get_identify(drive, (char *)&id);	ide_fix_driveid(id);	if (id) {		drive->id->dma_ultra = id->dma_ultra;		drive->id->dma_mword = id->dma_mword;		drive->id->dma_1word = id->dma_1word;		/* anything more ? */		kfree(id);	}	return 1;#else	/*	 * Re-read drive->id for possible DMA mode	 * change (copied from ide-probe.c)	 */	unsigned long timeout, flags;	SELECT_MASK(drive, 1);	if (IDE_CONTROL_REG)		hwif->OUTB(drive->ctl,IDE_CONTROL_REG);	ide_delay_50ms();	hwif->OUTB(WIN_IDENTIFY, IDE_COMMAND_REG);	timeout = jiffies + WAIT_WORSTCASE;	do {		if (time_after(jiffies, timeout)) {			SELECT_MASK(drive, 0);			return 0;	/* drive timed-out */		}		ide_delay_50ms();	/* give drive a breather */	} while (hwif->INB(IDE_ALTSTATUS_REG) & BUSY_STAT);	ide_delay_50ms();	/* wait for IRQ and DRQ_STAT */	if (!OK_STAT(hwif->INB(IDE_STATUS_REG),DRQ_STAT,BAD_R_STAT)) {		SELECT_MASK(drive, 0);		printk("%s: CHECK for good STATUS\n", drive->name);		return 0;	}	local_irq_save(flags);	SELECT_MASK(drive, 0);	id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);	if (!id) {		local_irq_restore(flags);		return 0;	}	ata_input_data(drive, id, SECTOR_WORDS);	(void) hwif->INB(IDE_STATUS_REG);	/* clear drive IRQ */	local_irq_enable();	local_irq_restore(flags);	ide_fix_driveid(id);	drive->id->dma_ultra = id->dma_ultra;	drive->id->dma_mword = id->dma_mword;	drive->id->dma_1word = id->dma_1word;	/* anything more ? */	kfree(id);	return 1;